mirror of https://github.com/Ryujinx/Ryujinx.git
68 lines
2.1 KiB
C#
68 lines
2.1 KiB
C#
using ARMeilleure.Decoders;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Translation;
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using static ARMeilleure.Instructions.InstEmitHelper;
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using static ARMeilleure.IntermediateRepresentation.OperandHelper;
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namespace ARMeilleure.Instructions
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{
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static partial class InstEmit
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{
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public static void Sdiv(ArmEmitterContext context) => EmitDiv(context, unsigned: false);
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public static void Udiv(ArmEmitterContext context) => EmitDiv(context, unsigned: true);
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private static void EmitDiv(ArmEmitterContext context, bool unsigned)
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{
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OpCodeAluBinary op = (OpCodeAluBinary)context.CurrOp;
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// If Rm == 0, Rd = 0 (division by zero).
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Operand n = GetIntOrZR(context, op.Rn);
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Operand m = GetIntOrZR(context, op.Rm);
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Operand divisorIsZero = context.ICompareEqual(m, Const(m.Type, 0));
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Operand lblBadDiv = Label();
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Operand lblEnd = Label();
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context.BranchIfTrue(lblBadDiv, divisorIsZero);
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if (!unsigned)
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{
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// If Rn == INT_MIN && Rm == -1, Rd = INT_MIN (overflow).
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bool is32Bits = op.RegisterSize == RegisterSize.Int32;
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Operand intMin = is32Bits ? Const(int.MinValue) : Const(long.MinValue);
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Operand minus1 = is32Bits ? Const(-1) : Const(-1L);
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Operand nIsIntMin = context.ICompareEqual(n, intMin);
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Operand mIsMinus1 = context.ICompareEqual(m, minus1);
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Operand lblGoodDiv = Label();
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context.BranchIfFalse(lblGoodDiv, context.BitwiseAnd(nIsIntMin, mIsMinus1));
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SetAluDOrZR(context, intMin);
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context.Branch(lblEnd);
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context.MarkLabel(lblGoodDiv);
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}
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Operand d = unsigned
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? context.DivideUI(n, m)
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: context.Divide (n, m);
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SetAluDOrZR(context, d);
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context.Branch(lblEnd);
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context.MarkLabel(lblBadDiv);
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SetAluDOrZR(context, Const(op.GetOperandType(), 0));
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context.MarkLabel(lblEnd);
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}
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}
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}
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