mirror of https://github.com/Ryujinx/Ryujinx.git
WIP sparse stuff
This commit is contained in:
riperiperi
parent
dcfd4af436
commit
3763e2cc10
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@ -1,7 +1,10 @@
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using ARMeilleure.Diagnostics;
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using Ryujinx.Memory;
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using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Runtime.InteropServices;
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using System.Threading;
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namespace ARMeilleure.Common
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{
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@ -11,6 +14,12 @@ namespace ARMeilleure.Common
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/// <typeparam name="TEntry">Type of the value</typeparam>
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public unsafe class AddressTable<TEntry> : IDisposable where TEntry : unmanaged
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{
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/// <summary>
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/// If true, the sparse 2-level table should be used to improve performance.
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/// If false, the platform doesn't properly support it, or will be negatively impacted.
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/// </summary>
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public static bool UseSparseTable => true;
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/// <summary>
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/// Represents a level in an <see cref="AddressTable{TEntry}"/>.
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/// </summary>
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@ -53,12 +62,33 @@ namespace ARMeilleure.Common
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}
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}
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private readonly struct AddressTablePage
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{
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public readonly bool IsSparse;
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public readonly IntPtr Address;
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public AddressTablePage(bool isSparse, IntPtr address)
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{
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IsSparse = isSparse;
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Address = address;
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}
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}
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private bool _disposed;
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private TEntry** _table;
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private readonly List<IntPtr> _pages;
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private readonly TEntry* _fallbackTable;
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private readonly List<AddressTablePage> _pages;
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private TEntry _fill;
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private readonly bool _sparse;
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private readonly MemoryBlock _sparseFill;
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private readonly SparseMemoryBlock _fillBottomLevel;
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private readonly TEntry* _fillBottomLevelPtr;
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private readonly List<SparseMemoryBlock> _sparseReserved;
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private readonly ulong _sparseBlockSize;
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private readonly ReaderWriterLockSlim _sparseLock;
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private ulong _sparseReservedOffset;
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/// <summary>
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/// Gets the bits used by the <see cref="Levels"/> of the <see cref="AddressTable{TEntry}"/> instance.
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/// </summary>
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@ -80,8 +110,7 @@ namespace ARMeilleure.Common
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}
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set
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{
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*_fallbackTable = value;
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_fill = value;
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UpdateFill(value);
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}
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}
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@ -102,26 +131,15 @@ namespace ARMeilleure.Common
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}
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}
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/// <summary>
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/// Gets a pointer to a single entry table containing only the leaf fill value.
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/// </summary>
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public IntPtr Fallback
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{
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get
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{
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ObjectDisposedException.ThrowIf(_disposed, this);
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return (IntPtr)_fallbackTable;
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}
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}
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/// <summary>
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/// Constructs a new instance of the <see cref="AddressTable{TEntry}"/> class with the specified list of
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/// <see cref="Level"/>.
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/// </summary>
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/// <param name="levels">Levels for the address table</param>
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/// <param name="sparse">True if the bottom page should be sparsely mapped</param>
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/// <exception cref="ArgumentNullException"><paramref name="levels"/> is null</exception>
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/// <exception cref="ArgumentException">Length of <paramref name="levels"/> is less than 2</exception>
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public AddressTable(Level[] levels)
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public AddressTable(Level[] levels, bool sparse)
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{
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ArgumentNullException.ThrowIfNull(levels);
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@ -130,7 +148,7 @@ namespace ARMeilleure.Common
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throw new ArgumentException("Table must be at least 2 levels deep.", nameof(levels));
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}
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_pages = new List<IntPtr>(capacity: 16);
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_pages = new List<AddressTablePage>(capacity: 16);
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Levels = levels;
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Mask = 0;
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@ -140,7 +158,35 @@ namespace ARMeilleure.Common
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Mask |= level.Mask;
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}
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_fallbackTable = (TEntry*)NativeAllocator.Instance.Allocate((ulong)sizeof(TEntry));
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_sparse = sparse;
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if (sparse)
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{
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// If the address table is sparse, allocate a fill block
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_sparseFill = new MemoryBlock(65536, MemoryAllocationFlags.Mirrorable);
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ulong bottomLevelSize = (1ul << levels.Last().Length) * (ulong)sizeof(TEntry);
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_fillBottomLevel = new SparseMemoryBlock(bottomLevelSize, null, _sparseFill);
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_fillBottomLevelPtr = (TEntry*)_fillBottomLevel.Block.Pointer;
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_sparseReserved = new List<SparseMemoryBlock>();
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_sparseLock = new ReaderWriterLockSlim();
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_sparseBlockSize = bottomLevelSize << 3;
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}
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}
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private void UpdateFill(TEntry fillValue)
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{
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if (_sparseFill != null)
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{
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Span<byte> span = _sparseFill.GetSpan(0, (int)_sparseFill.Size);
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MemoryMarshal.Cast<byte, TEntry>(span).Fill(fillValue);
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}
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_fill = fillValue;
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}
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/// <summary>
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@ -172,7 +218,13 @@ namespace ARMeilleure.Common
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lock (_pages)
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{
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return ref GetPage(address)[Levels[^1].GetValue(address)];
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TEntry* page = GetPage(address);
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int index = Levels[^1].GetValue(address);
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EnsureMapped((IntPtr)(page + index));
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return ref page[index];
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}
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}
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@ -190,13 +242,18 @@ namespace ARMeilleure.Common
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ref Level level = ref Levels[i];
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ref TEntry* nextPage = ref page[level.GetValue(address)];
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if (nextPage == null)
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if (nextPage == null || nextPage == _fillBottomLevelPtr)
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{
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ref Level nextLevel = ref Levels[i + 1];
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nextPage = i == Levels.Length - 2 ?
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(TEntry*)Allocate(1 << nextLevel.Length, Fill, leaf: true) :
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(TEntry*)Allocate(1 << nextLevel.Length, IntPtr.Zero, leaf: false);
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if (i == Levels.Length - 2)
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{
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nextPage = (TEntry*)Allocate(1 << nextLevel.Length, Fill, leaf: true);
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}
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else
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{
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nextPage = (TEntry*)Allocate(1 << nextLevel.Length, GetFillValue(i), leaf: false);
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}
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}
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page = (TEntry**)nextPage;
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@ -205,6 +262,46 @@ namespace ARMeilleure.Common
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return (TEntry*)page;
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}
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private void EnsureMapped(IntPtr ptr)
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{
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if (_sparse)
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{
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// Check sparse allocations to see if the pointer is in any of them.
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// Ensure the page is committed if there's a match.
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_sparseLock.EnterReadLock();
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try
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{
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foreach (SparseMemoryBlock sparse in _sparseReserved)
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{
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if (ptr >= sparse.Block.Pointer && ptr < sparse.Block.Pointer + (IntPtr)sparse.Block.Size)
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{
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sparse.EnsureMapped((ulong)(ptr - sparse.Block.Pointer));
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break;
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}
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}
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}
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finally
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{
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_sparseLock.ExitReadLock();
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}
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}
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}
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private IntPtr GetFillValue(int level)
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{
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if (_fillBottomLevel != null && level == Levels.Length - 2)
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{
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return (IntPtr)_fillBottomLevelPtr;
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}
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else
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{
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return IntPtr.Zero;
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}
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}
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/// <summary>
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/// Lazily initialize and get the root page of the <see cref="AddressTable{TEntry}"/>.
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/// </summary>
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@ -213,12 +310,17 @@ namespace ARMeilleure.Common
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{
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if (_table == null)
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{
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_table = (TEntry**)Allocate(1 << Levels[0].Length, fill: IntPtr.Zero, leaf: false);
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_table = (TEntry**)Allocate(1 << Levels[0].Length, GetFillValue(0), leaf: false);
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}
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return _table;
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}
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private void InitLeafPage(Span<byte> page)
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{
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MemoryMarshal.Cast<byte, TEntry>(page).Fill(_fill);
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}
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/// <summary>
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/// Allocates a block of memory of the specified type and length.
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/// </summary>
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@ -230,16 +332,42 @@ namespace ARMeilleure.Common
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private IntPtr Allocate<T>(int length, T fill, bool leaf) where T : unmanaged
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{
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var size = sizeof(T) * length;
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var page = (IntPtr)NativeAllocator.Instance.Allocate((uint)size);
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var span = new Span<T>((void*)page, length);
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span.Fill(fill);
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AddressTablePage page;
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if (_sparse && leaf)
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{
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_sparseLock.EnterWriteLock();
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if (_sparseReserved.Count == 0 || _sparseReservedOffset == _sparseBlockSize)
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{
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_sparseReserved.Add(new SparseMemoryBlock(_sparseBlockSize, InitLeafPage, _sparseFill));
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_sparseReservedOffset = 0;
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}
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SparseMemoryBlock block = _sparseReserved.Last();
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page = new AddressTablePage(true, block.Block.Pointer + (IntPtr)_sparseReservedOffset);
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_sparseReservedOffset += (ulong)size;
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_sparseLock.ExitWriteLock();
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}
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else
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{
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var address = (IntPtr)NativeAllocator.Instance.Allocate((uint)size);
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page = new AddressTablePage(false, address);
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var span = new Span<T>((void*)page.Address, length);
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span.Fill(fill);
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}
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_pages.Add(page);
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TranslatorEventSource.Log.AddressTableAllocated(size, leaf);
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return page;
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return page.Address;
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}
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/// <summary>
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@ -262,10 +390,23 @@ namespace ARMeilleure.Common
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{
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foreach (var page in _pages)
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{
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Marshal.FreeHGlobal(page);
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if (!page.IsSparse)
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{
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Marshal.FreeHGlobal(page.Address);
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}
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}
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Marshal.FreeHGlobal((IntPtr)_fallbackTable);
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if (_sparse)
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{
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foreach (SparseMemoryBlock block in _sparseReserved)
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{
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block.Dispose();
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}
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_fillBottomLevel.Dispose();
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_sparseFill.Dispose();
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_sparseLock.Dispose();
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}
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_disposed = true;
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}
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@ -231,18 +231,7 @@ namespace ARMeilleure.Instructions
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Const(3)
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);
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// TODO: could possibly make a fallback page that level 1 is filled with that contains dispatch stub on all pages
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// Would save this load and the comparisons
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// 16MB of the same value is a bit wasteful so it could replicate with remapping.
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Operand fallback = !context.HasPtc ?
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Const((long)context.FunctionTable.Fallback) :
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Const((long)context.FunctionTable.Fallback, Ptc.DispatchFallbackSymbol);
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Operand pageIsZero = context.ICompareEqual(page, Const(0L));
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// Small trick to keep this branchless - if the page is zero, load a fallback table entry that always contains the dispatch stub.
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hostAddress = context.Load(OperandType.I64, context.ConditionalSelect(pageIsZero, fallback, context.Add(page, index2)));
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hostAddress = context.Load(OperandType.I64, context.Add(page, index2));
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}
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else
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{
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@ -29,7 +29,7 @@ namespace ARMeilleure.Translation.PTC
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private const string OuterHeaderMagicString = "PTCohd\0\0";
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private const string InnerHeaderMagicString = "PTCihd\0\0";
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private const uint InternalVersion = 26950; //! To be incremented manually for each change to the ARMeilleure project.
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private const uint InternalVersion = 26957; //! To be incremented manually for each change to the ARMeilleure project.
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private const string ActualDir = "0";
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private const string BackupDir = "1";
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@ -41,7 +41,6 @@ namespace ARMeilleure.Translation.PTC
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public static readonly Symbol CountTableSymbol = new(SymbolType.Special, 2);
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public static readonly Symbol DispatchStubSymbol = new(SymbolType.Special, 3);
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public static readonly Symbol FunctionTableSymbol = new(SymbolType.Special, 4);
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public static readonly Symbol DispatchFallbackSymbol = new(SymbolType.Special, 5);
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private const byte FillingByte = 0x00;
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private const CompressionLevel SaveCompressionLevel = CompressionLevel.Fastest;
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@ -711,10 +710,6 @@ namespace ARMeilleure.Translation.PTC
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{
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imm = translator.FunctionTable.Base;
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}
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else if (symbol == DispatchFallbackSymbol)
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{
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imm = translator.FunctionTable.Fallback;
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}
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if (imm == null)
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{
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@ -22,8 +22,6 @@ namespace ARMeilleure.Translation
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{
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public class Translator
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{
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private const bool UseSparseTable = true;
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private static readonly AddressTable<ulong>.Level[] _levels64Bit =
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new AddressTable<ulong>.Level[]
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{
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@ -88,7 +86,9 @@ namespace ARMeilleure.Translation
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AddressTable<ulong>.Level[] levels;
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if (UseSparseTable)
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bool useSparseTable = AddressTable<ulong>.UseSparseTable;
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if (useSparseTable)
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{
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levels = for64Bits ? _levels64BitSparse : _levels32BitSparse;
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}
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@ -99,7 +99,7 @@ namespace ARMeilleure.Translation
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CountTable = new EntryTable<uint>();
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Functions = new TranslatorCache<TranslatedFunction>();
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FunctionTable = new AddressTable<ulong>(levels);
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FunctionTable = new AddressTable<ulong>(levels, useSparseTable);
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Stubs = new TranslatorStubs(FunctionTable);
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FunctionTable.Fill = (ulong)Stubs.SlowDispatchStub;
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@ -214,18 +214,9 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
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asm.Ubfx(indexReg, guestAddress, level1.Index, level1.Length);
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asm.Lsl(indexReg, indexReg, Const(3));
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// Is the page address zero? Make sure to use the fallback if it is.
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asm.Tst(rn, rn);
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// Index into the page.
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asm.Add(rn, rn, indexReg);
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// Reuse the index register for the fallback
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ulong fallback = (ulong)funcTable.Fallback;
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asm.Mov(indexReg, fallback);
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asm.Csel(rn, indexReg, rn, ArmCondition.Eq);
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// Load the final branch address
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asm.LdrRiUn(rn, rn, 0);
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|
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@ -385,12 +385,6 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
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// Index into the page.
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asm.Add(rn, rn, indexReg);
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// Reuse the index register for the fallback
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ulong fallback = (ulong)funcTable.Fallback;
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asm.Mov(indexReg, fallback);
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asm.Csel(rn, indexReg, rn, ArmCondition.Eq);
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// Load the final branch address
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asm.LdrRiUn(rn, rn, 0);
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|
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@ -16,8 +16,6 @@ namespace Ryujinx.Cpu.LightningJit
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{
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class Translator : IDisposable
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{
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private const bool UseSparseTable = true;
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// Should be enabled on platforms that enforce W^X.
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private static bool IsNoWxPlatform => false;
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@ -78,9 +76,11 @@ namespace Ryujinx.Cpu.LightningJit
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JitCache.Initialize(new JitMemoryAllocator(forJit: true));
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}
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bool useSparseTable = AddressTable<ulong>.UseSparseTable;
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AddressTable<ulong>.Level[] levels;
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if (UseSparseTable)
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if (useSparseTable)
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{
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levels = for64Bits ? _levels64BitSparse : _levels32BitSparse;
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}
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@ -90,7 +90,7 @@ namespace Ryujinx.Cpu.LightningJit
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}
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Functions = new TranslatorCache<TranslatedFunction>();
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FunctionTable = new AddressTable<ulong>(levels);
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FunctionTable = new AddressTable<ulong>(levels, useSparseTable);
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Stubs = new TranslatorStubs(FunctionTable, _noWxCache);
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FunctionTable.Fill = (ulong)Stubs.SlowDispatchStub;
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|
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@ -0,0 +1,120 @@
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using Ryujinx.Common;
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using System;
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using System.Collections.Generic;
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using System.Linq;
|
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|
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namespace Ryujinx.Memory
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{
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public delegate void PageInitDelegate(Span<byte> page);
|
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|
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public class SparseMemoryBlock : IDisposable
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{
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private const ulong MapGranularity = 1UL << 17;
|
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|
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private readonly PageInitDelegate _pageInit;
|
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|
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private readonly object _lock = new object();
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private readonly ulong _pageSize;
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private readonly MemoryBlock _reservedBlock;
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private readonly List<MemoryBlock> _mappedBlocks;
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private ulong _mappedBlockUsage;
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|
||||
private readonly ulong[] _mappedPageBitmap;
|
||||
|
||||
public MemoryBlock Block => _reservedBlock;
|
||||
|
||||
public SparseMemoryBlock(ulong size, PageInitDelegate pageInit, MemoryBlock fill)
|
||||
{
|
||||
_pageSize = MemoryBlock.GetPageSize();
|
||||
_reservedBlock = new MemoryBlock(size, MemoryAllocationFlags.Reserve | MemoryAllocationFlags.ViewCompatible);
|
||||
_mappedBlocks = new List<MemoryBlock>();
|
||||
_pageInit = pageInit;
|
||||
|
||||
int pages = (int)BitUtils.DivRoundUp(size, _pageSize);
|
||||
int bitmapEntries = BitUtils.DivRoundUp(pages, 64);
|
||||
_mappedPageBitmap = new ulong[bitmapEntries];
|
||||
|
||||
if (fill != null)
|
||||
{
|
||||
// Fill the block with mappings from the fill block.
|
||||
|
||||
if (fill.Size % _pageSize != 0)
|
||||
{
|
||||
throw new ArgumentException("Fill memory block should be page aligned.", nameof(fill));
|
||||
}
|
||||
|
||||
int repeats = (int)BitUtils.DivRoundUp(size, fill.Size);
|
||||
|
||||
ulong offset = 0;
|
||||
for (int i = 0; i < repeats; i++)
|
||||
{
|
||||
_reservedBlock.MapView(fill, 0, offset, Math.Min(fill.Size, size - offset));
|
||||
offset += fill.Size;
|
||||
}
|
||||
}
|
||||
|
||||
// If a fill block isn't provided, the pages that aren't EnsureMapped are unmapped.
|
||||
// The caller can rely on signal handler to fill empty pages instead.
|
||||
}
|
||||
|
||||
private void MapPage(ulong pageOffset)
|
||||
{
|
||||
// Take a page from the latest mapped block.
|
||||
MemoryBlock block = _mappedBlocks.LastOrDefault();
|
||||
|
||||
if (block == null || _mappedBlockUsage == MapGranularity)
|
||||
{
|
||||
// Need to map some more memory.
|
||||
|
||||
block = new MemoryBlock(MapGranularity, MemoryAllocationFlags.Mirrorable | MemoryAllocationFlags.NoMap);
|
||||
|
||||
_mappedBlocks.Add(block);
|
||||
|
||||
_mappedBlockUsage = 0;
|
||||
}
|
||||
|
||||
_reservedBlock.MapView(block, _mappedBlockUsage, pageOffset, _pageSize);
|
||||
_pageInit(_reservedBlock.GetSpan(pageOffset, (int)_pageSize));
|
||||
|
||||
_mappedBlockUsage += _pageSize;
|
||||
}
|
||||
|
||||
public void EnsureMapped(ulong offset)
|
||||
{
|
||||
int pageIndex = (int)(offset / _pageSize);
|
||||
int bitmapIndex = pageIndex >> 6;
|
||||
|
||||
ref ulong entry = ref _mappedPageBitmap[bitmapIndex];
|
||||
ulong bit = 1UL << (pageIndex & 63);
|
||||
|
||||
if ((entry & bit) == 0)
|
||||
{
|
||||
// Not mapped.
|
||||
|
||||
lock (_lock)
|
||||
{
|
||||
// Check the bit while locked to make sure that this only happens once.
|
||||
|
||||
if ((entry & bit) == 0)
|
||||
{
|
||||
MapPage(offset & ~(_pageSize - 1));
|
||||
|
||||
entry |= bit;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
public void Dispose()
|
||||
{
|
||||
_reservedBlock.Dispose();
|
||||
|
||||
foreach (MemoryBlock block in _mappedBlocks)
|
||||
{
|
||||
block.Dispose();
|
||||
}
|
||||
|
||||
GC.SuppressFinalize(this);
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue