unit si_ci_vi_merged_offset; interface {$mode objfpc}{$H+} const mmGRBM_CNTL =$2000; mmGRBM_SKEW_CNTL =$2001; mmGRBM_STATUS2 =$2002; mmGRBM_PWR_CNTL =$2003; mmGRBM_STATUS =$2004; mmGRBM_STATUS_SE0 =$2005; mmGRBM_STATUS_SE1 =$2006; mmGRBM_SOFT_RESET =$2008; mmGRBM_DEBUG_CNTL =$2009; mmGRBM_DEBUG_DATA =$200A; mmGRBM_GFX_CLKEN_CNTL =$200C; mmGRBM_WAIT_IDLE_CLOCKS =$200D; mmGRBM_STATUS_SE2 =$200E; mmGRBM_STATUS_SE3 =$200F; mmGRBM_DEBUG =$2014; mmGRBM_DEBUG_SNAPSHOT =$2015; mmGRBM_READ_ERROR =$2016; mmGRBM_READ_ERROR2 =$2017; mmGRBM_INT_CNTL =$2018; mmGRBM_TRAP_OP =$2019; mmGRBM_TRAP_ADDR =$201A; mmGRBM_TRAP_ADDR_MSK =$201B; mmGRBM_TRAP_WD =$201C; mmGRBM_TRAP_WD_MSK =$201D; mmGRBM_DSM_BYPASS =$201E; mmGRBM_WRITE_ERROR =$201F; mmGRBM_NOWHERE =$203F; mmGRBM_SCRATCH_REG0 =$2040; mmGRBM_SCRATCH_REG1 =$2041; mmGRBM_SCRATCH_REG2 =$2042; mmGRBM_SCRATCH_REG3 =$2043; mmGRBM_SCRATCH_REG4 =$2044; mmGRBM_SCRATCH_REG5 =$2045; mmGRBM_SCRATCH_REG6 =$2046; mmGRBM_SCRATCH_REG7 =$2047; mmVGT_VTX_VECT_EJECT_REG =$222C; mmVGT_DMA_DATA_FIFO_DEPTH =$222D; mmVGT_DMA_REQ_FIFO_DEPTH =$222E; mmVGT_DRAW_INIT_FIFO_DEPTH =$222F; mmVGT_LAST_COPY_STATE =$2230; mmVGT_CACHE_INVALIDATION =$2231; mmVGT_RESET_DEBUG =$2232; mmVGT_STRMOUT_DELAY =$2233; mmVGT_FIFO_DEPTHS =$2234; mmVGT_GS_VERTEX_REUSE =$2235; mmVGT_MC_LAT_CNTL =$2236; mmIA_CNTL_STATUS =$2237; mmVGT_DEBUG_CNTL =$2238; mmVGT_DEBUG_DATA =$2239; mmIA_DEBUG_CNTL =$223A; mmIA_DEBUG_DATA =$223B; mmVGT_CNTL_STATUS =$223C; mmVGT_SYS_CONFIG =$2263; mmVGT_VS_MAX_WAVE_ID =$2268; mmVGT_DMA_PRIMITIVE_TYPE =$2271; mmVGT_DMA_CONTROL =$2272; mmVGT_DMA_LS_HS_CONFIG =$2273; mmPA_SU_DEBUG_CNTL =$2280; mmPA_SU_DEBUG_DATA =$2281; mmPA_CL_CNTL_STATUS =$2284; mmPA_CL_ENHANCE =$2285; mmPA_CL_RESET_DEBUG =$2286; mmPA_SU_CNTL_STATUS =$2294; mmPA_SC_FIFO_DEPTH_CNTL =$2295; mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK =$22C0; mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK =$22C1; mmPA_SC_TRAP_SCREEN_HV_LOCK =$22C2; mmPA_SC_FORCE_EOV_MAX_CNTS =$22C9; mmPA_SC_FIFO_SIZE =$22F3; mmPA_SC_IF_FIFO_SIZE =$22F5; mmPA_SC_DEBUG_CNTL =$22F6; mmPA_SC_DEBUG_DATA =$22F7; mmPA_SC_ENHANCE =$22FC; mmSPI_PS_MAX_WAVE_ID =$243A; mmSPI_START_PHASE =$243B; mmSPI_GFX_CNTL =$243C; mmSPI_CONFIG_CNTL =$2440; mmSPI_DEBUG_CNTL =$2441; mmSPI_DEBUG_READ =$2442; mmSPI_DSM_CNTL =$2443; mmSPI_EDC_CNT =$2444; mmSPI_CONFIG_CNTL_1 =$244F; mmSPI_DEBUG_BUSY =$2450; mmSPI_CONFIG_CNTL_2 =$2451; mmSPI_WF_LIFETIME_CNTL =$24AA; mmSPI_WF_LIFETIME_LIMIT_0 =$24AB; mmSPI_WF_LIFETIME_LIMIT_1 =$24AC; mmSPI_WF_LIFETIME_LIMIT_2 =$24AD; mmSPI_WF_LIFETIME_LIMIT_3 =$24AE; mmSPI_WF_LIFETIME_LIMIT_4 =$24AF; mmSPI_WF_LIFETIME_LIMIT_5 =$24B0; mmSPI_WF_LIFETIME_LIMIT_6 =$24B1; mmSPI_WF_LIFETIME_LIMIT_7 =$24B2; mmSPI_WF_LIFETIME_LIMIT_8 =$24B3; mmSPI_WF_LIFETIME_LIMIT_9 =$24B4; mmSPI_WF_LIFETIME_STATUS_0 =$24B5; mmSPI_WF_LIFETIME_STATUS_1 =$24B6; mmSPI_WF_LIFETIME_STATUS_2 =$24B7; mmSPI_WF_LIFETIME_STATUS_3 =$24B8; mmSPI_WF_LIFETIME_STATUS_4 =$24B9; mmSPI_WF_LIFETIME_STATUS_5 =$24BA; mmSPI_WF_LIFETIME_STATUS_6 =$24BB; mmSPI_WF_LIFETIME_STATUS_7 =$24BC; mmSPI_WF_LIFETIME_STATUS_8 =$24BD; mmSPI_WF_LIFETIME_STATUS_9 =$24BE; mmSPI_WF_LIFETIME_STATUS_10 =$24BF; mmSPI_WF_LIFETIME_STATUS_11 =$24C0; mmSPI_WF_LIFETIME_STATUS_12 =$24C1; mmSPI_WF_LIFETIME_STATUS_13 =$24C2; mmSPI_WF_LIFETIME_STATUS_14 =$24C3; mmSPI_WF_LIFETIME_STATUS_15 =$24C4; mmSPI_WF_LIFETIME_STATUS_16 =$24C5; mmSPI_WF_LIFETIME_STATUS_17 =$24C6; mmSPI_WF_LIFETIME_STATUS_18 =$24C7; mmSPI_WF_LIFETIME_STATUS_19 =$24C8; mmSPI_WF_LIFETIME_STATUS_20 =$24C9; mmSPI_WF_LIFETIME_DEBUG =$24CA; mmSPI_SLAVE_DEBUG_BUSY =$24D3; mmSPI_LB_CTR_CTRL =$24D4; mmSPI_LB_CU_MASK =$24D5; mmSPI_LB_DATA_REG =$24D6; mmSPI_PG_ENABLE_STATIC_CU_MASK =$24D7; mmSPI_GDS_CREDITS =$24D8; mmSPI_SX_EXPORT_BUFFER_SIZES =$24D9; mmSPI_SX_SCOREBOARD_BUFFER_SIZES =$24DA; mmSPI_CSQ_WF_ACTIVE_STATUS =$24DB; mmSPI_CSQ_WF_ACTIVE_COUNT_0 =$24DC; mmSPI_CSQ_WF_ACTIVE_COUNT_1 =$24DD; mmSPI_CSQ_WF_ACTIVE_COUNT_2 =$24DE; mmSPI_CSQ_WF_ACTIVE_COUNT_3 =$24DF; mmSPI_CSQ_WF_ACTIVE_COUNT_4 =$24E0; mmSPI_CSQ_WF_ACTIVE_COUNT_5 =$24E1; mmSPI_CSQ_WF_ACTIVE_COUNT_6 =$24E2; mmSPI_CSQ_WF_ACTIVE_COUNT_7 =$24E3; mmSPI_P0_TRAP_SCREEN_PSBA_LO =$24EC; mmSPI_P0_TRAP_SCREEN_PSBA_HI =$24ED; mmSPI_P0_TRAP_SCREEN_PSMA_LO =$24EE; mmSPI_P0_TRAP_SCREEN_PSMA_HI =$24EF; mmSPI_P0_TRAP_SCREEN_GPR_MIN =$24F0; mmSPI_P1_TRAP_SCREEN_PSBA_LO =$24F1; mmSPI_P1_TRAP_SCREEN_PSBA_HI =$24F2; mmSPI_P1_TRAP_SCREEN_PSMA_LO =$24F3; mmSPI_P1_TRAP_SCREEN_PSMA_HI =$24F4; mmSPI_P1_TRAP_SCREEN_GPR_MIN =$24F5; mmDB_DEBUG =$260C; mmDB_DEBUG2 =$260D; mmDB_DEBUG3 =$260E; mmDB_DEBUG4 =$260F; mmDB_CREDIT_LIMIT =$2614; mmDB_WATERMARKS =$2615; mmDB_SUBTILE_CONTROL =$2616; mmDB_FREE_CACHELINES =$2617; mmDB_FIFO_DEPTH1 =$2618; mmDB_FIFO_DEPTH2 =$2619; mmDB_RING_CONTROL =$261B; mmDB_READ_DEBUG_0 =$2620; mmDB_READ_DEBUG_1 =$2621; mmDB_READ_DEBUG_2 =$2622; mmDB_READ_DEBUG_3 =$2623; mmDB_READ_DEBUG_4 =$2624; mmDB_READ_DEBUG_5 =$2625; mmDB_READ_DEBUG_6 =$2626; mmDB_READ_DEBUG_7 =$2627; mmDB_READ_DEBUG_8 =$2628; mmDB_READ_DEBUG_9 =$2629; mmDB_READ_DEBUG_A =$262A; mmDB_READ_DEBUG_B =$262B; mmDB_READ_DEBUG_C =$262C; mmDB_READ_DEBUG_D =$262D; mmDB_READ_DEBUG_E =$262E; mmDB_READ_DEBUG_F =$262F; mmGB_ADDR_CONFIG =$263E; mmGB_BACKEND_MAP =$263F; mmGB_GPU_ID =$2640; mmGB_TILE_MODE0 =$2644; mmGB_TILE_MODE1 =$2645; mmGB_TILE_MODE2 =$2646; mmGB_TILE_MODE3 =$2647; mmGB_TILE_MODE4 =$2648; mmGB_TILE_MODE5 =$2649; mmGB_TILE_MODE6 =$264A; mmGB_TILE_MODE7 =$264B; mmGB_TILE_MODE8 =$264C; mmGB_TILE_MODE9 =$264D; mmGB_TILE_MODE10 =$264E; mmGB_TILE_MODE11 =$264F; mmGB_TILE_MODE12 =$2650; mmGB_TILE_MODE13 =$2651; mmGB_TILE_MODE14 =$2652; mmGB_TILE_MODE15 =$2653; mmGB_TILE_MODE16 =$2654; mmGB_TILE_MODE17 =$2655; mmGB_TILE_MODE18 =$2656; mmGB_TILE_MODE19 =$2657; mmGB_TILE_MODE20 =$2658; mmGB_TILE_MODE21 =$2659; mmGB_TILE_MODE22 =$265A; mmGB_TILE_MODE23 =$265B; mmGB_TILE_MODE24 =$265C; mmGB_TILE_MODE25 =$265D; mmGB_TILE_MODE26 =$265E; mmGB_TILE_MODE27 =$265F; mmGB_TILE_MODE28 =$2660; mmGB_TILE_MODE29 =$2661; mmGB_TILE_MODE30 =$2662; mmGB_TILE_MODE31 =$2663; mmGB_MACROTILE_MODE0 =$2664; mmGB_MACROTILE_MODE1 =$2665; mmGB_MACROTILE_MODE2 =$2666; mmGB_MACROTILE_MODE3 =$2667; mmGB_MACROTILE_MODE4 =$2668; mmGB_MACROTILE_MODE5 =$2669; mmGB_MACROTILE_MODE6 =$266A; mmGB_MACROTILE_MODE7 =$266B; mmGB_MACROTILE_MODE8 =$266C; mmGB_MACROTILE_MODE9 =$266D; mmGB_MACROTILE_MODE10 =$266E; mmGB_MACROTILE_MODE11 =$266F; mmGB_MACROTILE_MODE12 =$2670; mmGB_MACROTILE_MODE13 =$2671; mmGB_MACROTILE_MODE14 =$2672; mmGB_MACROTILE_MODE15 =$2673; mmCB_HW_CONTROL_3 =$2683; mmCB_HW_CONTROL =$2684; mmCB_HW_CONTROL_1 =$2685; mmCB_HW_CONTROL_2 =$2686; mmCB_DCC_CONFIG =$2687; mmCB_DEBUG_BUS_1 =$2699; mmCB_DEBUG_BUS_2 =$269A; mmCB_DEBUG_BUS_13 =$26A5; mmCB_DEBUG_BUS_14 =$26A6; mmCB_DEBUG_BUS_15 =$26A7; mmCB_DEBUG_BUS_16 =$26A8; mmCB_DEBUG_BUS_17 =$26A9; mmCB_DEBUG_BUS_18 =$26AA; mmCB_DEBUG_BUS_19 =$26AB; mmCB_DEBUG_BUS_20 =$26AC; mmCB_DEBUG_BUS_21 =$26AD; mmCB_DEBUG_BUS_22 =$26AE; mmSPI_SHADER_TBA_LO_PS =$2C00; mmSPI_SHADER_TBA_HI_PS =$2C01; mmSPI_SHADER_TMA_LO_PS =$2C02; mmSPI_SHADER_TMA_HI_PS =$2C03; mmSPI_SHADER_PGM_RSRC3_PS =$2C07; mmSPI_SHADER_PGM_LO_PS =$2C08; mmSPI_SHADER_PGM_HI_PS =$2C09; mmSPI_SHADER_PGM_RSRC1_PS =$2C0A; mmSPI_SHADER_PGM_RSRC2_PS =$2C0B; mmSPI_SHADER_USER_DATA_PS_0 =$2C0C; mmSPI_SHADER_USER_DATA_PS_1 =$2C0D; mmSPI_SHADER_USER_DATA_PS_2 =$2C0E; mmSPI_SHADER_USER_DATA_PS_3 =$2C0F; mmSPI_SHADER_USER_DATA_PS_4 =$2C10; mmSPI_SHADER_USER_DATA_PS_5 =$2C11; mmSPI_SHADER_USER_DATA_PS_6 =$2C12; mmSPI_SHADER_USER_DATA_PS_7 =$2C13; mmSPI_SHADER_USER_DATA_PS_8 =$2C14; mmSPI_SHADER_USER_DATA_PS_9 =$2C15; mmSPI_SHADER_USER_DATA_PS_10 =$2C16; mmSPI_SHADER_USER_DATA_PS_11 =$2C17; mmSPI_SHADER_USER_DATA_PS_12 =$2C18; mmSPI_SHADER_USER_DATA_PS_13 =$2C19; mmSPI_SHADER_USER_DATA_PS_14 =$2C1A; mmSPI_SHADER_USER_DATA_PS_15 =$2C1B; mmSPI_SHADER_TBA_LO_VS =$2C40; mmSPI_SHADER_TBA_HI_VS =$2C41; mmSPI_SHADER_TMA_LO_VS =$2C42; mmSPI_SHADER_TMA_HI_VS =$2C43; mmSPI_SHADER_PGM_RSRC3_VS =$2C46; mmSPI_SHADER_LATE_ALLOC_VS =$2C47; mmSPI_SHADER_PGM_LO_VS =$2C48; mmSPI_SHADER_PGM_HI_VS =$2C49; mmSPI_SHADER_PGM_RSRC1_VS =$2C4A; mmSPI_SHADER_PGM_RSRC2_VS =$2C4B; mmSPI_SHADER_USER_DATA_VS_0 =$2C4C; mmSPI_SHADER_USER_DATA_VS_1 =$2C4D; mmSPI_SHADER_USER_DATA_VS_2 =$2C4E; mmSPI_SHADER_USER_DATA_VS_3 =$2C4F; mmSPI_SHADER_USER_DATA_VS_4 =$2C50; mmSPI_SHADER_USER_DATA_VS_5 =$2C51; mmSPI_SHADER_USER_DATA_VS_6 =$2C52; mmSPI_SHADER_USER_DATA_VS_7 =$2C53; mmSPI_SHADER_USER_DATA_VS_8 =$2C54; mmSPI_SHADER_USER_DATA_VS_9 =$2C55; mmSPI_SHADER_USER_DATA_VS_10 =$2C56; mmSPI_SHADER_USER_DATA_VS_11 =$2C57; mmSPI_SHADER_USER_DATA_VS_12 =$2C58; mmSPI_SHADER_USER_DATA_VS_13 =$2C59; mmSPI_SHADER_USER_DATA_VS_14 =$2C5A; mmSPI_SHADER_USER_DATA_VS_15 =$2C5B; mmSPI_SHADER_PGM_RSRC2_ES_VS =$2C7C; mmSPI_SHADER_PGM_RSRC2_LS_VS =$2C7D; mmSPI_SHADER_TBA_LO_GS =$2C80; mmSPI_SHADER_TBA_HI_GS =$2C81; mmSPI_SHADER_TMA_LO_GS =$2C82; mmSPI_SHADER_TMA_HI_GS =$2C83; mmSPI_SHADER_PGM_RSRC3_GS =$2C87; mmSPI_SHADER_PGM_LO_GS =$2C88; mmSPI_SHADER_PGM_HI_GS =$2C89; mmSPI_SHADER_PGM_RSRC1_GS =$2C8A; mmSPI_SHADER_PGM_RSRC2_GS =$2C8B; mmSPI_SHADER_USER_DATA_GS_0 =$2C8C; mmSPI_SHADER_USER_DATA_GS_1 =$2C8D; mmSPI_SHADER_USER_DATA_GS_2 =$2C8E; mmSPI_SHADER_USER_DATA_GS_3 =$2C8F; mmSPI_SHADER_USER_DATA_GS_4 =$2C90; mmSPI_SHADER_USER_DATA_GS_5 =$2C91; mmSPI_SHADER_USER_DATA_GS_6 =$2C92; mmSPI_SHADER_USER_DATA_GS_7 =$2C93; mmSPI_SHADER_USER_DATA_GS_8 =$2C94; mmSPI_SHADER_USER_DATA_GS_9 =$2C95; mmSPI_SHADER_USER_DATA_GS_10 =$2C96; mmSPI_SHADER_USER_DATA_GS_11 =$2C97; mmSPI_SHADER_USER_DATA_GS_12 =$2C98; mmSPI_SHADER_USER_DATA_GS_13 =$2C99; mmSPI_SHADER_USER_DATA_GS_14 =$2C9A; mmSPI_SHADER_USER_DATA_GS_15 =$2C9B; mmSPI_SHADER_PGM_RSRC2_ES_GS =$2CBC; mmSPI_SHADER_TBA_LO_ES =$2CC0; mmSPI_SHADER_TBA_HI_ES =$2CC1; mmSPI_SHADER_TMA_LO_ES =$2CC2; mmSPI_SHADER_TMA_HI_ES =$2CC3; mmSPI_SHADER_PGM_RSRC3_ES =$2CC7; mmSPI_SHADER_PGM_LO_ES =$2CC8; mmSPI_SHADER_PGM_HI_ES =$2CC9; mmSPI_SHADER_PGM_RSRC1_ES =$2CCA; mmSPI_SHADER_PGM_RSRC2_ES =$2CCB; mmSPI_SHADER_USER_DATA_ES_0 =$2CCC; mmSPI_SHADER_USER_DATA_ES_1 =$2CCD; mmSPI_SHADER_USER_DATA_ES_2 =$2CCE; mmSPI_SHADER_USER_DATA_ES_3 =$2CCF; mmSPI_SHADER_USER_DATA_ES_4 =$2CD0; mmSPI_SHADER_USER_DATA_ES_5 =$2CD1; mmSPI_SHADER_USER_DATA_ES_6 =$2CD2; mmSPI_SHADER_USER_DATA_ES_7 =$2CD3; mmSPI_SHADER_USER_DATA_ES_8 =$2CD4; mmSPI_SHADER_USER_DATA_ES_9 =$2CD5; mmSPI_SHADER_USER_DATA_ES_10 =$2CD6; mmSPI_SHADER_USER_DATA_ES_11 =$2CD7; mmSPI_SHADER_USER_DATA_ES_12 =$2CD8; mmSPI_SHADER_USER_DATA_ES_13 =$2CD9; mmSPI_SHADER_USER_DATA_ES_14 =$2CDA; mmSPI_SHADER_USER_DATA_ES_15 =$2CDB; mmSPI_SHADER_PGM_RSRC2_LS_ES =$2CFD; mmSPI_SHADER_TBA_LO_HS =$2D00; mmSPI_SHADER_TBA_HI_HS =$2D01; mmSPI_SHADER_TMA_LO_HS =$2D02; mmSPI_SHADER_TMA_HI_HS =$2D03; mmSPI_SHADER_PGM_RSRC3_HS =$2D07; mmSPI_SHADER_PGM_LO_HS =$2D08; mmSPI_SHADER_PGM_HI_HS =$2D09; mmSPI_SHADER_PGM_RSRC1_HS =$2D0A; mmSPI_SHADER_PGM_RSRC2_HS =$2D0B; mmSPI_SHADER_USER_DATA_HS_0 =$2D0C; mmSPI_SHADER_USER_DATA_HS_1 =$2D0D; mmSPI_SHADER_USER_DATA_HS_2 =$2D0E; mmSPI_SHADER_USER_DATA_HS_3 =$2D0F; mmSPI_SHADER_USER_DATA_HS_4 =$2D10; mmSPI_SHADER_USER_DATA_HS_5 =$2D11; mmSPI_SHADER_USER_DATA_HS_6 =$2D12; mmSPI_SHADER_USER_DATA_HS_7 =$2D13; mmSPI_SHADER_USER_DATA_HS_8 =$2D14; mmSPI_SHADER_USER_DATA_HS_9 =$2D15; mmSPI_SHADER_USER_DATA_HS_10 =$2D16; mmSPI_SHADER_USER_DATA_HS_11 =$2D17; mmSPI_SHADER_USER_DATA_HS_12 =$2D18; mmSPI_SHADER_USER_DATA_HS_13 =$2D19; mmSPI_SHADER_USER_DATA_HS_14 =$2D1A; mmSPI_SHADER_USER_DATA_HS_15 =$2D1B; mmSPI_SHADER_PGM_RSRC2_LS_HS =$2D3D; mmSPI_SHADER_TBA_LO_LS =$2D40; mmSPI_SHADER_TBA_HI_LS =$2D41; mmSPI_SHADER_TMA_LO_LS =$2D42; mmSPI_SHADER_TMA_HI_LS =$2D43; mmSPI_SHADER_PGM_RSRC3_LS =$2D47; mmSPI_SHADER_PGM_LO_LS =$2D48; mmSPI_SHADER_PGM_HI_LS =$2D49; mmSPI_SHADER_PGM_RSRC1_LS =$2D4A; mmSPI_SHADER_PGM_RSRC2_LS =$2D4B; mmSPI_SHADER_USER_DATA_LS_0 =$2D4C; mmSPI_SHADER_USER_DATA_LS_1 =$2D4D; mmSPI_SHADER_USER_DATA_LS_2 =$2D4E; mmSPI_SHADER_USER_DATA_LS_3 =$2D4F; mmSPI_SHADER_USER_DATA_LS_4 =$2D50; mmSPI_SHADER_USER_DATA_LS_5 =$2D51; mmSPI_SHADER_USER_DATA_LS_6 =$2D52; mmSPI_SHADER_USER_DATA_LS_7 =$2D53; mmSPI_SHADER_USER_DATA_LS_8 =$2D54; mmSPI_SHADER_USER_DATA_LS_9 =$2D55; mmSPI_SHADER_USER_DATA_LS_10 =$2D56; mmSPI_SHADER_USER_DATA_LS_11 =$2D57; mmSPI_SHADER_USER_DATA_LS_12 =$2D58; mmSPI_SHADER_USER_DATA_LS_13 =$2D59; mmSPI_SHADER_USER_DATA_LS_14 =$2D5A; mmSPI_SHADER_USER_DATA_LS_15 =$2D5B; mmCOMPUTE_DISPATCH_INITIATOR =$2E00; mmCOMPUTE_DIM_X =$2E01; mmCOMPUTE_DIM_Y =$2E02; mmCOMPUTE_DIM_Z =$2E03; mmCOMPUTE_START_X =$2E04; mmCOMPUTE_START_Y =$2E05; mmCOMPUTE_START_Z =$2E06; mmCOMPUTE_NUM_THREAD_X =$2E07; mmCOMPUTE_NUM_THREAD_Y =$2E08; mmCOMPUTE_NUM_THREAD_Z =$2E09; mmCOMPUTE_PIPELINESTAT_ENABLE =$2E0A; mmCOMPUTE_PERFCOUNT_ENABLE =$2E0B; mmCOMPUTE_PGM_LO =$2E0C; mmCOMPUTE_PGM_HI =$2E0D; mmCOMPUTE_TBA_LO =$2E0E; mmCOMPUTE_TBA_HI =$2E0F; mmCOMPUTE_TMA_LO =$2E10; mmCOMPUTE_TMA_HI =$2E11; mmCOMPUTE_PGM_RSRC1 =$2E12; mmCOMPUTE_PGM_RSRC2 =$2E13; mmCOMPUTE_VMID =$2E14; mmCOMPUTE_RESOURCE_LIMITS =$2E15; mmCOMPUTE_STATIC_THREAD_MGMT_SE0 =$2E16; mmCOMPUTE_STATIC_THREAD_MGMT_SE1 =$2E17; mmCOMPUTE_TMPRING_SIZE =$2E18; mmCOMPUTE_STATIC_THREAD_MGMT_SE2 =$2E19; mmCOMPUTE_STATIC_THREAD_MGMT_SE3 =$2E1A; mmCOMPUTE_RESTART_X =$2E1B; mmCOMPUTE_RESTART_Y =$2E1C; mmCOMPUTE_RESTART_Z =$2E1D; mmCOMPUTE_THREAD_TRACE_ENABLE =$2E1E; mmCOMPUTE_MISC_RESERVED =$2E1F; mmCOMPUTE_DISPATCH_ID =$2E20; mmCOMPUTE_THREADGROUP_ID =$2E21; mmCOMPUTE_RELAUNCH =$2E22; mmCOMPUTE_WAVE_RESTORE_ADDR_LO =$2E23; mmCOMPUTE_WAVE_RESTORE_ADDR_HI =$2E24; mmCOMPUTE_WAVE_RESTORE_CONTROL =$2E25; mmCOMPUTE_USER_DATA_0 =$2E40; mmCOMPUTE_USER_DATA_1 =$2E41; mmCOMPUTE_USER_DATA_2 =$2E42; mmCOMPUTE_USER_DATA_3 =$2E43; mmCOMPUTE_USER_DATA_4 =$2E44; mmCOMPUTE_USER_DATA_5 =$2E45; mmCOMPUTE_USER_DATA_6 =$2E46; mmCOMPUTE_USER_DATA_7 =$2E47; mmCOMPUTE_USER_DATA_8 =$2E48; mmCOMPUTE_USER_DATA_9 =$2E49; mmCOMPUTE_USER_DATA_10 =$2E4A; mmCOMPUTE_USER_DATA_11 =$2E4B; mmCOMPUTE_USER_DATA_12 =$2E4C; mmCOMPUTE_USER_DATA_13 =$2E4D; mmCOMPUTE_USER_DATA_14 =$2E4E; mmCOMPUTE_USER_DATA_15 =$2E4F; mmCOMPUTE_NOWHERE =$2E7F; mmGB_EDC_MODE =$307E; mmSPI_ARB_PRIORITY =$31C0; mmSPI_ARB_CYCLES_0 =$31C1; mmSPI_ARB_CYCLES_1 =$31C2; mmSPI_CDBG_SYS_GFX =$31C3; mmSPI_CDBG_SYS_HP3D =$31C4; mmSPI_CDBG_SYS_CS0 =$31C5; mmSPI_CDBG_SYS_CS1 =$31C6; mmSPI_WCL_PIPE_PERCENT_GFX =$31C7; mmSPI_WCL_PIPE_PERCENT_HP3D =$31C8; mmSPI_WCL_PIPE_PERCENT_CS0 =$31C9; mmSPI_WCL_PIPE_PERCENT_CS1 =$31CA; mmSPI_WCL_PIPE_PERCENT_CS2 =$31CB; mmSPI_WCL_PIPE_PERCENT_CS3 =$31CC; mmSPI_WCL_PIPE_PERCENT_CS4 =$31CD; mmSPI_WCL_PIPE_PERCENT_CS5 =$31CE; mmSPI_WCL_PIPE_PERCENT_CS6 =$31CF; mmSPI_WCL_PIPE_PERCENT_CS7 =$31D0; mmSPI_GDBG_WAVE_CNTL =$31D1; mmSPI_GDBG_TRAP_CONFIG =$31D2; mmSPI_GDBG_TRAP_MASK =$31D3; mmSPI_GDBG_TBA_LO =$31D4; mmSPI_GDBG_TBA_HI =$31D5; mmSPI_GDBG_TMA_LO =$31D6; mmSPI_GDBG_TMA_HI =$31D7; mmSPI_GDBG_TRAP_DATA0 =$31D8; mmSPI_GDBG_TRAP_DATA1 =$31D9; mmSPI_RESET_DEBUG =$31DA; mmSPI_COMPUTE_QUEUE_RESET =$31DB; mmSPI_RESOURCE_RESERVE_CU_0 =$31DC; mmSPI_RESOURCE_RESERVE_CU_1 =$31DD; mmSPI_RESOURCE_RESERVE_CU_2 =$31DE; mmSPI_RESOURCE_RESERVE_CU_3 =$31DF; mmSPI_RESOURCE_RESERVE_CU_4 =$31E0; mmSPI_RESOURCE_RESERVE_CU_5 =$31E1; mmSPI_RESOURCE_RESERVE_CU_6 =$31E2; mmSPI_RESOURCE_RESERVE_CU_7 =$31E3; mmSPI_RESOURCE_RESERVE_CU_8 =$31E4; mmSPI_RESOURCE_RESERVE_CU_9 =$31E5; mmSPI_RESOURCE_RESERVE_EN_CU_0 =$31E6; mmSPI_RESOURCE_RESERVE_EN_CU_1 =$31E7; mmSPI_RESOURCE_RESERVE_EN_CU_2 =$31E8; mmSPI_RESOURCE_RESERVE_EN_CU_3 =$31E9; mmSPI_RESOURCE_RESERVE_EN_CU_4 =$31EA; mmSPI_RESOURCE_RESERVE_EN_CU_5 =$31EB; mmSPI_RESOURCE_RESERVE_EN_CU_6 =$31EC; mmSPI_RESOURCE_RESERVE_EN_CU_7 =$31ED; mmSPI_RESOURCE_RESERVE_EN_CU_8 =$31EE; mmSPI_RESOURCE_RESERVE_EN_CU_9 =$31EF; mmSPI_RESOURCE_RESERVE_CU_10 =$31F0; mmSPI_RESOURCE_RESERVE_CU_11 =$31F1; mmSPI_RESOURCE_RESERVE_EN_CU_10 =$31F2; mmSPI_RESOURCE_RESERVE_EN_CU_11 =$31F3; mmSPI_RESOURCE_RESERVE_CU_12 =$31F4; mmSPI_RESOURCE_RESERVE_CU_13 =$31F5; mmSPI_RESOURCE_RESERVE_CU_14 =$31F6; mmSPI_RESOURCE_RESERVE_CU_15 =$31F7; mmSPI_RESOURCE_RESERVE_EN_CU_12 =$31F8; mmSPI_RESOURCE_RESERVE_EN_CU_13 =$31F9; mmSPI_RESOURCE_RESERVE_EN_CU_14 =$31FA; mmSPI_RESOURCE_RESERVE_EN_CU_15 =$31FB; mmSPI_COMPUTE_WF_CTX_SAVE =$31FC; mmDB_RENDER_CONTROL =$A000; mmDB_COUNT_CONTROL =$A001; mmDB_DEPTH_VIEW =$A002; mmDB_RENDER_OVERRIDE =$A003; mmDB_RENDER_OVERRIDE2 =$A004; mmDB_HTILE_DATA_BASE =$A005; mmDB_DEPTH_BOUNDS_MIN =$A008; mmDB_DEPTH_BOUNDS_MAX =$A009; mmDB_STENCIL_CLEAR =$A00A; mmDB_DEPTH_CLEAR =$A00B; mmPA_SC_SCREEN_SCISSOR_TL =$A00C; mmPA_SC_SCREEN_SCISSOR_BR =$A00D; mmDB_DEPTH_INFO =$A00F; mmDB_Z_INFO =$A010; mmDB_STENCIL_INFO =$A011; mmDB_Z_READ_BASE =$A012; mmDB_STENCIL_READ_BASE =$A013; mmDB_Z_WRITE_BASE =$A014; mmDB_STENCIL_WRITE_BASE =$A015; mmDB_DEPTH_SIZE =$A016; mmDB_DEPTH_SLICE =$A017; mmPA_SC_WINDOW_OFFSET =$A080; mmPA_SC_WINDOW_SCISSOR_TL =$A081; mmPA_SC_WINDOW_SCISSOR_BR =$A082; mmPA_SC_CLIPRECT_RULE =$A083; mmPA_SC_CLIPRECT_0_TL =$A084; mmPA_SC_CLIPRECT_0_BR =$A085; mmPA_SC_CLIPRECT_1_TL =$A086; mmPA_SC_CLIPRECT_1_BR =$A087; mmPA_SC_CLIPRECT_2_TL =$A088; mmPA_SC_CLIPRECT_2_BR =$A089; mmPA_SC_CLIPRECT_3_TL =$A08A; mmPA_SC_CLIPRECT_3_BR =$A08B; mmPA_SC_EDGERULE =$A08C; mmPA_SU_HARDWARE_SCREEN_OFFSET =$A08D; mmCB_TARGET_MASK =$A08E; mmCB_SHADER_MASK =$A08F; mmPA_SC_GENERIC_SCISSOR_TL =$A090; mmPA_SC_GENERIC_SCISSOR_BR =$A091; mmPA_SC_VPORT_SCISSOR_0_TL =$A094; mmPA_SC_VPORT_SCISSOR_0_BR =$A095; mmPA_SC_VPORT_SCISSOR_1_TL =$A096; mmPA_SC_VPORT_SCISSOR_1_BR =$A097; mmPA_SC_VPORT_SCISSOR_2_TL =$A098; mmPA_SC_VPORT_SCISSOR_2_BR =$A099; mmPA_SC_VPORT_SCISSOR_3_TL =$A09A; mmPA_SC_VPORT_SCISSOR_3_BR =$A09B; mmPA_SC_VPORT_SCISSOR_4_TL =$A09C; mmPA_SC_VPORT_SCISSOR_4_BR =$A09D; mmPA_SC_VPORT_SCISSOR_5_TL =$A09E; mmPA_SC_VPORT_SCISSOR_5_BR =$A09F; mmPA_SC_VPORT_SCISSOR_6_TL =$A0A0; mmPA_SC_VPORT_SCISSOR_6_BR =$A0A1; mmPA_SC_VPORT_SCISSOR_7_TL =$A0A2; mmPA_SC_VPORT_SCISSOR_7_BR =$A0A3; mmPA_SC_VPORT_SCISSOR_8_TL =$A0A4; mmPA_SC_VPORT_SCISSOR_8_BR =$A0A5; mmPA_SC_VPORT_SCISSOR_9_TL =$A0A6; mmPA_SC_VPORT_SCISSOR_9_BR =$A0A7; mmPA_SC_VPORT_SCISSOR_10_TL =$A0A8; mmPA_SC_VPORT_SCISSOR_10_BR =$A0A9; mmPA_SC_VPORT_SCISSOR_11_TL =$A0AA; mmPA_SC_VPORT_SCISSOR_11_BR =$A0AB; mmPA_SC_VPORT_SCISSOR_12_TL =$A0AC; mmPA_SC_VPORT_SCISSOR_12_BR =$A0AD; mmPA_SC_VPORT_SCISSOR_13_TL =$A0AE; mmPA_SC_VPORT_SCISSOR_13_BR =$A0AF; mmPA_SC_VPORT_SCISSOR_14_TL =$A0B0; mmPA_SC_VPORT_SCISSOR_14_BR =$A0B1; mmPA_SC_VPORT_SCISSOR_15_TL =$A0B2; mmPA_SC_VPORT_SCISSOR_15_BR =$A0B3; mmPA_SC_VPORT_ZMIN_0 =$A0B4; mmPA_SC_VPORT_ZMAX_0 =$A0B5; mmPA_SC_VPORT_ZMIN_1 =$A0B6; mmPA_SC_VPORT_ZMAX_1 =$A0B7; mmPA_SC_VPORT_ZMIN_2 =$A0B8; mmPA_SC_VPORT_ZMAX_2 =$A0B9; mmPA_SC_VPORT_ZMIN_3 =$A0BA; mmPA_SC_VPORT_ZMAX_3 =$A0BB; mmPA_SC_VPORT_ZMIN_4 =$A0BC; mmPA_SC_VPORT_ZMAX_4 =$A0BD; mmPA_SC_VPORT_ZMIN_5 =$A0BE; mmPA_SC_VPORT_ZMAX_5 =$A0BF; mmPA_SC_VPORT_ZMIN_6 =$A0C0; mmPA_SC_VPORT_ZMAX_6 =$A0C1; mmPA_SC_VPORT_ZMIN_7 =$A0C2; mmPA_SC_VPORT_ZMAX_7 =$A0C3; mmPA_SC_VPORT_ZMIN_8 =$A0C4; mmPA_SC_VPORT_ZMAX_8 =$A0C5; mmPA_SC_VPORT_ZMIN_9 =$A0C6; mmPA_SC_VPORT_ZMAX_9 =$A0C7; mmPA_SC_VPORT_ZMIN_10 =$A0C8; mmPA_SC_VPORT_ZMAX_10 =$A0C9; mmPA_SC_VPORT_ZMIN_11 =$A0CA; mmPA_SC_VPORT_ZMAX_11 =$A0CB; mmPA_SC_VPORT_ZMIN_12 =$A0CC; mmPA_SC_VPORT_ZMAX_12 =$A0CD; mmPA_SC_VPORT_ZMIN_13 =$A0CE; mmPA_SC_VPORT_ZMAX_13 =$A0CF; mmPA_SC_VPORT_ZMIN_14 =$A0D0; mmPA_SC_VPORT_ZMAX_14 =$A0D1; mmPA_SC_VPORT_ZMIN_15 =$A0D2; mmPA_SC_VPORT_ZMAX_15 =$A0D3; mmPA_SC_RASTER_CONFIG =$A0D4; mmPA_SC_RASTER_CONFIG_1 =$A0D5; mmVGT_MAX_VTX_INDX =$A100; mmVGT_MIN_VTX_INDX =$A101; mmVGT_INDX_OFFSET =$A102; mmVGT_MULTI_PRIM_IB_RESET_INDX =$A103; mmCB_BLEND_RED =$A105; mmCB_BLEND_GREEN =$A106; mmCB_BLEND_BLUE =$A107; mmCB_BLEND_ALPHA =$A108; mmCB_DCC_CONTROL =$A109; mmDB_STENCIL_CONTROL =$A10B; mmDB_STENCILREFMASK =$A10C; mmDB_STENCILREFMASK_BF =$A10D; mmPA_CL_VPORT_XSCALE =$A10F; mmPA_CL_VPORT_XOFFSET =$A110; mmPA_CL_VPORT_YSCALE =$A111; mmPA_CL_VPORT_YOFFSET =$A112; mmPA_CL_VPORT_ZSCALE =$A113; mmPA_CL_VPORT_ZOFFSET =$A114; mmPA_CL_VPORT_XSCALE_1 =$A115; mmPA_CL_VPORT_XOFFSET_1 =$A116; mmPA_CL_VPORT_YSCALE_1 =$A117; mmPA_CL_VPORT_YOFFSET_1 =$A118; mmPA_CL_VPORT_ZSCALE_1 =$A119; mmPA_CL_VPORT_ZOFFSET_1 =$A11A; mmPA_CL_VPORT_XSCALE_2 =$A11B; mmPA_CL_VPORT_XOFFSET_2 =$A11C; mmPA_CL_VPORT_YSCALE_2 =$A11D; mmPA_CL_VPORT_YOFFSET_2 =$A11E; mmPA_CL_VPORT_ZSCALE_2 =$A11F; mmPA_CL_VPORT_ZOFFSET_2 =$A120; mmPA_CL_VPORT_XSCALE_3 =$A121; mmPA_CL_VPORT_XOFFSET_3 =$A122; mmPA_CL_VPORT_YSCALE_3 =$A123; mmPA_CL_VPORT_YOFFSET_3 =$A124; mmPA_CL_VPORT_ZSCALE_3 =$A125; mmPA_CL_VPORT_ZOFFSET_3 =$A126; mmPA_CL_VPORT_XSCALE_4 =$A127; mmPA_CL_VPORT_XOFFSET_4 =$A128; mmPA_CL_VPORT_YSCALE_4 =$A129; mmPA_CL_VPORT_YOFFSET_4 =$A12A; mmPA_CL_VPORT_ZSCALE_4 =$A12B; mmPA_CL_VPORT_ZOFFSET_4 =$A12C; mmPA_CL_VPORT_XSCALE_5 =$A12D; mmPA_CL_VPORT_XOFFSET_5 =$A12E; mmPA_CL_VPORT_YSCALE_5 =$A12F; mmPA_CL_VPORT_YOFFSET_5 =$A130; mmPA_CL_VPORT_ZSCALE_5 =$A131; mmPA_CL_VPORT_ZOFFSET_5 =$A132; mmPA_CL_VPORT_XSCALE_6 =$A133; mmPA_CL_VPORT_XOFFSET_6 =$A134; mmPA_CL_VPORT_YSCALE_6 =$A135; mmPA_CL_VPORT_YOFFSET_6 =$A136; mmPA_CL_VPORT_ZSCALE_6 =$A137; mmPA_CL_VPORT_ZOFFSET_6 =$A138; mmPA_CL_VPORT_XSCALE_7 =$A139; mmPA_CL_VPORT_XOFFSET_7 =$A13A; mmPA_CL_VPORT_YSCALE_7 =$A13B; mmPA_CL_VPORT_YOFFSET_7 =$A13C; mmPA_CL_VPORT_ZSCALE_7 =$A13D; mmPA_CL_VPORT_ZOFFSET_7 =$A13E; mmPA_CL_VPORT_XSCALE_8 =$A13F; mmPA_CL_VPORT_XOFFSET_8 =$A140; mmPA_CL_VPORT_YSCALE_8 =$A141; mmPA_CL_VPORT_YOFFSET_8 =$A142; mmPA_CL_VPORT_ZSCALE_8 =$A143; mmPA_CL_VPORT_ZOFFSET_8 =$A144; mmPA_CL_VPORT_XSCALE_9 =$A145; mmPA_CL_VPORT_XOFFSET_9 =$A146; mmPA_CL_VPORT_YSCALE_9 =$A147; mmPA_CL_VPORT_YOFFSET_9 =$A148; mmPA_CL_VPORT_ZSCALE_9 =$A149; mmPA_CL_VPORT_ZOFFSET_9 =$A14A; mmPA_CL_VPORT_XSCALE_10 =$A14B; mmPA_CL_VPORT_XOFFSET_10 =$A14C; mmPA_CL_VPORT_YSCALE_10 =$A14D; mmPA_CL_VPORT_YOFFSET_10 =$A14E; mmPA_CL_VPORT_ZSCALE_10 =$A14F; mmPA_CL_VPORT_ZOFFSET_10 =$A150; mmPA_CL_VPORT_XSCALE_11 =$A151; mmPA_CL_VPORT_XOFFSET_11 =$A152; mmPA_CL_VPORT_YSCALE_11 =$A153; mmPA_CL_VPORT_YOFFSET_11 =$A154; mmPA_CL_VPORT_ZSCALE_11 =$A155; mmPA_CL_VPORT_ZOFFSET_11 =$A156; mmPA_CL_VPORT_XSCALE_12 =$A157; mmPA_CL_VPORT_XOFFSET_12 =$A158; mmPA_CL_VPORT_YSCALE_12 =$A159; mmPA_CL_VPORT_YOFFSET_12 =$A15A; mmPA_CL_VPORT_ZSCALE_12 =$A15B; mmPA_CL_VPORT_ZOFFSET_12 =$A15C; mmPA_CL_VPORT_XSCALE_13 =$A15D; mmPA_CL_VPORT_XOFFSET_13 =$A15E; mmPA_CL_VPORT_YSCALE_13 =$A15F; mmPA_CL_VPORT_YOFFSET_13 =$A160; mmPA_CL_VPORT_ZSCALE_13 =$A161; mmPA_CL_VPORT_ZOFFSET_13 =$A162; mmPA_CL_VPORT_XSCALE_14 =$A163; mmPA_CL_VPORT_XOFFSET_14 =$A164; mmPA_CL_VPORT_YSCALE_14 =$A165; mmPA_CL_VPORT_YOFFSET_14 =$A166; mmPA_CL_VPORT_ZSCALE_14 =$A167; mmPA_CL_VPORT_ZOFFSET_14 =$A168; mmPA_CL_VPORT_XSCALE_15 =$A169; mmPA_CL_VPORT_XOFFSET_15 =$A16A; mmPA_CL_VPORT_YSCALE_15 =$A16B; mmPA_CL_VPORT_YOFFSET_15 =$A16C; mmPA_CL_VPORT_ZSCALE_15 =$A16D; mmPA_CL_VPORT_ZOFFSET_15 =$A16E; mmPA_CL_UCP_0_X =$A16F; mmPA_CL_UCP_0_Y =$A170; mmPA_CL_UCP_0_Z =$A171; mmPA_CL_UCP_0_W =$A172; mmPA_CL_UCP_1_X =$A173; mmPA_CL_UCP_1_Y =$A174; mmPA_CL_UCP_1_Z =$A175; mmPA_CL_UCP_1_W =$A176; mmPA_CL_UCP_2_X =$A177; mmPA_CL_UCP_2_Y =$A178; mmPA_CL_UCP_2_Z =$A179; mmPA_CL_UCP_2_W =$A17A; mmPA_CL_UCP_3_X =$A17B; mmPA_CL_UCP_3_Y =$A17C; mmPA_CL_UCP_3_Z =$A17D; mmPA_CL_UCP_3_W =$A17E; mmPA_CL_UCP_4_X =$A17F; mmPA_CL_UCP_4_Y =$A180; mmPA_CL_UCP_4_Z =$A181; mmPA_CL_UCP_4_W =$A182; mmPA_CL_UCP_5_X =$A183; mmPA_CL_UCP_5_Y =$A184; mmPA_CL_UCP_5_Z =$A185; mmPA_CL_UCP_5_W =$A186; mmSPI_PS_INPUT_CNTL_0 =$A191; mmSPI_PS_INPUT_CNTL_1 =$A192; mmSPI_PS_INPUT_CNTL_2 =$A193; mmSPI_PS_INPUT_CNTL_3 =$A194; mmSPI_PS_INPUT_CNTL_4 =$A195; mmSPI_PS_INPUT_CNTL_5 =$A196; mmSPI_PS_INPUT_CNTL_6 =$A197; mmSPI_PS_INPUT_CNTL_7 =$A198; mmSPI_PS_INPUT_CNTL_8 =$A199; mmSPI_PS_INPUT_CNTL_9 =$A19A; mmSPI_PS_INPUT_CNTL_10 =$A19B; mmSPI_PS_INPUT_CNTL_11 =$A19C; mmSPI_PS_INPUT_CNTL_12 =$A19D; mmSPI_PS_INPUT_CNTL_13 =$A19E; mmSPI_PS_INPUT_CNTL_14 =$A19F; mmSPI_PS_INPUT_CNTL_15 =$A1A0; mmSPI_PS_INPUT_CNTL_16 =$A1A1; mmSPI_PS_INPUT_CNTL_17 =$A1A2; mmSPI_PS_INPUT_CNTL_18 =$A1A3; mmSPI_PS_INPUT_CNTL_19 =$A1A4; mmSPI_PS_INPUT_CNTL_20 =$A1A5; mmSPI_PS_INPUT_CNTL_21 =$A1A6; mmSPI_PS_INPUT_CNTL_22 =$A1A7; mmSPI_PS_INPUT_CNTL_23 =$A1A8; mmSPI_PS_INPUT_CNTL_24 =$A1A9; mmSPI_PS_INPUT_CNTL_25 =$A1AA; mmSPI_PS_INPUT_CNTL_26 =$A1AB; mmSPI_PS_INPUT_CNTL_27 =$A1AC; mmSPI_PS_INPUT_CNTL_28 =$A1AD; mmSPI_PS_INPUT_CNTL_29 =$A1AE; mmSPI_PS_INPUT_CNTL_30 =$A1AF; mmSPI_PS_INPUT_CNTL_31 =$A1B0; mmSPI_VS_OUT_CONFIG =$A1B1; mmSPI_PS_INPUT_ENA =$A1B3; mmSPI_PS_INPUT_ADDR =$A1B4; mmSPI_INTERP_CONTROL_0 =$A1B5; mmSPI_PS_IN_CONTROL =$A1B6; mmSPI_BARYC_CNTL =$A1B8; mmSPI_TMPRING_SIZE =$A1BA; mmSPI_SHADER_POS_FORMAT =$A1C3; mmSPI_SHADER_Z_FORMAT =$A1C4; mmSPI_SHADER_COL_FORMAT =$A1C5; mmCB_BLEND0_CONTROL =$A1E0; mmCB_BLEND1_CONTROL =$A1E1; mmCB_BLEND2_CONTROL =$A1E2; mmCB_BLEND3_CONTROL =$A1E3; mmCB_BLEND4_CONTROL =$A1E4; mmCB_BLEND5_CONTROL =$A1E5; mmCB_BLEND6_CONTROL =$A1E6; mmCB_BLEND7_CONTROL =$A1E7; mmPA_CL_POINT_X_RAD =$A1F5; mmPA_CL_POINT_Y_RAD =$A1F6; mmPA_CL_POINT_SIZE =$A1F7; mmPA_CL_POINT_CULL_RAD =$A1F8; mmVGT_DMA_BASE_HI =$A1F9; mmVGT_DMA_BASE =$A1FA; mmVGT_DRAW_INITIATOR =$A1FC; mmVGT_IMMED_DATA =$A1FD; mmVGT_EVENT_ADDRESS_REG =$A1FE; mmDB_DEPTH_CONTROL =$A200; mmDB_EQAA =$A201; mmCB_COLOR_CONTROL =$A202; mmDB_SHADER_CONTROL =$A203; mmPA_CL_CLIP_CNTL =$A204; mmPA_SU_SC_MODE_CNTL =$A205; mmPA_CL_VTE_CNTL =$A206; mmPA_CL_VS_OUT_CNTL =$A207; mmPA_CL_NANINF_CNTL =$A208; mmPA_SU_LINE_STIPPLE_CNTL =$A209; mmPA_SU_LINE_STIPPLE_SCALE =$A20A; mmPA_SU_PRIM_FILTER_CNTL =$A20B; mmPA_SU_POINT_SIZE =$A280; mmPA_SU_POINT_MINMAX =$A281; mmPA_SU_LINE_CNTL =$A282; mmPA_SC_LINE_STIPPLE =$A283; mmVGT_OUTPUT_PATH_CNTL =$A284; mmVGT_HOS_CNTL =$A285; mmVGT_HOS_MAX_TESS_LEVEL =$A286; mmVGT_HOS_MIN_TESS_LEVEL =$A287; mmVGT_HOS_REUSE_DEPTH =$A288; mmVGT_GROUP_PRIM_TYPE =$A289; mmVGT_GROUP_FIRST_DECR =$A28A; mmVGT_GROUP_DECR =$A28B; mmVGT_GROUP_VECT_0_CNTL =$A28C; mmVGT_GROUP_VECT_1_CNTL =$A28D; mmVGT_GROUP_VECT_0_FMT_CNTL =$A28E; mmVGT_GROUP_VECT_1_FMT_CNTL =$A28F; mmVGT_GS_MODE =$A290; mmVGT_GS_ONCHIP_CNTL =$A291; mmPA_SC_MODE_CNTL_0 =$A292; mmPA_SC_MODE_CNTL_1 =$A293; mmVGT_ENHANCE =$A294; mmVGT_GS_PER_ES =$A295; mmVGT_ES_PER_GS =$A296; mmVGT_GS_PER_VS =$A297; mmVGT_GSVS_RING_OFFSET_1 =$A298; mmVGT_GSVS_RING_OFFSET_2 =$A299; mmVGT_GSVS_RING_OFFSET_3 =$A29A; mmVGT_GS_OUT_PRIM_TYPE =$A29B; mmIA_ENHANCE =$A29C; mmVGT_DMA_SIZE =$A29D; mmVGT_DMA_MAX_SIZE =$A29E; mmVGT_DMA_INDEX_TYPE =$A29F; mmVGT_PRIMITIVEID_EN =$A2A1; mmVGT_DMA_NUM_INSTANCES =$A2A2; mmVGT_PRIMITIVEID_RESET =$A2A3; mmVGT_EVENT_INITIATOR =$A2A4; mmVGT_MULTI_PRIM_IB_RESET_EN =$A2A5; mmVGT_INSTANCE_STEP_RATE_0 =$A2A8; mmVGT_INSTANCE_STEP_RATE_1 =$A2A9; mmIA_MULTI_VGT_PARAM =$A2AA; mmVGT_ESGS_RING_ITEMSIZE =$A2AB; mmVGT_GSVS_RING_ITEMSIZE =$A2AC; mmVGT_REUSE_OFF =$A2AD; mmVGT_VTX_CNT_EN =$A2AE; mmDB_HTILE_SURFACE =$A2AF; mmDB_SRESULTS_COMPARE_STATE0 =$A2B0; mmDB_SRESULTS_COMPARE_STATE1 =$A2B1; mmDB_PRELOAD_CONTROL =$A2B2; mmVGT_STRMOUT_BUFFER_SIZE_0 =$A2B4; mmVGT_STRMOUT_VTX_STRIDE_0 =$A2B5; mmVGT_STRMOUT_BUFFER_OFFSET_0 =$A2B7; mmVGT_STRMOUT_BUFFER_SIZE_1 =$A2B8; mmVGT_STRMOUT_VTX_STRIDE_1 =$A2B9; mmVGT_STRMOUT_BUFFER_OFFSET_1 =$A2BB; mmVGT_STRMOUT_BUFFER_SIZE_2 =$A2BC; mmVGT_STRMOUT_VTX_STRIDE_2 =$A2BD; mmVGT_STRMOUT_BUFFER_OFFSET_2 =$A2BF; mmVGT_STRMOUT_BUFFER_SIZE_3 =$A2C0; mmVGT_STRMOUT_VTX_STRIDE_3 =$A2C1; mmVGT_STRMOUT_BUFFER_OFFSET_3 =$A2C3; mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET =$A2CA; mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE=$A2CB; mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE =$A2CC; mmVGT_GS_MAX_VERT_OUT =$A2CE; mmVGT_TESS_DISTRIBUTION =$A2D4; mmVGT_SHADER_STAGES_EN =$A2D5; mmVGT_LS_HS_CONFIG =$A2D6; mmVGT_GS_VERT_ITEMSIZE =$A2D7; mmVGT_GS_VERT_ITEMSIZE_1 =$A2D8; mmVGT_GS_VERT_ITEMSIZE_2 =$A2D9; mmVGT_GS_VERT_ITEMSIZE_3 =$A2DA; mmVGT_TF_PARAM =$A2DB; mmDB_ALPHA_TO_MASK =$A2DC; mmVGT_DISPATCH_DRAW_INDEX =$A2DD; mmPA_SU_POLY_OFFSET_DB_FMT_CNTL =$A2DE; mmPA_SU_POLY_OFFSET_CLAMP =$A2DF; mmPA_SU_POLY_OFFSET_FRONT_SCALE =$A2E0; mmPA_SU_POLY_OFFSET_FRONT_OFFSET =$A2E1; mmPA_SU_POLY_OFFSET_BACK_SCALE =$A2E2; mmPA_SU_POLY_OFFSET_BACK_OFFSET =$A2E3; mmVGT_GS_INSTANCE_CNT =$A2E4; mmVGT_STRMOUT_CONFIG =$A2E5; mmVGT_STRMOUT_BUFFER_CONFIG =$A2E6; mmPA_SC_CENTROID_PRIORITY_0 =$A2F5; mmPA_SC_CENTROID_PRIORITY_1 =$A2F6; mmPA_SC_LINE_CNTL =$A2F7; mmPA_SC_AA_CONFIG =$A2F8; mmPA_SU_VTX_CNTL =$A2F9; mmPA_CL_GB_VERT_CLIP_ADJ =$A2FA; mmPA_CL_GB_VERT_DISC_ADJ =$A2FB; mmPA_CL_GB_HORZ_CLIP_ADJ =$A2FC; mmPA_CL_GB_HORZ_DISC_ADJ =$A2FD; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 =$A2FE; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 =$A2FF; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 =$A300; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 =$A301; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 =$A302; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 =$A303; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 =$A304; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 =$A305; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 =$A306; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 =$A307; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 =$A308; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 =$A309; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 =$A30A; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 =$A30B; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 =$A30C; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 =$A30D; mmPA_SC_AA_MASK_X0Y0_X1Y0 =$A30E; mmPA_SC_AA_MASK_X0Y1_X1Y1 =$A30F; mmVGT_VERTEX_REUSE_BLOCK_CNTL =$A316; mmVGT_OUT_DEALLOC_CNTL =$A317; mmCB_COLOR0_BASE =$A318; mmCB_COLOR0_PITCH =$A319; mmCB_COLOR0_SLICE =$A31A; mmCB_COLOR0_VIEW =$A31B; mmCB_COLOR0_INFO =$A31C; mmCB_COLOR0_ATTRIB =$A31D; mmCB_COLOR0_DCC_CONTROL =$A31E; mmCB_COLOR0_CMASK =$A31F; mmCB_COLOR0_CMASK_SLICE =$A320; mmCB_COLOR0_FMASK =$A321; mmCB_COLOR0_FMASK_SLICE =$A322; mmCB_COLOR0_CLEAR_WORD0 =$A323; mmCB_COLOR0_CLEAR_WORD1 =$A324; mmCB_COLOR0_DCC_BASE =$A325; mmCB_COLOR1_BASE =$A327; mmCB_COLOR1_PITCH =$A328; mmCB_COLOR1_SLICE =$A329; mmCB_COLOR1_VIEW =$A32A; mmCB_COLOR1_INFO =$A32B; mmCB_COLOR1_ATTRIB =$A32C; mmCB_COLOR1_DCC_CONTROL =$A32D; mmCB_COLOR1_CMASK =$A32E; mmCB_COLOR1_CMASK_SLICE =$A32F; mmCB_COLOR1_FMASK =$A330; mmCB_COLOR1_FMASK_SLICE =$A331; mmCB_COLOR1_CLEAR_WORD0 =$A332; mmCB_COLOR1_CLEAR_WORD1 =$A333; mmCB_COLOR1_DCC_BASE =$A334; mmCB_COLOR2_BASE =$A336; mmCB_COLOR2_PITCH =$A337; mmCB_COLOR2_SLICE =$A338; mmCB_COLOR2_VIEW =$A339; mmCB_COLOR2_INFO =$A33A; mmCB_COLOR2_ATTRIB =$A33B; mmCB_COLOR2_DCC_CONTROL =$A33C; mmCB_COLOR2_CMASK =$A33D; mmCB_COLOR2_CMASK_SLICE =$A33E; mmCB_COLOR2_FMASK =$A33F; mmCB_COLOR2_FMASK_SLICE =$A340; mmCB_COLOR2_CLEAR_WORD0 =$A341; mmCB_COLOR2_CLEAR_WORD1 =$A342; mmCB_COLOR2_DCC_BASE =$A343; mmCB_COLOR3_BASE =$A345; mmCB_COLOR3_PITCH =$A346; mmCB_COLOR3_SLICE =$A347; mmCB_COLOR3_VIEW =$A348; mmCB_COLOR3_INFO =$A349; mmCB_COLOR3_ATTRIB =$A34A; mmCB_COLOR3_DCC_CONTROL =$A34B; mmCB_COLOR3_CMASK =$A34C; mmCB_COLOR3_CMASK_SLICE =$A34D; mmCB_COLOR3_FMASK =$A34E; mmCB_COLOR3_FMASK_SLICE =$A34F; mmCB_COLOR3_CLEAR_WORD0 =$A350; mmCB_COLOR3_CLEAR_WORD1 =$A351; mmCB_COLOR3_DCC_BASE =$A352; mmCB_COLOR4_BASE =$A354; mmCB_COLOR4_PITCH =$A355; mmCB_COLOR4_SLICE =$A356; mmCB_COLOR4_VIEW =$A357; mmCB_COLOR4_INFO =$A358; mmCB_COLOR4_ATTRIB =$A359; mmCB_COLOR4_DCC_CONTROL =$A35A; mmCB_COLOR4_CMASK =$A35B; mmCB_COLOR4_CMASK_SLICE =$A35C; mmCB_COLOR4_FMASK =$A35D; mmCB_COLOR4_FMASK_SLICE =$A35E; mmCB_COLOR4_CLEAR_WORD0 =$A35F; mmCB_COLOR4_CLEAR_WORD1 =$A360; mmCB_COLOR4_DCC_BASE =$A361; mmCB_COLOR5_BASE =$A363; mmCB_COLOR5_PITCH =$A364; mmCB_COLOR5_SLICE =$A365; mmCB_COLOR5_VIEW =$A366; mmCB_COLOR5_INFO =$A367; mmCB_COLOR5_ATTRIB =$A368; mmCB_COLOR5_DCC_CONTROL =$A369; mmCB_COLOR5_CMASK =$A36A; mmCB_COLOR5_CMASK_SLICE =$A36B; mmCB_COLOR5_FMASK =$A36C; mmCB_COLOR5_FMASK_SLICE =$A36D; mmCB_COLOR5_CLEAR_WORD0 =$A36E; mmCB_COLOR5_CLEAR_WORD1 =$A36F; mmCB_COLOR5_DCC_BASE =$A370; mmCB_COLOR6_BASE =$A372; mmCB_COLOR6_PITCH =$A373; mmCB_COLOR6_SLICE =$A374; mmCB_COLOR6_VIEW =$A375; mmCB_COLOR6_INFO =$A376; mmCB_COLOR6_ATTRIB =$A377; mmCB_COLOR6_DCC_CONTROL =$A378; mmCB_COLOR6_CMASK =$A379; mmCB_COLOR6_CMASK_SLICE =$A37A; mmCB_COLOR6_FMASK =$A37B; mmCB_COLOR6_FMASK_SLICE =$A37C; mmCB_COLOR6_CLEAR_WORD0 =$A37D; mmCB_COLOR6_CLEAR_WORD1 =$A37E; mmCB_COLOR6_DCC_BASE =$A37F; mmCB_COLOR7_BASE =$A381; mmCB_COLOR7_PITCH =$A382; mmCB_COLOR7_SLICE =$A383; mmCB_COLOR7_VIEW =$A384; mmCB_COLOR7_INFO =$A385; mmCB_COLOR7_ATTRIB =$A386; mmCB_COLOR7_DCC_CONTROL =$A387; mmCB_COLOR7_CMASK =$A388; mmCB_COLOR7_CMASK_SLICE =$A389; mmCB_COLOR7_FMASK =$A38A; mmCB_COLOR7_FMASK_SLICE =$A38B; mmCB_COLOR7_CLEAR_WORD0 =$A38C; mmCB_COLOR7_CLEAR_WORD1 =$A38D; mmCB_COLOR7_DCC_BASE =$A38E; mmGRBM_GFX_INDEX =$C200; mmVGT_ESGS_RING_SIZE =$C240; mmVGT_GSVS_RING_SIZE =$C241; mmVGT_PRIMITIVE_TYPE =$C242; mmVGT_INDEX_TYPE =$C243; mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0 =$C244; mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1 =$C245; mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2 =$C246; mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3 =$C247; mmVGT_NUM_INDICES =$C24C; mmVGT_NUM_INSTANCES =$C24D; mmVGT_TF_RING_SIZE =$C24E; mmVGT_HS_OFFCHIP_PARAM =$C24F; mmVGT_TF_MEMORY_BASE =$C250; mmPA_SU_LINE_STIPPLE_VALUE =$C280; mmPA_SC_LINE_STIPPLE_STATE =$C281; mmPA_SC_P3D_TRAP_SCREEN_HV_EN =$C2A0; mmPA_SC_P3D_TRAP_SCREEN_H =$C2A1; mmPA_SC_P3D_TRAP_SCREEN_V =$C2A2; mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE =$C2A3; mmPA_SC_P3D_TRAP_SCREEN_COUNT =$C2A4; mmPA_SC_HP3D_TRAP_SCREEN_HV_EN =$C2A8; mmPA_SC_HP3D_TRAP_SCREEN_H =$C2A9; mmPA_SC_HP3D_TRAP_SCREEN_V =$C2AA; mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE =$C2AB; mmPA_SC_HP3D_TRAP_SCREEN_COUNT =$C2AC; mmPA_SC_TRAP_SCREEN_HV_EN =$C2B0; mmPA_SC_TRAP_SCREEN_H =$C2B1; mmPA_SC_TRAP_SCREEN_V =$C2B2; mmPA_SC_TRAP_SCREEN_OCCURRENCE =$C2B3; mmPA_SC_TRAP_SCREEN_COUNT =$C2B4; mmDB_OCCLUSION_COUNT0_LOW =$C3C0; mmDB_OCCLUSION_COUNT0_HI =$C3C1; mmDB_OCCLUSION_COUNT1_LOW =$C3C2; mmDB_OCCLUSION_COUNT1_HI =$C3C3; mmDB_OCCLUSION_COUNT2_LOW =$C3C4; mmDB_OCCLUSION_COUNT2_HI =$C3C5; mmDB_OCCLUSION_COUNT3_LOW =$C3C6; mmDB_OCCLUSION_COUNT3_HI =$C3C7; mmDB_ZPASS_COUNT_LOW =$C3FE; mmDB_ZPASS_COUNT_HI =$C3FF; mmGRBM_PERFCOUNTER0_LO =$D040; mmGRBM_PERFCOUNTER0_HI =$D041; mmGRBM_PERFCOUNTER1_LO =$D043; mmGRBM_PERFCOUNTER1_HI =$D044; mmGRBM_SE0_PERFCOUNTER_LO =$D045; mmGRBM_SE0_PERFCOUNTER_HI =$D046; mmGRBM_SE1_PERFCOUNTER_LO =$D047; mmGRBM_SE1_PERFCOUNTER_HI =$D048; mmGRBM_SE2_PERFCOUNTER_LO =$D049; mmGRBM_SE2_PERFCOUNTER_HI =$D04A; mmGRBM_SE3_PERFCOUNTER_LO =$D04B; mmGRBM_SE3_PERFCOUNTER_HI =$D04C; mmIA_PERFCOUNTER0_LO =$D088; mmIA_PERFCOUNTER0_HI =$D089; mmIA_PERFCOUNTER1_LO =$D08A; mmIA_PERFCOUNTER1_HI =$D08B; mmIA_PERFCOUNTER2_LO =$D08C; mmIA_PERFCOUNTER2_HI =$D08D; mmIA_PERFCOUNTER3_LO =$D08E; mmIA_PERFCOUNTER3_HI =$D08F; mmVGT_PERFCOUNTER0_LO =$D090; mmVGT_PERFCOUNTER0_HI =$D091; mmVGT_PERFCOUNTER1_LO =$D092; mmVGT_PERFCOUNTER1_HI =$D093; mmVGT_PERFCOUNTER2_LO =$D094; mmVGT_PERFCOUNTER2_HI =$D095; mmVGT_PERFCOUNTER3_LO =$D096; mmVGT_PERFCOUNTER3_HI =$D097; mmPA_SU_PERFCOUNTER0_LO =$D100; mmPA_SU_PERFCOUNTER0_HI =$D101; mmPA_SU_PERFCOUNTER1_LO =$D102; mmPA_SU_PERFCOUNTER1_HI =$D103; mmPA_SU_PERFCOUNTER2_LO =$D104; mmPA_SU_PERFCOUNTER2_HI =$D105; mmPA_SU_PERFCOUNTER3_LO =$D106; mmPA_SU_PERFCOUNTER3_HI =$D107; mmPA_SC_PERFCOUNTER0_LO =$D140; mmPA_SC_PERFCOUNTER0_HI =$D141; mmPA_SC_PERFCOUNTER1_LO =$D142; mmPA_SC_PERFCOUNTER1_HI =$D143; mmPA_SC_PERFCOUNTER2_LO =$D144; mmPA_SC_PERFCOUNTER2_HI =$D145; mmPA_SC_PERFCOUNTER3_LO =$D146; mmPA_SC_PERFCOUNTER3_HI =$D147; mmPA_SC_PERFCOUNTER4_LO =$D148; mmPA_SC_PERFCOUNTER4_HI =$D149; mmPA_SC_PERFCOUNTER5_LO =$D14A; mmPA_SC_PERFCOUNTER5_HI =$D14B; mmPA_SC_PERFCOUNTER6_LO =$D14C; mmPA_SC_PERFCOUNTER6_HI =$D14D; mmPA_SC_PERFCOUNTER7_LO =$D14E; mmPA_SC_PERFCOUNTER7_HI =$D14F; mmSPI_PERFCOUNTER0_HI =$D180; mmSPI_PERFCOUNTER0_LO =$D181; mmSPI_PERFCOUNTER1_HI =$D182; mmSPI_PERFCOUNTER1_LO =$D183; mmSPI_PERFCOUNTER2_HI =$D184; mmSPI_PERFCOUNTER2_LO =$D185; mmSPI_PERFCOUNTER3_HI =$D186; mmSPI_PERFCOUNTER3_LO =$D187; mmSPI_PERFCOUNTER4_HI =$D188; mmSPI_PERFCOUNTER4_LO =$D189; mmSPI_PERFCOUNTER5_HI =$D18A; mmSPI_PERFCOUNTER5_LO =$D18B; mmCB_PERFCOUNTER0_LO =$D406; mmCB_PERFCOUNTER0_HI =$D407; mmCB_PERFCOUNTER1_LO =$D408; mmCB_PERFCOUNTER1_HI =$D409; mmCB_PERFCOUNTER2_LO =$D40A; mmCB_PERFCOUNTER2_HI =$D40B; mmCB_PERFCOUNTER3_LO =$D40C; mmCB_PERFCOUNTER3_HI =$D40D; mmDB_PERFCOUNTER0_LO =$D440; mmDB_PERFCOUNTER0_HI =$D441; mmDB_PERFCOUNTER1_LO =$D442; mmDB_PERFCOUNTER1_HI =$D443; mmDB_PERFCOUNTER2_LO =$D444; mmDB_PERFCOUNTER2_HI =$D445; mmDB_PERFCOUNTER3_LO =$D446; mmDB_PERFCOUNTER3_HI =$D447; mmGRBM_PERFCOUNTER0_SELECT =$D840; mmGRBM_PERFCOUNTER1_SELECT =$D841; mmGRBM_SE0_PERFCOUNTER_SELECT =$D842; mmGRBM_SE1_PERFCOUNTER_SELECT =$D843; mmGRBM_SE2_PERFCOUNTER_SELECT =$D844; mmGRBM_SE3_PERFCOUNTER_SELECT =$D845; mmIA_PERFCOUNTER0_SELECT =$D884; mmIA_PERFCOUNTER1_SELECT =$D885; mmIA_PERFCOUNTER2_SELECT =$D886; mmIA_PERFCOUNTER3_SELECT =$D887; mmIA_PERFCOUNTER0_SELECT1 =$D888; mmVGT_PERFCOUNTER0_SELECT =$D88C; mmVGT_PERFCOUNTER1_SELECT =$D88D; mmVGT_PERFCOUNTER2_SELECT =$D88E; mmVGT_PERFCOUNTER3_SELECT =$D88F; mmVGT_PERFCOUNTER0_SELECT1 =$D890; mmVGT_PERFCOUNTER1_SELECT1 =$D891; mmVGT_PERFCOUNTER_SEID_MASK =$D894; mmPA_SU_PERFCOUNTER0_SELECT =$D900; mmPA_SU_PERFCOUNTER0_SELECT1 =$D901; mmPA_SU_PERFCOUNTER1_SELECT =$D902; mmPA_SU_PERFCOUNTER1_SELECT1 =$D903; mmPA_SU_PERFCOUNTER2_SELECT =$D904; mmPA_SU_PERFCOUNTER3_SELECT =$D905; mmPA_SC_PERFCOUNTER0_SELECT =$D940; mmPA_SC_PERFCOUNTER0_SELECT1 =$D941; mmPA_SC_PERFCOUNTER1_SELECT =$D942; mmPA_SC_PERFCOUNTER2_SELECT =$D943; mmPA_SC_PERFCOUNTER3_SELECT =$D944; mmPA_SC_PERFCOUNTER4_SELECT =$D945; mmPA_SC_PERFCOUNTER5_SELECT =$D946; mmPA_SC_PERFCOUNTER6_SELECT =$D947; mmPA_SC_PERFCOUNTER7_SELECT =$D948; mmSPI_PERFCOUNTER0_SELECT =$D980; mmSPI_PERFCOUNTER1_SELECT =$D981; mmSPI_PERFCOUNTER2_SELECT =$D982; mmSPI_PERFCOUNTER3_SELECT =$D983; mmSPI_PERFCOUNTER0_SELECT1 =$D984; mmSPI_PERFCOUNTER1_SELECT1 =$D985; mmSPI_PERFCOUNTER2_SELECT1 =$D986; mmSPI_PERFCOUNTER3_SELECT1 =$D987; mmSPI_PERFCOUNTER4_SELECT =$D988; mmSPI_PERFCOUNTER5_SELECT =$D989; mmSPI_PERFCOUNTER_BINS =$D98A; mmCB_PERFCOUNTER_FILTER =$DC00; mmCB_PERFCOUNTER0_SELECT =$DC01; mmCB_PERFCOUNTER0_SELECT1 =$DC02; mmCB_PERFCOUNTER1_SELECT =$DC03; mmCB_PERFCOUNTER2_SELECT =$DC04; mmCB_PERFCOUNTER3_SELECT =$DC05; mmDB_PERFCOUNTER0_SELECT =$DC40; mmDB_PERFCOUNTER0_SELECT1 =$DC41; mmDB_PERFCOUNTER1_SELECT =$DC42; mmDB_PERFCOUNTER1_SELECT1 =$DC43; mmDB_PERFCOUNTER2_SELECT =$DC44; mmDB_PERFCOUNTER3_SELECT =$DC46; mmDB_CGTT_CLK_CTRL_0 =$F0A4; mmCB_CGTT_SCLK_CTRL =$F0A8; mmGRBM_HYP_CAM_INDEX =$F83E; mmGRBM_HYP_CAM_DATA =$F83F; function getRegName(i:Word):RawByteString; implementation function getRegName(i:Word):RawByteString; begin case i of mmGRBM_CNTL :Result:='mmGRBM_CNTL'; mmGRBM_SKEW_CNTL :Result:='mmGRBM_SKEW_CNTL'; mmGRBM_STATUS2 :Result:='mmGRBM_STATUS2'; mmGRBM_PWR_CNTL :Result:='mmGRBM_PWR_CNTL'; mmGRBM_STATUS :Result:='mmGRBM_STATUS'; mmGRBM_STATUS_SE0 :Result:='mmGRBM_STATUS_SE0'; mmGRBM_STATUS_SE1 :Result:='mmGRBM_STATUS_SE1'; mmGRBM_SOFT_RESET :Result:='mmGRBM_SOFT_RESET'; mmGRBM_DEBUG_CNTL :Result:='mmGRBM_DEBUG_CNTL'; mmGRBM_DEBUG_DATA :Result:='mmGRBM_DEBUG_DATA'; mmGRBM_GFX_CLKEN_CNTL :Result:='mmGRBM_GFX_CLKEN_CNTL'; mmGRBM_WAIT_IDLE_CLOCKS :Result:='mmGRBM_WAIT_IDLE_CLOCKS'; mmGRBM_STATUS_SE2 :Result:='mmGRBM_STATUS_SE2'; mmGRBM_STATUS_SE3 :Result:='mmGRBM_STATUS_SE3'; mmGRBM_DEBUG :Result:='mmGRBM_DEBUG'; mmGRBM_DEBUG_SNAPSHOT :Result:='mmGRBM_DEBUG_SNAPSHOT'; mmGRBM_READ_ERROR :Result:='mmGRBM_READ_ERROR'; mmGRBM_READ_ERROR2 :Result:='mmGRBM_READ_ERROR2'; mmGRBM_INT_CNTL :Result:='mmGRBM_INT_CNTL'; mmGRBM_TRAP_OP :Result:='mmGRBM_TRAP_OP'; mmGRBM_TRAP_ADDR :Result:='mmGRBM_TRAP_ADDR'; mmGRBM_TRAP_ADDR_MSK :Result:='mmGRBM_TRAP_ADDR_MSK'; mmGRBM_TRAP_WD :Result:='mmGRBM_TRAP_WD'; mmGRBM_TRAP_WD_MSK :Result:='mmGRBM_TRAP_WD_MSK'; mmGRBM_DSM_BYPASS :Result:='mmGRBM_DSM_BYPASS'; mmGRBM_WRITE_ERROR :Result:='mmGRBM_WRITE_ERROR'; mmGRBM_NOWHERE :Result:='mmGRBM_NOWHERE'; mmGRBM_SCRATCH_REG0 :Result:='mmGRBM_SCRATCH_REG0'; mmGRBM_SCRATCH_REG1 :Result:='mmGRBM_SCRATCH_REG1'; mmGRBM_SCRATCH_REG2 :Result:='mmGRBM_SCRATCH_REG2'; mmGRBM_SCRATCH_REG3 :Result:='mmGRBM_SCRATCH_REG3'; mmGRBM_SCRATCH_REG4 :Result:='mmGRBM_SCRATCH_REG4'; mmGRBM_SCRATCH_REG5 :Result:='mmGRBM_SCRATCH_REG5'; mmGRBM_SCRATCH_REG6 :Result:='mmGRBM_SCRATCH_REG6'; mmGRBM_SCRATCH_REG7 :Result:='mmGRBM_SCRATCH_REG7'; mmVGT_VTX_VECT_EJECT_REG :Result:='mmVGT_VTX_VECT_EJECT_REG'; mmVGT_DMA_DATA_FIFO_DEPTH :Result:='mmVGT_DMA_DATA_FIFO_DEPTH'; mmVGT_DMA_REQ_FIFO_DEPTH :Result:='mmVGT_DMA_REQ_FIFO_DEPTH'; mmVGT_DRAW_INIT_FIFO_DEPTH :Result:='mmVGT_DRAW_INIT_FIFO_DEPTH'; mmVGT_LAST_COPY_STATE :Result:='mmVGT_LAST_COPY_STATE'; mmVGT_CACHE_INVALIDATION :Result:='mmVGT_CACHE_INVALIDATION'; mmVGT_RESET_DEBUG :Result:='mmVGT_RESET_DEBUG'; mmVGT_STRMOUT_DELAY :Result:='mmVGT_STRMOUT_DELAY'; mmVGT_FIFO_DEPTHS :Result:='mmVGT_FIFO_DEPTHS'; mmVGT_GS_VERTEX_REUSE :Result:='mmVGT_GS_VERTEX_REUSE'; mmVGT_MC_LAT_CNTL :Result:='mmVGT_MC_LAT_CNTL'; mmIA_CNTL_STATUS :Result:='mmIA_CNTL_STATUS'; mmVGT_DEBUG_CNTL :Result:='mmVGT_DEBUG_CNTL'; mmVGT_DEBUG_DATA :Result:='mmVGT_DEBUG_DATA'; mmIA_DEBUG_CNTL :Result:='mmIA_DEBUG_CNTL'; mmIA_DEBUG_DATA :Result:='mmIA_DEBUG_DATA'; mmVGT_CNTL_STATUS :Result:='mmVGT_CNTL_STATUS'; mmVGT_SYS_CONFIG :Result:='mmVGT_SYS_CONFIG'; mmVGT_VS_MAX_WAVE_ID :Result:='mmVGT_VS_MAX_WAVE_ID'; mmVGT_DMA_PRIMITIVE_TYPE :Result:='mmVGT_DMA_PRIMITIVE_TYPE'; mmVGT_DMA_CONTROL :Result:='mmVGT_DMA_CONTROL'; mmVGT_DMA_LS_HS_CONFIG :Result:='mmVGT_DMA_LS_HS_CONFIG'; mmPA_SU_DEBUG_CNTL :Result:='mmPA_SU_DEBUG_CNTL'; mmPA_SU_DEBUG_DATA :Result:='mmPA_SU_DEBUG_DATA'; mmPA_CL_CNTL_STATUS :Result:='mmPA_CL_CNTL_STATUS'; mmPA_CL_ENHANCE :Result:='mmPA_CL_ENHANCE'; mmPA_CL_RESET_DEBUG :Result:='mmPA_CL_RESET_DEBUG'; mmPA_SU_CNTL_STATUS :Result:='mmPA_SU_CNTL_STATUS'; mmPA_SC_FIFO_DEPTH_CNTL :Result:='mmPA_SC_FIFO_DEPTH_CNTL'; mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK :Result:='mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK'; mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK :Result:='mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK'; mmPA_SC_TRAP_SCREEN_HV_LOCK :Result:='mmPA_SC_TRAP_SCREEN_HV_LOCK'; mmPA_SC_FORCE_EOV_MAX_CNTS :Result:='mmPA_SC_FORCE_EOV_MAX_CNTS'; mmPA_SC_FIFO_SIZE :Result:='mmPA_SC_FIFO_SIZE'; mmPA_SC_IF_FIFO_SIZE :Result:='mmPA_SC_IF_FIFO_SIZE'; mmPA_SC_DEBUG_CNTL :Result:='mmPA_SC_DEBUG_CNTL'; mmPA_SC_DEBUG_DATA :Result:='mmPA_SC_DEBUG_DATA'; mmPA_SC_ENHANCE :Result:='mmPA_SC_ENHANCE'; mmSPI_PS_MAX_WAVE_ID :Result:='mmSPI_PS_MAX_WAVE_ID'; mmSPI_START_PHASE :Result:='mmSPI_START_PHASE'; mmSPI_GFX_CNTL :Result:='mmSPI_GFX_CNTL'; mmSPI_CONFIG_CNTL :Result:='mmSPI_CONFIG_CNTL'; mmSPI_DEBUG_CNTL :Result:='mmSPI_DEBUG_CNTL'; mmSPI_DEBUG_READ :Result:='mmSPI_DEBUG_READ'; mmSPI_DSM_CNTL :Result:='mmSPI_DSM_CNTL'; mmSPI_EDC_CNT :Result:='mmSPI_EDC_CNT'; mmSPI_CONFIG_CNTL_1 :Result:='mmSPI_CONFIG_CNTL_1'; mmSPI_DEBUG_BUSY :Result:='mmSPI_DEBUG_BUSY'; mmSPI_CONFIG_CNTL_2 :Result:='mmSPI_CONFIG_CNTL_2'; mmSPI_WF_LIFETIME_CNTL :Result:='mmSPI_WF_LIFETIME_CNTL'; mmSPI_WF_LIFETIME_LIMIT_0 :Result:='mmSPI_WF_LIFETIME_LIMIT_0'; mmSPI_WF_LIFETIME_LIMIT_1 :Result:='mmSPI_WF_LIFETIME_LIMIT_1'; mmSPI_WF_LIFETIME_LIMIT_2 :Result:='mmSPI_WF_LIFETIME_LIMIT_2'; mmSPI_WF_LIFETIME_LIMIT_3 :Result:='mmSPI_WF_LIFETIME_LIMIT_3'; mmSPI_WF_LIFETIME_LIMIT_4 :Result:='mmSPI_WF_LIFETIME_LIMIT_4'; mmSPI_WF_LIFETIME_LIMIT_5 :Result:='mmSPI_WF_LIFETIME_LIMIT_5'; mmSPI_WF_LIFETIME_LIMIT_6 :Result:='mmSPI_WF_LIFETIME_LIMIT_6'; mmSPI_WF_LIFETIME_LIMIT_7 :Result:='mmSPI_WF_LIFETIME_LIMIT_7'; mmSPI_WF_LIFETIME_LIMIT_8 :Result:='mmSPI_WF_LIFETIME_LIMIT_8'; mmSPI_WF_LIFETIME_LIMIT_9 :Result:='mmSPI_WF_LIFETIME_LIMIT_9'; mmSPI_WF_LIFETIME_STATUS_0 :Result:='mmSPI_WF_LIFETIME_STATUS_0'; mmSPI_WF_LIFETIME_STATUS_1 :Result:='mmSPI_WF_LIFETIME_STATUS_1'; mmSPI_WF_LIFETIME_STATUS_2 :Result:='mmSPI_WF_LIFETIME_STATUS_2'; mmSPI_WF_LIFETIME_STATUS_3 :Result:='mmSPI_WF_LIFETIME_STATUS_3'; mmSPI_WF_LIFETIME_STATUS_4 :Result:='mmSPI_WF_LIFETIME_STATUS_4'; mmSPI_WF_LIFETIME_STATUS_5 :Result:='mmSPI_WF_LIFETIME_STATUS_5'; mmSPI_WF_LIFETIME_STATUS_6 :Result:='mmSPI_WF_LIFETIME_STATUS_6'; mmSPI_WF_LIFETIME_STATUS_7 :Result:='mmSPI_WF_LIFETIME_STATUS_7'; mmSPI_WF_LIFETIME_STATUS_8 :Result:='mmSPI_WF_LIFETIME_STATUS_8'; mmSPI_WF_LIFETIME_STATUS_9 :Result:='mmSPI_WF_LIFETIME_STATUS_9'; mmSPI_WF_LIFETIME_STATUS_10 :Result:='mmSPI_WF_LIFETIME_STATUS_10'; mmSPI_WF_LIFETIME_STATUS_11 :Result:='mmSPI_WF_LIFETIME_STATUS_11'; mmSPI_WF_LIFETIME_STATUS_12 :Result:='mmSPI_WF_LIFETIME_STATUS_12'; mmSPI_WF_LIFETIME_STATUS_13 :Result:='mmSPI_WF_LIFETIME_STATUS_13'; mmSPI_WF_LIFETIME_STATUS_14 :Result:='mmSPI_WF_LIFETIME_STATUS_14'; mmSPI_WF_LIFETIME_STATUS_15 :Result:='mmSPI_WF_LIFETIME_STATUS_15'; mmSPI_WF_LIFETIME_STATUS_16 :Result:='mmSPI_WF_LIFETIME_STATUS_16'; mmSPI_WF_LIFETIME_STATUS_17 :Result:='mmSPI_WF_LIFETIME_STATUS_17'; mmSPI_WF_LIFETIME_STATUS_18 :Result:='mmSPI_WF_LIFETIME_STATUS_18'; mmSPI_WF_LIFETIME_STATUS_19 :Result:='mmSPI_WF_LIFETIME_STATUS_19'; mmSPI_WF_LIFETIME_STATUS_20 :Result:='mmSPI_WF_LIFETIME_STATUS_20'; mmSPI_WF_LIFETIME_DEBUG :Result:='mmSPI_WF_LIFETIME_DEBUG'; mmSPI_SLAVE_DEBUG_BUSY :Result:='mmSPI_SLAVE_DEBUG_BUSY'; mmSPI_LB_CTR_CTRL :Result:='mmSPI_LB_CTR_CTRL'; mmSPI_LB_CU_MASK :Result:='mmSPI_LB_CU_MASK'; mmSPI_LB_DATA_REG :Result:='mmSPI_LB_DATA_REG'; mmSPI_PG_ENABLE_STATIC_CU_MASK :Result:='mmSPI_PG_ENABLE_STATIC_CU_MASK'; mmSPI_GDS_CREDITS :Result:='mmSPI_GDS_CREDITS'; mmSPI_SX_EXPORT_BUFFER_SIZES :Result:='mmSPI_SX_EXPORT_BUFFER_SIZES'; mmSPI_SX_SCOREBOARD_BUFFER_SIZES :Result:='mmSPI_SX_SCOREBOARD_BUFFER_SIZES'; mmSPI_CSQ_WF_ACTIVE_STATUS :Result:='mmSPI_CSQ_WF_ACTIVE_STATUS'; mmSPI_CSQ_WF_ACTIVE_COUNT_0 :Result:='mmSPI_CSQ_WF_ACTIVE_COUNT_0'; mmSPI_CSQ_WF_ACTIVE_COUNT_1 :Result:='mmSPI_CSQ_WF_ACTIVE_COUNT_1'; mmSPI_CSQ_WF_ACTIVE_COUNT_2 :Result:='mmSPI_CSQ_WF_ACTIVE_COUNT_2'; mmSPI_CSQ_WF_ACTIVE_COUNT_3 :Result:='mmSPI_CSQ_WF_ACTIVE_COUNT_3'; mmSPI_CSQ_WF_ACTIVE_COUNT_4 :Result:='mmSPI_CSQ_WF_ACTIVE_COUNT_4'; mmSPI_CSQ_WF_ACTIVE_COUNT_5 :Result:='mmSPI_CSQ_WF_ACTIVE_COUNT_5'; mmSPI_CSQ_WF_ACTIVE_COUNT_6 :Result:='mmSPI_CSQ_WF_ACTIVE_COUNT_6'; mmSPI_CSQ_WF_ACTIVE_COUNT_7 :Result:='mmSPI_CSQ_WF_ACTIVE_COUNT_7'; mmSPI_P0_TRAP_SCREEN_PSBA_LO :Result:='mmSPI_P0_TRAP_SCREEN_PSBA_LO'; mmSPI_P0_TRAP_SCREEN_PSBA_HI :Result:='mmSPI_P0_TRAP_SCREEN_PSBA_HI'; mmSPI_P0_TRAP_SCREEN_PSMA_LO :Result:='mmSPI_P0_TRAP_SCREEN_PSMA_LO'; mmSPI_P0_TRAP_SCREEN_PSMA_HI :Result:='mmSPI_P0_TRAP_SCREEN_PSMA_HI'; mmSPI_P0_TRAP_SCREEN_GPR_MIN :Result:='mmSPI_P0_TRAP_SCREEN_GPR_MIN'; mmSPI_P1_TRAP_SCREEN_PSBA_LO :Result:='mmSPI_P1_TRAP_SCREEN_PSBA_LO'; mmSPI_P1_TRAP_SCREEN_PSBA_HI :Result:='mmSPI_P1_TRAP_SCREEN_PSBA_HI'; mmSPI_P1_TRAP_SCREEN_PSMA_LO :Result:='mmSPI_P1_TRAP_SCREEN_PSMA_LO'; mmSPI_P1_TRAP_SCREEN_PSMA_HI :Result:='mmSPI_P1_TRAP_SCREEN_PSMA_HI'; mmSPI_P1_TRAP_SCREEN_GPR_MIN :Result:='mmSPI_P1_TRAP_SCREEN_GPR_MIN'; mmDB_DEBUG :Result:='mmDB_DEBUG'; mmDB_DEBUG2 :Result:='mmDB_DEBUG2'; mmDB_DEBUG3 :Result:='mmDB_DEBUG3'; mmDB_DEBUG4 :Result:='mmDB_DEBUG4'; mmDB_CREDIT_LIMIT :Result:='mmDB_CREDIT_LIMIT'; mmDB_WATERMARKS :Result:='mmDB_WATERMARKS'; mmDB_SUBTILE_CONTROL :Result:='mmDB_SUBTILE_CONTROL'; mmDB_FREE_CACHELINES :Result:='mmDB_FREE_CACHELINES'; mmDB_FIFO_DEPTH1 :Result:='mmDB_FIFO_DEPTH1'; mmDB_FIFO_DEPTH2 :Result:='mmDB_FIFO_DEPTH2'; mmDB_RING_CONTROL :Result:='mmDB_RING_CONTROL'; mmDB_READ_DEBUG_0 :Result:='mmDB_READ_DEBUG_0'; mmDB_READ_DEBUG_1 :Result:='mmDB_READ_DEBUG_1'; mmDB_READ_DEBUG_2 :Result:='mmDB_READ_DEBUG_2'; mmDB_READ_DEBUG_3 :Result:='mmDB_READ_DEBUG_3'; mmDB_READ_DEBUG_4 :Result:='mmDB_READ_DEBUG_4'; mmDB_READ_DEBUG_5 :Result:='mmDB_READ_DEBUG_5'; mmDB_READ_DEBUG_6 :Result:='mmDB_READ_DEBUG_6'; mmDB_READ_DEBUG_7 :Result:='mmDB_READ_DEBUG_7'; mmDB_READ_DEBUG_8 :Result:='mmDB_READ_DEBUG_8'; mmDB_READ_DEBUG_9 :Result:='mmDB_READ_DEBUG_9'; mmDB_READ_DEBUG_A :Result:='mmDB_READ_DEBUG_A'; mmDB_READ_DEBUG_B :Result:='mmDB_READ_DEBUG_B'; mmDB_READ_DEBUG_C :Result:='mmDB_READ_DEBUG_C'; mmDB_READ_DEBUG_D :Result:='mmDB_READ_DEBUG_D'; mmDB_READ_DEBUG_E :Result:='mmDB_READ_DEBUG_E'; mmDB_READ_DEBUG_F :Result:='mmDB_READ_DEBUG_F'; mmGB_ADDR_CONFIG :Result:='mmGB_ADDR_CONFIG'; mmGB_BACKEND_MAP :Result:='mmGB_BACKEND_MAP'; mmGB_GPU_ID :Result:='mmGB_GPU_ID'; mmGB_TILE_MODE0 :Result:='mmGB_TILE_MODE0'; mmGB_TILE_MODE1 :Result:='mmGB_TILE_MODE1'; mmGB_TILE_MODE2 :Result:='mmGB_TILE_MODE2'; mmGB_TILE_MODE3 :Result:='mmGB_TILE_MODE3'; mmGB_TILE_MODE4 :Result:='mmGB_TILE_MODE4'; mmGB_TILE_MODE5 :Result:='mmGB_TILE_MODE5'; mmGB_TILE_MODE6 :Result:='mmGB_TILE_MODE6'; mmGB_TILE_MODE7 :Result:='mmGB_TILE_MODE7'; mmGB_TILE_MODE8 :Result:='mmGB_TILE_MODE8'; mmGB_TILE_MODE9 :Result:='mmGB_TILE_MODE9'; mmGB_TILE_MODE10 :Result:='mmGB_TILE_MODE10'; mmGB_TILE_MODE11 :Result:='mmGB_TILE_MODE11'; mmGB_TILE_MODE12 :Result:='mmGB_TILE_MODE12'; mmGB_TILE_MODE13 :Result:='mmGB_TILE_MODE13'; mmGB_TILE_MODE14 :Result:='mmGB_TILE_MODE14'; mmGB_TILE_MODE15 :Result:='mmGB_TILE_MODE15'; mmGB_TILE_MODE16 :Result:='mmGB_TILE_MODE16'; mmGB_TILE_MODE17 :Result:='mmGB_TILE_MODE17'; mmGB_TILE_MODE18 :Result:='mmGB_TILE_MODE18'; mmGB_TILE_MODE19 :Result:='mmGB_TILE_MODE19'; mmGB_TILE_MODE20 :Result:='mmGB_TILE_MODE20'; mmGB_TILE_MODE21 :Result:='mmGB_TILE_MODE21'; mmGB_TILE_MODE22 :Result:='mmGB_TILE_MODE22'; mmGB_TILE_MODE23 :Result:='mmGB_TILE_MODE23'; mmGB_TILE_MODE24 :Result:='mmGB_TILE_MODE24'; mmGB_TILE_MODE25 :Result:='mmGB_TILE_MODE25'; mmGB_TILE_MODE26 :Result:='mmGB_TILE_MODE26'; mmGB_TILE_MODE27 :Result:='mmGB_TILE_MODE27'; mmGB_TILE_MODE28 :Result:='mmGB_TILE_MODE28'; mmGB_TILE_MODE29 :Result:='mmGB_TILE_MODE29'; mmGB_TILE_MODE30 :Result:='mmGB_TILE_MODE30'; mmGB_TILE_MODE31 :Result:='mmGB_TILE_MODE31'; mmGB_MACROTILE_MODE0 :Result:='mmGB_MACROTILE_MODE0'; mmGB_MACROTILE_MODE1 :Result:='mmGB_MACROTILE_MODE1'; mmGB_MACROTILE_MODE2 :Result:='mmGB_MACROTILE_MODE2'; mmGB_MACROTILE_MODE3 :Result:='mmGB_MACROTILE_MODE3'; mmGB_MACROTILE_MODE4 :Result:='mmGB_MACROTILE_MODE4'; mmGB_MACROTILE_MODE5 :Result:='mmGB_MACROTILE_MODE5'; mmGB_MACROTILE_MODE6 :Result:='mmGB_MACROTILE_MODE6'; mmGB_MACROTILE_MODE7 :Result:='mmGB_MACROTILE_MODE7'; mmGB_MACROTILE_MODE8 :Result:='mmGB_MACROTILE_MODE8'; mmGB_MACROTILE_MODE9 :Result:='mmGB_MACROTILE_MODE9'; mmGB_MACROTILE_MODE10 :Result:='mmGB_MACROTILE_MODE10'; mmGB_MACROTILE_MODE11 :Result:='mmGB_MACROTILE_MODE11'; mmGB_MACROTILE_MODE12 :Result:='mmGB_MACROTILE_MODE12'; mmGB_MACROTILE_MODE13 :Result:='mmGB_MACROTILE_MODE13'; mmGB_MACROTILE_MODE14 :Result:='mmGB_MACROTILE_MODE14'; mmGB_MACROTILE_MODE15 :Result:='mmGB_MACROTILE_MODE15'; mmCB_HW_CONTROL_3 :Result:='mmCB_HW_CONTROL_3'; mmCB_HW_CONTROL :Result:='mmCB_HW_CONTROL'; mmCB_HW_CONTROL_1 :Result:='mmCB_HW_CONTROL_1'; mmCB_HW_CONTROL_2 :Result:='mmCB_HW_CONTROL_2'; mmCB_DCC_CONFIG :Result:='mmCB_DCC_CONFIG'; mmCB_DEBUG_BUS_1 :Result:='mmCB_DEBUG_BUS_1'; mmCB_DEBUG_BUS_2 :Result:='mmCB_DEBUG_BUS_2'; mmCB_DEBUG_BUS_13 :Result:='mmCB_DEBUG_BUS_13'; mmCB_DEBUG_BUS_14 :Result:='mmCB_DEBUG_BUS_14'; mmCB_DEBUG_BUS_15 :Result:='mmCB_DEBUG_BUS_15'; mmCB_DEBUG_BUS_16 :Result:='mmCB_DEBUG_BUS_16'; mmCB_DEBUG_BUS_17 :Result:='mmCB_DEBUG_BUS_17'; mmCB_DEBUG_BUS_18 :Result:='mmCB_DEBUG_BUS_18'; mmCB_DEBUG_BUS_19 :Result:='mmCB_DEBUG_BUS_19'; mmCB_DEBUG_BUS_20 :Result:='mmCB_DEBUG_BUS_20'; mmCB_DEBUG_BUS_21 :Result:='mmCB_DEBUG_BUS_21'; mmCB_DEBUG_BUS_22 :Result:='mmCB_DEBUG_BUS_22'; mmSPI_SHADER_TBA_LO_PS :Result:='mmSPI_SHADER_TBA_LO_PS'; mmSPI_SHADER_TBA_HI_PS :Result:='mmSPI_SHADER_TBA_HI_PS'; mmSPI_SHADER_TMA_LO_PS :Result:='mmSPI_SHADER_TMA_LO_PS'; mmSPI_SHADER_TMA_HI_PS :Result:='mmSPI_SHADER_TMA_HI_PS'; mmSPI_SHADER_PGM_RSRC3_PS :Result:='mmSPI_SHADER_PGM_RSRC3_PS'; mmSPI_SHADER_PGM_LO_PS :Result:='mmSPI_SHADER_PGM_LO_PS'; mmSPI_SHADER_PGM_HI_PS :Result:='mmSPI_SHADER_PGM_HI_PS'; mmSPI_SHADER_PGM_RSRC1_PS :Result:='mmSPI_SHADER_PGM_RSRC1_PS'; mmSPI_SHADER_PGM_RSRC2_PS :Result:='mmSPI_SHADER_PGM_RSRC2_PS'; mmSPI_SHADER_USER_DATA_PS_0 :Result:='mmSPI_SHADER_USER_DATA_PS_0'; mmSPI_SHADER_USER_DATA_PS_1 :Result:='mmSPI_SHADER_USER_DATA_PS_1'; mmSPI_SHADER_USER_DATA_PS_2 :Result:='mmSPI_SHADER_USER_DATA_PS_2'; mmSPI_SHADER_USER_DATA_PS_3 :Result:='mmSPI_SHADER_USER_DATA_PS_3'; mmSPI_SHADER_USER_DATA_PS_4 :Result:='mmSPI_SHADER_USER_DATA_PS_4'; mmSPI_SHADER_USER_DATA_PS_5 :Result:='mmSPI_SHADER_USER_DATA_PS_5'; mmSPI_SHADER_USER_DATA_PS_6 :Result:='mmSPI_SHADER_USER_DATA_PS_6'; mmSPI_SHADER_USER_DATA_PS_7 :Result:='mmSPI_SHADER_USER_DATA_PS_7'; mmSPI_SHADER_USER_DATA_PS_8 :Result:='mmSPI_SHADER_USER_DATA_PS_8'; mmSPI_SHADER_USER_DATA_PS_9 :Result:='mmSPI_SHADER_USER_DATA_PS_9'; mmSPI_SHADER_USER_DATA_PS_10 :Result:='mmSPI_SHADER_USER_DATA_PS_10'; mmSPI_SHADER_USER_DATA_PS_11 :Result:='mmSPI_SHADER_USER_DATA_PS_11'; mmSPI_SHADER_USER_DATA_PS_12 :Result:='mmSPI_SHADER_USER_DATA_PS_12'; mmSPI_SHADER_USER_DATA_PS_13 :Result:='mmSPI_SHADER_USER_DATA_PS_13'; mmSPI_SHADER_USER_DATA_PS_14 :Result:='mmSPI_SHADER_USER_DATA_PS_14'; mmSPI_SHADER_USER_DATA_PS_15 :Result:='mmSPI_SHADER_USER_DATA_PS_15'; mmSPI_SHADER_TBA_LO_VS :Result:='mmSPI_SHADER_TBA_LO_VS'; mmSPI_SHADER_TBA_HI_VS :Result:='mmSPI_SHADER_TBA_HI_VS'; mmSPI_SHADER_TMA_LO_VS :Result:='mmSPI_SHADER_TMA_LO_VS'; mmSPI_SHADER_TMA_HI_VS :Result:='mmSPI_SHADER_TMA_HI_VS'; mmSPI_SHADER_PGM_RSRC3_VS :Result:='mmSPI_SHADER_PGM_RSRC3_VS'; mmSPI_SHADER_LATE_ALLOC_VS :Result:='mmSPI_SHADER_LATE_ALLOC_VS'; mmSPI_SHADER_PGM_LO_VS :Result:='mmSPI_SHADER_PGM_LO_VS'; mmSPI_SHADER_PGM_HI_VS :Result:='mmSPI_SHADER_PGM_HI_VS'; mmSPI_SHADER_PGM_RSRC1_VS :Result:='mmSPI_SHADER_PGM_RSRC1_VS'; mmSPI_SHADER_PGM_RSRC2_VS :Result:='mmSPI_SHADER_PGM_RSRC2_VS'; mmSPI_SHADER_USER_DATA_VS_0 :Result:='mmSPI_SHADER_USER_DATA_VS_0'; mmSPI_SHADER_USER_DATA_VS_1 :Result:='mmSPI_SHADER_USER_DATA_VS_1'; mmSPI_SHADER_USER_DATA_VS_2 :Result:='mmSPI_SHADER_USER_DATA_VS_2'; mmSPI_SHADER_USER_DATA_VS_3 :Result:='mmSPI_SHADER_USER_DATA_VS_3'; mmSPI_SHADER_USER_DATA_VS_4 :Result:='mmSPI_SHADER_USER_DATA_VS_4'; mmSPI_SHADER_USER_DATA_VS_5 :Result:='mmSPI_SHADER_USER_DATA_VS_5'; mmSPI_SHADER_USER_DATA_VS_6 :Result:='mmSPI_SHADER_USER_DATA_VS_6'; mmSPI_SHADER_USER_DATA_VS_7 :Result:='mmSPI_SHADER_USER_DATA_VS_7'; mmSPI_SHADER_USER_DATA_VS_8 :Result:='mmSPI_SHADER_USER_DATA_VS_8'; mmSPI_SHADER_USER_DATA_VS_9 :Result:='mmSPI_SHADER_USER_DATA_VS_9'; mmSPI_SHADER_USER_DATA_VS_10 :Result:='mmSPI_SHADER_USER_DATA_VS_10'; mmSPI_SHADER_USER_DATA_VS_11 :Result:='mmSPI_SHADER_USER_DATA_VS_11'; mmSPI_SHADER_USER_DATA_VS_12 :Result:='mmSPI_SHADER_USER_DATA_VS_12'; mmSPI_SHADER_USER_DATA_VS_13 :Result:='mmSPI_SHADER_USER_DATA_VS_13'; mmSPI_SHADER_USER_DATA_VS_14 :Result:='mmSPI_SHADER_USER_DATA_VS_14'; mmSPI_SHADER_USER_DATA_VS_15 :Result:='mmSPI_SHADER_USER_DATA_VS_15'; mmSPI_SHADER_PGM_RSRC2_ES_VS :Result:='mmSPI_SHADER_PGM_RSRC2_ES_VS'; mmSPI_SHADER_PGM_RSRC2_LS_VS :Result:='mmSPI_SHADER_PGM_RSRC2_LS_VS'; mmSPI_SHADER_TBA_LO_GS :Result:='mmSPI_SHADER_TBA_LO_GS'; mmSPI_SHADER_TBA_HI_GS :Result:='mmSPI_SHADER_TBA_HI_GS'; mmSPI_SHADER_TMA_LO_GS :Result:='mmSPI_SHADER_TMA_LO_GS'; mmSPI_SHADER_TMA_HI_GS :Result:='mmSPI_SHADER_TMA_HI_GS'; mmSPI_SHADER_PGM_RSRC3_GS :Result:='mmSPI_SHADER_PGM_RSRC3_GS'; mmSPI_SHADER_PGM_LO_GS :Result:='mmSPI_SHADER_PGM_LO_GS'; mmSPI_SHADER_PGM_HI_GS :Result:='mmSPI_SHADER_PGM_HI_GS'; mmSPI_SHADER_PGM_RSRC1_GS :Result:='mmSPI_SHADER_PGM_RSRC1_GS'; mmSPI_SHADER_PGM_RSRC2_GS :Result:='mmSPI_SHADER_PGM_RSRC2_GS'; mmSPI_SHADER_USER_DATA_GS_0 :Result:='mmSPI_SHADER_USER_DATA_GS_0'; mmSPI_SHADER_USER_DATA_GS_1 :Result:='mmSPI_SHADER_USER_DATA_GS_1'; mmSPI_SHADER_USER_DATA_GS_2 :Result:='mmSPI_SHADER_USER_DATA_GS_2'; mmSPI_SHADER_USER_DATA_GS_3 :Result:='mmSPI_SHADER_USER_DATA_GS_3'; mmSPI_SHADER_USER_DATA_GS_4 :Result:='mmSPI_SHADER_USER_DATA_GS_4'; mmSPI_SHADER_USER_DATA_GS_5 :Result:='mmSPI_SHADER_USER_DATA_GS_5'; mmSPI_SHADER_USER_DATA_GS_6 :Result:='mmSPI_SHADER_USER_DATA_GS_6'; mmSPI_SHADER_USER_DATA_GS_7 :Result:='mmSPI_SHADER_USER_DATA_GS_7'; mmSPI_SHADER_USER_DATA_GS_8 :Result:='mmSPI_SHADER_USER_DATA_GS_8'; mmSPI_SHADER_USER_DATA_GS_9 :Result:='mmSPI_SHADER_USER_DATA_GS_9'; mmSPI_SHADER_USER_DATA_GS_10 :Result:='mmSPI_SHADER_USER_DATA_GS_10'; mmSPI_SHADER_USER_DATA_GS_11 :Result:='mmSPI_SHADER_USER_DATA_GS_11'; mmSPI_SHADER_USER_DATA_GS_12 :Result:='mmSPI_SHADER_USER_DATA_GS_12'; mmSPI_SHADER_USER_DATA_GS_13 :Result:='mmSPI_SHADER_USER_DATA_GS_13'; mmSPI_SHADER_USER_DATA_GS_14 :Result:='mmSPI_SHADER_USER_DATA_GS_14'; mmSPI_SHADER_USER_DATA_GS_15 :Result:='mmSPI_SHADER_USER_DATA_GS_15'; mmSPI_SHADER_PGM_RSRC2_ES_GS :Result:='mmSPI_SHADER_PGM_RSRC2_ES_GS'; mmSPI_SHADER_TBA_LO_ES :Result:='mmSPI_SHADER_TBA_LO_ES'; mmSPI_SHADER_TBA_HI_ES :Result:='mmSPI_SHADER_TBA_HI_ES'; mmSPI_SHADER_TMA_LO_ES :Result:='mmSPI_SHADER_TMA_LO_ES'; mmSPI_SHADER_TMA_HI_ES :Result:='mmSPI_SHADER_TMA_HI_ES'; mmSPI_SHADER_PGM_RSRC3_ES :Result:='mmSPI_SHADER_PGM_RSRC3_ES'; mmSPI_SHADER_PGM_LO_ES :Result:='mmSPI_SHADER_PGM_LO_ES'; mmSPI_SHADER_PGM_HI_ES :Result:='mmSPI_SHADER_PGM_HI_ES'; mmSPI_SHADER_PGM_RSRC1_ES :Result:='mmSPI_SHADER_PGM_RSRC1_ES'; mmSPI_SHADER_PGM_RSRC2_ES :Result:='mmSPI_SHADER_PGM_RSRC2_ES'; mmSPI_SHADER_USER_DATA_ES_0 :Result:='mmSPI_SHADER_USER_DATA_ES_0'; mmSPI_SHADER_USER_DATA_ES_1 :Result:='mmSPI_SHADER_USER_DATA_ES_1'; mmSPI_SHADER_USER_DATA_ES_2 :Result:='mmSPI_SHADER_USER_DATA_ES_2'; mmSPI_SHADER_USER_DATA_ES_3 :Result:='mmSPI_SHADER_USER_DATA_ES_3'; mmSPI_SHADER_USER_DATA_ES_4 :Result:='mmSPI_SHADER_USER_DATA_ES_4'; mmSPI_SHADER_USER_DATA_ES_5 :Result:='mmSPI_SHADER_USER_DATA_ES_5'; mmSPI_SHADER_USER_DATA_ES_6 :Result:='mmSPI_SHADER_USER_DATA_ES_6'; mmSPI_SHADER_USER_DATA_ES_7 :Result:='mmSPI_SHADER_USER_DATA_ES_7'; mmSPI_SHADER_USER_DATA_ES_8 :Result:='mmSPI_SHADER_USER_DATA_ES_8'; mmSPI_SHADER_USER_DATA_ES_9 :Result:='mmSPI_SHADER_USER_DATA_ES_9'; mmSPI_SHADER_USER_DATA_ES_10 :Result:='mmSPI_SHADER_USER_DATA_ES_10'; mmSPI_SHADER_USER_DATA_ES_11 :Result:='mmSPI_SHADER_USER_DATA_ES_11'; mmSPI_SHADER_USER_DATA_ES_12 :Result:='mmSPI_SHADER_USER_DATA_ES_12'; mmSPI_SHADER_USER_DATA_ES_13 :Result:='mmSPI_SHADER_USER_DATA_ES_13'; mmSPI_SHADER_USER_DATA_ES_14 :Result:='mmSPI_SHADER_USER_DATA_ES_14'; mmSPI_SHADER_USER_DATA_ES_15 :Result:='mmSPI_SHADER_USER_DATA_ES_15'; mmSPI_SHADER_PGM_RSRC2_LS_ES :Result:='mmSPI_SHADER_PGM_RSRC2_LS_ES'; mmSPI_SHADER_TBA_LO_HS :Result:='mmSPI_SHADER_TBA_LO_HS'; mmSPI_SHADER_TBA_HI_HS :Result:='mmSPI_SHADER_TBA_HI_HS'; mmSPI_SHADER_TMA_LO_HS :Result:='mmSPI_SHADER_TMA_LO_HS'; mmSPI_SHADER_TMA_HI_HS :Result:='mmSPI_SHADER_TMA_HI_HS'; mmSPI_SHADER_PGM_RSRC3_HS :Result:='mmSPI_SHADER_PGM_RSRC3_HS'; mmSPI_SHADER_PGM_LO_HS :Result:='mmSPI_SHADER_PGM_LO_HS'; mmSPI_SHADER_PGM_HI_HS :Result:='mmSPI_SHADER_PGM_HI_HS'; mmSPI_SHADER_PGM_RSRC1_HS :Result:='mmSPI_SHADER_PGM_RSRC1_HS'; mmSPI_SHADER_PGM_RSRC2_HS :Result:='mmSPI_SHADER_PGM_RSRC2_HS'; mmSPI_SHADER_USER_DATA_HS_0 :Result:='mmSPI_SHADER_USER_DATA_HS_0'; mmSPI_SHADER_USER_DATA_HS_1 :Result:='mmSPI_SHADER_USER_DATA_HS_1'; mmSPI_SHADER_USER_DATA_HS_2 :Result:='mmSPI_SHADER_USER_DATA_HS_2'; mmSPI_SHADER_USER_DATA_HS_3 :Result:='mmSPI_SHADER_USER_DATA_HS_3'; mmSPI_SHADER_USER_DATA_HS_4 :Result:='mmSPI_SHADER_USER_DATA_HS_4'; mmSPI_SHADER_USER_DATA_HS_5 :Result:='mmSPI_SHADER_USER_DATA_HS_5'; mmSPI_SHADER_USER_DATA_HS_6 :Result:='mmSPI_SHADER_USER_DATA_HS_6'; mmSPI_SHADER_USER_DATA_HS_7 :Result:='mmSPI_SHADER_USER_DATA_HS_7'; mmSPI_SHADER_USER_DATA_HS_8 :Result:='mmSPI_SHADER_USER_DATA_HS_8'; mmSPI_SHADER_USER_DATA_HS_9 :Result:='mmSPI_SHADER_USER_DATA_HS_9'; mmSPI_SHADER_USER_DATA_HS_10 :Result:='mmSPI_SHADER_USER_DATA_HS_10'; mmSPI_SHADER_USER_DATA_HS_11 :Result:='mmSPI_SHADER_USER_DATA_HS_11'; mmSPI_SHADER_USER_DATA_HS_12 :Result:='mmSPI_SHADER_USER_DATA_HS_12'; mmSPI_SHADER_USER_DATA_HS_13 :Result:='mmSPI_SHADER_USER_DATA_HS_13'; mmSPI_SHADER_USER_DATA_HS_14 :Result:='mmSPI_SHADER_USER_DATA_HS_14'; mmSPI_SHADER_USER_DATA_HS_15 :Result:='mmSPI_SHADER_USER_DATA_HS_15'; mmSPI_SHADER_PGM_RSRC2_LS_HS :Result:='mmSPI_SHADER_PGM_RSRC2_LS_HS'; mmSPI_SHADER_TBA_LO_LS :Result:='mmSPI_SHADER_TBA_LO_LS'; mmSPI_SHADER_TBA_HI_LS :Result:='mmSPI_SHADER_TBA_HI_LS'; mmSPI_SHADER_TMA_LO_LS :Result:='mmSPI_SHADER_TMA_LO_LS'; mmSPI_SHADER_TMA_HI_LS :Result:='mmSPI_SHADER_TMA_HI_LS'; mmSPI_SHADER_PGM_RSRC3_LS :Result:='mmSPI_SHADER_PGM_RSRC3_LS'; mmSPI_SHADER_PGM_LO_LS :Result:='mmSPI_SHADER_PGM_LO_LS'; mmSPI_SHADER_PGM_HI_LS :Result:='mmSPI_SHADER_PGM_HI_LS'; mmSPI_SHADER_PGM_RSRC1_LS :Result:='mmSPI_SHADER_PGM_RSRC1_LS'; mmSPI_SHADER_PGM_RSRC2_LS :Result:='mmSPI_SHADER_PGM_RSRC2_LS'; mmSPI_SHADER_USER_DATA_LS_0 :Result:='mmSPI_SHADER_USER_DATA_LS_0'; mmSPI_SHADER_USER_DATA_LS_1 :Result:='mmSPI_SHADER_USER_DATA_LS_1'; mmSPI_SHADER_USER_DATA_LS_2 :Result:='mmSPI_SHADER_USER_DATA_LS_2'; mmSPI_SHADER_USER_DATA_LS_3 :Result:='mmSPI_SHADER_USER_DATA_LS_3'; mmSPI_SHADER_USER_DATA_LS_4 :Result:='mmSPI_SHADER_USER_DATA_LS_4'; mmSPI_SHADER_USER_DATA_LS_5 :Result:='mmSPI_SHADER_USER_DATA_LS_5'; mmSPI_SHADER_USER_DATA_LS_6 :Result:='mmSPI_SHADER_USER_DATA_LS_6'; mmSPI_SHADER_USER_DATA_LS_7 :Result:='mmSPI_SHADER_USER_DATA_LS_7'; mmSPI_SHADER_USER_DATA_LS_8 :Result:='mmSPI_SHADER_USER_DATA_LS_8'; mmSPI_SHADER_USER_DATA_LS_9 :Result:='mmSPI_SHADER_USER_DATA_LS_9'; mmSPI_SHADER_USER_DATA_LS_10 :Result:='mmSPI_SHADER_USER_DATA_LS_10'; mmSPI_SHADER_USER_DATA_LS_11 :Result:='mmSPI_SHADER_USER_DATA_LS_11'; mmSPI_SHADER_USER_DATA_LS_12 :Result:='mmSPI_SHADER_USER_DATA_LS_12'; mmSPI_SHADER_USER_DATA_LS_13 :Result:='mmSPI_SHADER_USER_DATA_LS_13'; mmSPI_SHADER_USER_DATA_LS_14 :Result:='mmSPI_SHADER_USER_DATA_LS_14'; mmSPI_SHADER_USER_DATA_LS_15 :Result:='mmSPI_SHADER_USER_DATA_LS_15'; mmCOMPUTE_DISPATCH_INITIATOR :Result:='mmCOMPUTE_DISPATCH_INITIATOR'; mmCOMPUTE_DIM_X :Result:='mmCOMPUTE_DIM_X'; mmCOMPUTE_DIM_Y :Result:='mmCOMPUTE_DIM_Y'; mmCOMPUTE_DIM_Z :Result:='mmCOMPUTE_DIM_Z'; mmCOMPUTE_START_X :Result:='mmCOMPUTE_START_X'; mmCOMPUTE_START_Y :Result:='mmCOMPUTE_START_Y'; mmCOMPUTE_START_Z :Result:='mmCOMPUTE_START_Z'; mmCOMPUTE_NUM_THREAD_X :Result:='mmCOMPUTE_NUM_THREAD_X'; mmCOMPUTE_NUM_THREAD_Y :Result:='mmCOMPUTE_NUM_THREAD_Y'; mmCOMPUTE_NUM_THREAD_Z :Result:='mmCOMPUTE_NUM_THREAD_Z'; mmCOMPUTE_PIPELINESTAT_ENABLE :Result:='mmCOMPUTE_PIPELINESTAT_ENABLE'; mmCOMPUTE_PERFCOUNT_ENABLE :Result:='mmCOMPUTE_PERFCOUNT_ENABLE'; mmCOMPUTE_PGM_LO :Result:='mmCOMPUTE_PGM_LO'; mmCOMPUTE_PGM_HI :Result:='mmCOMPUTE_PGM_HI'; mmCOMPUTE_TBA_LO :Result:='mmCOMPUTE_TBA_LO'; mmCOMPUTE_TBA_HI :Result:='mmCOMPUTE_TBA_HI'; mmCOMPUTE_TMA_LO :Result:='mmCOMPUTE_TMA_LO'; mmCOMPUTE_TMA_HI :Result:='mmCOMPUTE_TMA_HI'; mmCOMPUTE_PGM_RSRC1 :Result:='mmCOMPUTE_PGM_RSRC1'; mmCOMPUTE_PGM_RSRC2 :Result:='mmCOMPUTE_PGM_RSRC2'; mmCOMPUTE_VMID :Result:='mmCOMPUTE_VMID'; mmCOMPUTE_RESOURCE_LIMITS :Result:='mmCOMPUTE_RESOURCE_LIMITS'; mmCOMPUTE_STATIC_THREAD_MGMT_SE0 :Result:='mmCOMPUTE_STATIC_THREAD_MGMT_SE0'; mmCOMPUTE_STATIC_THREAD_MGMT_SE1 :Result:='mmCOMPUTE_STATIC_THREAD_MGMT_SE1'; mmCOMPUTE_TMPRING_SIZE :Result:='mmCOMPUTE_TMPRING_SIZE'; mmCOMPUTE_STATIC_THREAD_MGMT_SE2 :Result:='mmCOMPUTE_STATIC_THREAD_MGMT_SE2'; mmCOMPUTE_STATIC_THREAD_MGMT_SE3 :Result:='mmCOMPUTE_STATIC_THREAD_MGMT_SE3'; mmCOMPUTE_RESTART_X :Result:='mmCOMPUTE_RESTART_X'; mmCOMPUTE_RESTART_Y :Result:='mmCOMPUTE_RESTART_Y'; mmCOMPUTE_RESTART_Z :Result:='mmCOMPUTE_RESTART_Z'; mmCOMPUTE_THREAD_TRACE_ENABLE :Result:='mmCOMPUTE_THREAD_TRACE_ENABLE'; mmCOMPUTE_MISC_RESERVED :Result:='mmCOMPUTE_MISC_RESERVED'; mmCOMPUTE_DISPATCH_ID :Result:='mmCOMPUTE_DISPATCH_ID'; mmCOMPUTE_THREADGROUP_ID :Result:='mmCOMPUTE_THREADGROUP_ID'; mmCOMPUTE_RELAUNCH :Result:='mmCOMPUTE_RELAUNCH'; mmCOMPUTE_WAVE_RESTORE_ADDR_LO :Result:='mmCOMPUTE_WAVE_RESTORE_ADDR_LO'; mmCOMPUTE_WAVE_RESTORE_ADDR_HI :Result:='mmCOMPUTE_WAVE_RESTORE_ADDR_HI'; mmCOMPUTE_WAVE_RESTORE_CONTROL :Result:='mmCOMPUTE_WAVE_RESTORE_CONTROL'; mmCOMPUTE_USER_DATA_0 :Result:='mmCOMPUTE_USER_DATA_0'; mmCOMPUTE_USER_DATA_1 :Result:='mmCOMPUTE_USER_DATA_1'; mmCOMPUTE_USER_DATA_2 :Result:='mmCOMPUTE_USER_DATA_2'; mmCOMPUTE_USER_DATA_3 :Result:='mmCOMPUTE_USER_DATA_3'; mmCOMPUTE_USER_DATA_4 :Result:='mmCOMPUTE_USER_DATA_4'; mmCOMPUTE_USER_DATA_5 :Result:='mmCOMPUTE_USER_DATA_5'; mmCOMPUTE_USER_DATA_6 :Result:='mmCOMPUTE_USER_DATA_6'; mmCOMPUTE_USER_DATA_7 :Result:='mmCOMPUTE_USER_DATA_7'; mmCOMPUTE_USER_DATA_8 :Result:='mmCOMPUTE_USER_DATA_8'; mmCOMPUTE_USER_DATA_9 :Result:='mmCOMPUTE_USER_DATA_9'; mmCOMPUTE_USER_DATA_10 :Result:='mmCOMPUTE_USER_DATA_10'; mmCOMPUTE_USER_DATA_11 :Result:='mmCOMPUTE_USER_DATA_11'; mmCOMPUTE_USER_DATA_12 :Result:='mmCOMPUTE_USER_DATA_12'; mmCOMPUTE_USER_DATA_13 :Result:='mmCOMPUTE_USER_DATA_13'; mmCOMPUTE_USER_DATA_14 :Result:='mmCOMPUTE_USER_DATA_14'; mmCOMPUTE_USER_DATA_15 :Result:='mmCOMPUTE_USER_DATA_15'; mmCOMPUTE_NOWHERE :Result:='mmCOMPUTE_NOWHERE'; mmGB_EDC_MODE :Result:='mmGB_EDC_MODE'; mmSPI_ARB_PRIORITY :Result:='mmSPI_ARB_PRIORITY'; mmSPI_ARB_CYCLES_0 :Result:='mmSPI_ARB_CYCLES_0'; mmSPI_ARB_CYCLES_1 :Result:='mmSPI_ARB_CYCLES_1'; mmSPI_CDBG_SYS_GFX :Result:='mmSPI_CDBG_SYS_GFX'; mmSPI_CDBG_SYS_HP3D :Result:='mmSPI_CDBG_SYS_HP3D'; mmSPI_CDBG_SYS_CS0 :Result:='mmSPI_CDBG_SYS_CS0'; mmSPI_CDBG_SYS_CS1 :Result:='mmSPI_CDBG_SYS_CS1'; mmSPI_WCL_PIPE_PERCENT_GFX :Result:='mmSPI_WCL_PIPE_PERCENT_GFX'; mmSPI_WCL_PIPE_PERCENT_HP3D :Result:='mmSPI_WCL_PIPE_PERCENT_HP3D'; mmSPI_WCL_PIPE_PERCENT_CS0 :Result:='mmSPI_WCL_PIPE_PERCENT_CS0'; mmSPI_WCL_PIPE_PERCENT_CS1 :Result:='mmSPI_WCL_PIPE_PERCENT_CS1'; mmSPI_WCL_PIPE_PERCENT_CS2 :Result:='mmSPI_WCL_PIPE_PERCENT_CS2'; mmSPI_WCL_PIPE_PERCENT_CS3 :Result:='mmSPI_WCL_PIPE_PERCENT_CS3'; mmSPI_WCL_PIPE_PERCENT_CS4 :Result:='mmSPI_WCL_PIPE_PERCENT_CS4'; mmSPI_WCL_PIPE_PERCENT_CS5 :Result:='mmSPI_WCL_PIPE_PERCENT_CS5'; mmSPI_WCL_PIPE_PERCENT_CS6 :Result:='mmSPI_WCL_PIPE_PERCENT_CS6'; mmSPI_WCL_PIPE_PERCENT_CS7 :Result:='mmSPI_WCL_PIPE_PERCENT_CS7'; mmSPI_GDBG_WAVE_CNTL :Result:='mmSPI_GDBG_WAVE_CNTL'; mmSPI_GDBG_TRAP_CONFIG :Result:='mmSPI_GDBG_TRAP_CONFIG'; mmSPI_GDBG_TRAP_MASK :Result:='mmSPI_GDBG_TRAP_MASK'; mmSPI_GDBG_TBA_LO :Result:='mmSPI_GDBG_TBA_LO'; mmSPI_GDBG_TBA_HI :Result:='mmSPI_GDBG_TBA_HI'; mmSPI_GDBG_TMA_LO :Result:='mmSPI_GDBG_TMA_LO'; mmSPI_GDBG_TMA_HI :Result:='mmSPI_GDBG_TMA_HI'; mmSPI_GDBG_TRAP_DATA0 :Result:='mmSPI_GDBG_TRAP_DATA0'; mmSPI_GDBG_TRAP_DATA1 :Result:='mmSPI_GDBG_TRAP_DATA1'; mmSPI_RESET_DEBUG :Result:='mmSPI_RESET_DEBUG'; mmSPI_COMPUTE_QUEUE_RESET :Result:='mmSPI_COMPUTE_QUEUE_RESET'; mmSPI_RESOURCE_RESERVE_CU_0 :Result:='mmSPI_RESOURCE_RESERVE_CU_0'; mmSPI_RESOURCE_RESERVE_CU_1 :Result:='mmSPI_RESOURCE_RESERVE_CU_1'; mmSPI_RESOURCE_RESERVE_CU_2 :Result:='mmSPI_RESOURCE_RESERVE_CU_2'; mmSPI_RESOURCE_RESERVE_CU_3 :Result:='mmSPI_RESOURCE_RESERVE_CU_3'; mmSPI_RESOURCE_RESERVE_CU_4 :Result:='mmSPI_RESOURCE_RESERVE_CU_4'; mmSPI_RESOURCE_RESERVE_CU_5 :Result:='mmSPI_RESOURCE_RESERVE_CU_5'; mmSPI_RESOURCE_RESERVE_CU_6 :Result:='mmSPI_RESOURCE_RESERVE_CU_6'; mmSPI_RESOURCE_RESERVE_CU_7 :Result:='mmSPI_RESOURCE_RESERVE_CU_7'; mmSPI_RESOURCE_RESERVE_CU_8 :Result:='mmSPI_RESOURCE_RESERVE_CU_8'; mmSPI_RESOURCE_RESERVE_CU_9 :Result:='mmSPI_RESOURCE_RESERVE_CU_9'; mmSPI_RESOURCE_RESERVE_EN_CU_0 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_0'; mmSPI_RESOURCE_RESERVE_EN_CU_1 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_1'; mmSPI_RESOURCE_RESERVE_EN_CU_2 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_2'; mmSPI_RESOURCE_RESERVE_EN_CU_3 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_3'; mmSPI_RESOURCE_RESERVE_EN_CU_4 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_4'; mmSPI_RESOURCE_RESERVE_EN_CU_5 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_5'; mmSPI_RESOURCE_RESERVE_EN_CU_6 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_6'; mmSPI_RESOURCE_RESERVE_EN_CU_7 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_7'; mmSPI_RESOURCE_RESERVE_EN_CU_8 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_8'; mmSPI_RESOURCE_RESERVE_EN_CU_9 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_9'; mmSPI_RESOURCE_RESERVE_CU_10 :Result:='mmSPI_RESOURCE_RESERVE_CU_10'; mmSPI_RESOURCE_RESERVE_CU_11 :Result:='mmSPI_RESOURCE_RESERVE_CU_11'; mmSPI_RESOURCE_RESERVE_EN_CU_10 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_10'; mmSPI_RESOURCE_RESERVE_EN_CU_11 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_11'; mmSPI_RESOURCE_RESERVE_CU_12 :Result:='mmSPI_RESOURCE_RESERVE_CU_12'; mmSPI_RESOURCE_RESERVE_CU_13 :Result:='mmSPI_RESOURCE_RESERVE_CU_13'; mmSPI_RESOURCE_RESERVE_CU_14 :Result:='mmSPI_RESOURCE_RESERVE_CU_14'; mmSPI_RESOURCE_RESERVE_CU_15 :Result:='mmSPI_RESOURCE_RESERVE_CU_15'; mmSPI_RESOURCE_RESERVE_EN_CU_12 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_12'; mmSPI_RESOURCE_RESERVE_EN_CU_13 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_13'; mmSPI_RESOURCE_RESERVE_EN_CU_14 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_14'; mmSPI_RESOURCE_RESERVE_EN_CU_15 :Result:='mmSPI_RESOURCE_RESERVE_EN_CU_15'; mmSPI_COMPUTE_WF_CTX_SAVE :Result:='mmSPI_COMPUTE_WF_CTX_SAVE'; mmDB_RENDER_CONTROL :Result:='mmDB_RENDER_CONTROL'; mmDB_COUNT_CONTROL :Result:='mmDB_COUNT_CONTROL'; mmDB_DEPTH_VIEW :Result:='mmDB_DEPTH_VIEW'; mmDB_RENDER_OVERRIDE :Result:='mmDB_RENDER_OVERRIDE'; mmDB_RENDER_OVERRIDE2 :Result:='mmDB_RENDER_OVERRIDE2'; mmDB_HTILE_DATA_BASE :Result:='mmDB_HTILE_DATA_BASE'; mmDB_DEPTH_BOUNDS_MIN :Result:='mmDB_DEPTH_BOUNDS_MIN'; mmDB_DEPTH_BOUNDS_MAX :Result:='mmDB_DEPTH_BOUNDS_MAX'; mmDB_STENCIL_CLEAR :Result:='mmDB_STENCIL_CLEAR'; mmDB_DEPTH_CLEAR :Result:='mmDB_DEPTH_CLEAR'; mmPA_SC_SCREEN_SCISSOR_TL :Result:='mmPA_SC_SCREEN_SCISSOR_TL'; mmPA_SC_SCREEN_SCISSOR_BR :Result:='mmPA_SC_SCREEN_SCISSOR_BR'; mmDB_DEPTH_INFO :Result:='mmDB_DEPTH_INFO'; mmDB_Z_INFO :Result:='mmDB_Z_INFO'; mmDB_STENCIL_INFO :Result:='mmDB_STENCIL_INFO'; mmDB_Z_READ_BASE :Result:='mmDB_Z_READ_BASE'; mmDB_STENCIL_READ_BASE :Result:='mmDB_STENCIL_READ_BASE'; mmDB_Z_WRITE_BASE :Result:='mmDB_Z_WRITE_BASE'; mmDB_STENCIL_WRITE_BASE :Result:='mmDB_STENCIL_WRITE_BASE'; mmDB_DEPTH_SIZE :Result:='mmDB_DEPTH_SIZE'; mmDB_DEPTH_SLICE :Result:='mmDB_DEPTH_SLICE'; mmPA_SC_WINDOW_OFFSET :Result:='mmPA_SC_WINDOW_OFFSET'; mmPA_SC_WINDOW_SCISSOR_TL :Result:='mmPA_SC_WINDOW_SCISSOR_TL'; mmPA_SC_WINDOW_SCISSOR_BR :Result:='mmPA_SC_WINDOW_SCISSOR_BR'; mmPA_SC_CLIPRECT_RULE :Result:='mmPA_SC_CLIPRECT_RULE'; mmPA_SC_CLIPRECT_0_TL :Result:='mmPA_SC_CLIPRECT_0_TL'; mmPA_SC_CLIPRECT_0_BR :Result:='mmPA_SC_CLIPRECT_0_BR'; mmPA_SC_CLIPRECT_1_TL :Result:='mmPA_SC_CLIPRECT_1_TL'; mmPA_SC_CLIPRECT_1_BR :Result:='mmPA_SC_CLIPRECT_1_BR'; mmPA_SC_CLIPRECT_2_TL :Result:='mmPA_SC_CLIPRECT_2_TL'; mmPA_SC_CLIPRECT_2_BR :Result:='mmPA_SC_CLIPRECT_2_BR'; mmPA_SC_CLIPRECT_3_TL :Result:='mmPA_SC_CLIPRECT_3_TL'; mmPA_SC_CLIPRECT_3_BR :Result:='mmPA_SC_CLIPRECT_3_BR'; mmPA_SC_EDGERULE :Result:='mmPA_SC_EDGERULE'; mmPA_SU_HARDWARE_SCREEN_OFFSET :Result:='mmPA_SU_HARDWARE_SCREEN_OFFSET'; mmCB_TARGET_MASK :Result:='mmCB_TARGET_MASK'; mmCB_SHADER_MASK :Result:='mmCB_SHADER_MASK'; mmPA_SC_GENERIC_SCISSOR_TL :Result:='mmPA_SC_GENERIC_SCISSOR_TL'; mmPA_SC_GENERIC_SCISSOR_BR :Result:='mmPA_SC_GENERIC_SCISSOR_BR'; mmPA_SC_VPORT_SCISSOR_0_TL :Result:='mmPA_SC_VPORT_SCISSOR_0_TL'; mmPA_SC_VPORT_SCISSOR_0_BR :Result:='mmPA_SC_VPORT_SCISSOR_0_BR'; mmPA_SC_VPORT_SCISSOR_1_TL :Result:='mmPA_SC_VPORT_SCISSOR_1_TL'; mmPA_SC_VPORT_SCISSOR_1_BR :Result:='mmPA_SC_VPORT_SCISSOR_1_BR'; mmPA_SC_VPORT_SCISSOR_2_TL :Result:='mmPA_SC_VPORT_SCISSOR_2_TL'; mmPA_SC_VPORT_SCISSOR_2_BR :Result:='mmPA_SC_VPORT_SCISSOR_2_BR'; mmPA_SC_VPORT_SCISSOR_3_TL :Result:='mmPA_SC_VPORT_SCISSOR_3_TL'; mmPA_SC_VPORT_SCISSOR_3_BR :Result:='mmPA_SC_VPORT_SCISSOR_3_BR'; mmPA_SC_VPORT_SCISSOR_4_TL :Result:='mmPA_SC_VPORT_SCISSOR_4_TL'; mmPA_SC_VPORT_SCISSOR_4_BR :Result:='mmPA_SC_VPORT_SCISSOR_4_BR'; mmPA_SC_VPORT_SCISSOR_5_TL :Result:='mmPA_SC_VPORT_SCISSOR_5_TL'; mmPA_SC_VPORT_SCISSOR_5_BR :Result:='mmPA_SC_VPORT_SCISSOR_5_BR'; mmPA_SC_VPORT_SCISSOR_6_TL :Result:='mmPA_SC_VPORT_SCISSOR_6_TL'; mmPA_SC_VPORT_SCISSOR_6_BR :Result:='mmPA_SC_VPORT_SCISSOR_6_BR'; mmPA_SC_VPORT_SCISSOR_7_TL :Result:='mmPA_SC_VPORT_SCISSOR_7_TL'; mmPA_SC_VPORT_SCISSOR_7_BR :Result:='mmPA_SC_VPORT_SCISSOR_7_BR'; mmPA_SC_VPORT_SCISSOR_8_TL :Result:='mmPA_SC_VPORT_SCISSOR_8_TL'; mmPA_SC_VPORT_SCISSOR_8_BR :Result:='mmPA_SC_VPORT_SCISSOR_8_BR'; mmPA_SC_VPORT_SCISSOR_9_TL :Result:='mmPA_SC_VPORT_SCISSOR_9_TL'; mmPA_SC_VPORT_SCISSOR_9_BR :Result:='mmPA_SC_VPORT_SCISSOR_9_BR'; mmPA_SC_VPORT_SCISSOR_10_TL :Result:='mmPA_SC_VPORT_SCISSOR_10_TL'; mmPA_SC_VPORT_SCISSOR_10_BR :Result:='mmPA_SC_VPORT_SCISSOR_10_BR'; mmPA_SC_VPORT_SCISSOR_11_TL :Result:='mmPA_SC_VPORT_SCISSOR_11_TL'; mmPA_SC_VPORT_SCISSOR_11_BR :Result:='mmPA_SC_VPORT_SCISSOR_11_BR'; mmPA_SC_VPORT_SCISSOR_12_TL :Result:='mmPA_SC_VPORT_SCISSOR_12_TL'; mmPA_SC_VPORT_SCISSOR_12_BR :Result:='mmPA_SC_VPORT_SCISSOR_12_BR'; mmPA_SC_VPORT_SCISSOR_13_TL :Result:='mmPA_SC_VPORT_SCISSOR_13_TL'; mmPA_SC_VPORT_SCISSOR_13_BR :Result:='mmPA_SC_VPORT_SCISSOR_13_BR'; mmPA_SC_VPORT_SCISSOR_14_TL :Result:='mmPA_SC_VPORT_SCISSOR_14_TL'; mmPA_SC_VPORT_SCISSOR_14_BR :Result:='mmPA_SC_VPORT_SCISSOR_14_BR'; mmPA_SC_VPORT_SCISSOR_15_TL :Result:='mmPA_SC_VPORT_SCISSOR_15_TL'; mmPA_SC_VPORT_SCISSOR_15_BR :Result:='mmPA_SC_VPORT_SCISSOR_15_BR'; mmPA_SC_VPORT_ZMIN_0 :Result:='mmPA_SC_VPORT_ZMIN_0'; mmPA_SC_VPORT_ZMAX_0 :Result:='mmPA_SC_VPORT_ZMAX_0'; mmPA_SC_VPORT_ZMIN_1 :Result:='mmPA_SC_VPORT_ZMIN_1'; mmPA_SC_VPORT_ZMAX_1 :Result:='mmPA_SC_VPORT_ZMAX_1'; mmPA_SC_VPORT_ZMIN_2 :Result:='mmPA_SC_VPORT_ZMIN_2'; mmPA_SC_VPORT_ZMAX_2 :Result:='mmPA_SC_VPORT_ZMAX_2'; mmPA_SC_VPORT_ZMIN_3 :Result:='mmPA_SC_VPORT_ZMIN_3'; mmPA_SC_VPORT_ZMAX_3 :Result:='mmPA_SC_VPORT_ZMAX_3'; mmPA_SC_VPORT_ZMIN_4 :Result:='mmPA_SC_VPORT_ZMIN_4'; mmPA_SC_VPORT_ZMAX_4 :Result:='mmPA_SC_VPORT_ZMAX_4'; mmPA_SC_VPORT_ZMIN_5 :Result:='mmPA_SC_VPORT_ZMIN_5'; mmPA_SC_VPORT_ZMAX_5 :Result:='mmPA_SC_VPORT_ZMAX_5'; mmPA_SC_VPORT_ZMIN_6 :Result:='mmPA_SC_VPORT_ZMIN_6'; mmPA_SC_VPORT_ZMAX_6 :Result:='mmPA_SC_VPORT_ZMAX_6'; mmPA_SC_VPORT_ZMIN_7 :Result:='mmPA_SC_VPORT_ZMIN_7'; mmPA_SC_VPORT_ZMAX_7 :Result:='mmPA_SC_VPORT_ZMAX_7'; mmPA_SC_VPORT_ZMIN_8 :Result:='mmPA_SC_VPORT_ZMIN_8'; mmPA_SC_VPORT_ZMAX_8 :Result:='mmPA_SC_VPORT_ZMAX_8'; mmPA_SC_VPORT_ZMIN_9 :Result:='mmPA_SC_VPORT_ZMIN_9'; mmPA_SC_VPORT_ZMAX_9 :Result:='mmPA_SC_VPORT_ZMAX_9'; mmPA_SC_VPORT_ZMIN_10 :Result:='mmPA_SC_VPORT_ZMIN_10'; mmPA_SC_VPORT_ZMAX_10 :Result:='mmPA_SC_VPORT_ZMAX_10'; mmPA_SC_VPORT_ZMIN_11 :Result:='mmPA_SC_VPORT_ZMIN_11'; mmPA_SC_VPORT_ZMAX_11 :Result:='mmPA_SC_VPORT_ZMAX_11'; mmPA_SC_VPORT_ZMIN_12 :Result:='mmPA_SC_VPORT_ZMIN_12'; mmPA_SC_VPORT_ZMAX_12 :Result:='mmPA_SC_VPORT_ZMAX_12'; mmPA_SC_VPORT_ZMIN_13 :Result:='mmPA_SC_VPORT_ZMIN_13'; mmPA_SC_VPORT_ZMAX_13 :Result:='mmPA_SC_VPORT_ZMAX_13'; mmPA_SC_VPORT_ZMIN_14 :Result:='mmPA_SC_VPORT_ZMIN_14'; mmPA_SC_VPORT_ZMAX_14 :Result:='mmPA_SC_VPORT_ZMAX_14'; mmPA_SC_VPORT_ZMIN_15 :Result:='mmPA_SC_VPORT_ZMIN_15'; mmPA_SC_VPORT_ZMAX_15 :Result:='mmPA_SC_VPORT_ZMAX_15'; mmPA_SC_RASTER_CONFIG :Result:='mmPA_SC_RASTER_CONFIG'; mmPA_SC_RASTER_CONFIG_1 :Result:='mmPA_SC_RASTER_CONFIG_1'; mmVGT_MAX_VTX_INDX :Result:='mmVGT_MAX_VTX_INDX'; mmVGT_MIN_VTX_INDX :Result:='mmVGT_MIN_VTX_INDX'; mmVGT_INDX_OFFSET :Result:='mmVGT_INDX_OFFSET'; mmVGT_MULTI_PRIM_IB_RESET_INDX :Result:='mmVGT_MULTI_PRIM_IB_RESET_INDX'; mmCB_BLEND_RED :Result:='mmCB_BLEND_RED'; mmCB_BLEND_GREEN :Result:='mmCB_BLEND_GREEN'; mmCB_BLEND_BLUE :Result:='mmCB_BLEND_BLUE'; mmCB_BLEND_ALPHA :Result:='mmCB_BLEND_ALPHA'; mmCB_DCC_CONTROL :Result:='mmCB_DCC_CONTROL'; mmDB_STENCIL_CONTROL :Result:='mmDB_STENCIL_CONTROL'; mmDB_STENCILREFMASK :Result:='mmDB_STENCILREFMASK'; mmDB_STENCILREFMASK_BF :Result:='mmDB_STENCILREFMASK_BF'; mmPA_CL_VPORT_XSCALE :Result:='mmPA_CL_VPORT_XSCALE'; mmPA_CL_VPORT_XOFFSET :Result:='mmPA_CL_VPORT_XOFFSET'; mmPA_CL_VPORT_YSCALE :Result:='mmPA_CL_VPORT_YSCALE'; mmPA_CL_VPORT_YOFFSET :Result:='mmPA_CL_VPORT_YOFFSET'; mmPA_CL_VPORT_ZSCALE :Result:='mmPA_CL_VPORT_ZSCALE'; mmPA_CL_VPORT_ZOFFSET :Result:='mmPA_CL_VPORT_ZOFFSET'; mmPA_CL_VPORT_XSCALE_1 :Result:='mmPA_CL_VPORT_XSCALE_1'; mmPA_CL_VPORT_XOFFSET_1 :Result:='mmPA_CL_VPORT_XOFFSET_1'; mmPA_CL_VPORT_YSCALE_1 :Result:='mmPA_CL_VPORT_YSCALE_1'; mmPA_CL_VPORT_YOFFSET_1 :Result:='mmPA_CL_VPORT_YOFFSET_1'; mmPA_CL_VPORT_ZSCALE_1 :Result:='mmPA_CL_VPORT_ZSCALE_1'; mmPA_CL_VPORT_ZOFFSET_1 :Result:='mmPA_CL_VPORT_ZOFFSET_1'; mmPA_CL_VPORT_XSCALE_2 :Result:='mmPA_CL_VPORT_XSCALE_2'; mmPA_CL_VPORT_XOFFSET_2 :Result:='mmPA_CL_VPORT_XOFFSET_2'; mmPA_CL_VPORT_YSCALE_2 :Result:='mmPA_CL_VPORT_YSCALE_2'; mmPA_CL_VPORT_YOFFSET_2 :Result:='mmPA_CL_VPORT_YOFFSET_2'; mmPA_CL_VPORT_ZSCALE_2 :Result:='mmPA_CL_VPORT_ZSCALE_2'; mmPA_CL_VPORT_ZOFFSET_2 :Result:='mmPA_CL_VPORT_ZOFFSET_2'; mmPA_CL_VPORT_XSCALE_3 :Result:='mmPA_CL_VPORT_XSCALE_3'; mmPA_CL_VPORT_XOFFSET_3 :Result:='mmPA_CL_VPORT_XOFFSET_3'; mmPA_CL_VPORT_YSCALE_3 :Result:='mmPA_CL_VPORT_YSCALE_3'; mmPA_CL_VPORT_YOFFSET_3 :Result:='mmPA_CL_VPORT_YOFFSET_3'; mmPA_CL_VPORT_ZSCALE_3 :Result:='mmPA_CL_VPORT_ZSCALE_3'; mmPA_CL_VPORT_ZOFFSET_3 :Result:='mmPA_CL_VPORT_ZOFFSET_3'; mmPA_CL_VPORT_XSCALE_4 :Result:='mmPA_CL_VPORT_XSCALE_4'; mmPA_CL_VPORT_XOFFSET_4 :Result:='mmPA_CL_VPORT_XOFFSET_4'; mmPA_CL_VPORT_YSCALE_4 :Result:='mmPA_CL_VPORT_YSCALE_4'; mmPA_CL_VPORT_YOFFSET_4 :Result:='mmPA_CL_VPORT_YOFFSET_4'; mmPA_CL_VPORT_ZSCALE_4 :Result:='mmPA_CL_VPORT_ZSCALE_4'; mmPA_CL_VPORT_ZOFFSET_4 :Result:='mmPA_CL_VPORT_ZOFFSET_4'; mmPA_CL_VPORT_XSCALE_5 :Result:='mmPA_CL_VPORT_XSCALE_5'; mmPA_CL_VPORT_XOFFSET_5 :Result:='mmPA_CL_VPORT_XOFFSET_5'; mmPA_CL_VPORT_YSCALE_5 :Result:='mmPA_CL_VPORT_YSCALE_5'; mmPA_CL_VPORT_YOFFSET_5 :Result:='mmPA_CL_VPORT_YOFFSET_5'; mmPA_CL_VPORT_ZSCALE_5 :Result:='mmPA_CL_VPORT_ZSCALE_5'; mmPA_CL_VPORT_ZOFFSET_5 :Result:='mmPA_CL_VPORT_ZOFFSET_5'; mmPA_CL_VPORT_XSCALE_6 :Result:='mmPA_CL_VPORT_XSCALE_6'; mmPA_CL_VPORT_XOFFSET_6 :Result:='mmPA_CL_VPORT_XOFFSET_6'; mmPA_CL_VPORT_YSCALE_6 :Result:='mmPA_CL_VPORT_YSCALE_6'; mmPA_CL_VPORT_YOFFSET_6 :Result:='mmPA_CL_VPORT_YOFFSET_6'; mmPA_CL_VPORT_ZSCALE_6 :Result:='mmPA_CL_VPORT_ZSCALE_6'; mmPA_CL_VPORT_ZOFFSET_6 :Result:='mmPA_CL_VPORT_ZOFFSET_6'; mmPA_CL_VPORT_XSCALE_7 :Result:='mmPA_CL_VPORT_XSCALE_7'; mmPA_CL_VPORT_XOFFSET_7 :Result:='mmPA_CL_VPORT_XOFFSET_7'; mmPA_CL_VPORT_YSCALE_7 :Result:='mmPA_CL_VPORT_YSCALE_7'; mmPA_CL_VPORT_YOFFSET_7 :Result:='mmPA_CL_VPORT_YOFFSET_7'; mmPA_CL_VPORT_ZSCALE_7 :Result:='mmPA_CL_VPORT_ZSCALE_7'; mmPA_CL_VPORT_ZOFFSET_7 :Result:='mmPA_CL_VPORT_ZOFFSET_7'; mmPA_CL_VPORT_XSCALE_8 :Result:='mmPA_CL_VPORT_XSCALE_8'; mmPA_CL_VPORT_XOFFSET_8 :Result:='mmPA_CL_VPORT_XOFFSET_8'; mmPA_CL_VPORT_YSCALE_8 :Result:='mmPA_CL_VPORT_YSCALE_8'; mmPA_CL_VPORT_YOFFSET_8 :Result:='mmPA_CL_VPORT_YOFFSET_8'; mmPA_CL_VPORT_ZSCALE_8 :Result:='mmPA_CL_VPORT_ZSCALE_8'; mmPA_CL_VPORT_ZOFFSET_8 :Result:='mmPA_CL_VPORT_ZOFFSET_8'; mmPA_CL_VPORT_XSCALE_9 :Result:='mmPA_CL_VPORT_XSCALE_9'; mmPA_CL_VPORT_XOFFSET_9 :Result:='mmPA_CL_VPORT_XOFFSET_9'; mmPA_CL_VPORT_YSCALE_9 :Result:='mmPA_CL_VPORT_YSCALE_9'; mmPA_CL_VPORT_YOFFSET_9 :Result:='mmPA_CL_VPORT_YOFFSET_9'; mmPA_CL_VPORT_ZSCALE_9 :Result:='mmPA_CL_VPORT_ZSCALE_9'; mmPA_CL_VPORT_ZOFFSET_9 :Result:='mmPA_CL_VPORT_ZOFFSET_9'; mmPA_CL_VPORT_XSCALE_10 :Result:='mmPA_CL_VPORT_XSCALE_10'; mmPA_CL_VPORT_XOFFSET_10 :Result:='mmPA_CL_VPORT_XOFFSET_10'; mmPA_CL_VPORT_YSCALE_10 :Result:='mmPA_CL_VPORT_YSCALE_10'; mmPA_CL_VPORT_YOFFSET_10 :Result:='mmPA_CL_VPORT_YOFFSET_10'; mmPA_CL_VPORT_ZSCALE_10 :Result:='mmPA_CL_VPORT_ZSCALE_10'; mmPA_CL_VPORT_ZOFFSET_10 :Result:='mmPA_CL_VPORT_ZOFFSET_10'; mmPA_CL_VPORT_XSCALE_11 :Result:='mmPA_CL_VPORT_XSCALE_11'; mmPA_CL_VPORT_XOFFSET_11 :Result:='mmPA_CL_VPORT_XOFFSET_11'; mmPA_CL_VPORT_YSCALE_11 :Result:='mmPA_CL_VPORT_YSCALE_11'; mmPA_CL_VPORT_YOFFSET_11 :Result:='mmPA_CL_VPORT_YOFFSET_11'; mmPA_CL_VPORT_ZSCALE_11 :Result:='mmPA_CL_VPORT_ZSCALE_11'; mmPA_CL_VPORT_ZOFFSET_11 :Result:='mmPA_CL_VPORT_ZOFFSET_11'; mmPA_CL_VPORT_XSCALE_12 :Result:='mmPA_CL_VPORT_XSCALE_12'; mmPA_CL_VPORT_XOFFSET_12 :Result:='mmPA_CL_VPORT_XOFFSET_12'; mmPA_CL_VPORT_YSCALE_12 :Result:='mmPA_CL_VPORT_YSCALE_12'; mmPA_CL_VPORT_YOFFSET_12 :Result:='mmPA_CL_VPORT_YOFFSET_12'; mmPA_CL_VPORT_ZSCALE_12 :Result:='mmPA_CL_VPORT_ZSCALE_12'; mmPA_CL_VPORT_ZOFFSET_12 :Result:='mmPA_CL_VPORT_ZOFFSET_12'; mmPA_CL_VPORT_XSCALE_13 :Result:='mmPA_CL_VPORT_XSCALE_13'; mmPA_CL_VPORT_XOFFSET_13 :Result:='mmPA_CL_VPORT_XOFFSET_13'; mmPA_CL_VPORT_YSCALE_13 :Result:='mmPA_CL_VPORT_YSCALE_13'; mmPA_CL_VPORT_YOFFSET_13 :Result:='mmPA_CL_VPORT_YOFFSET_13'; mmPA_CL_VPORT_ZSCALE_13 :Result:='mmPA_CL_VPORT_ZSCALE_13'; mmPA_CL_VPORT_ZOFFSET_13 :Result:='mmPA_CL_VPORT_ZOFFSET_13'; mmPA_CL_VPORT_XSCALE_14 :Result:='mmPA_CL_VPORT_XSCALE_14'; mmPA_CL_VPORT_XOFFSET_14 :Result:='mmPA_CL_VPORT_XOFFSET_14'; mmPA_CL_VPORT_YSCALE_14 :Result:='mmPA_CL_VPORT_YSCALE_14'; mmPA_CL_VPORT_YOFFSET_14 :Result:='mmPA_CL_VPORT_YOFFSET_14'; mmPA_CL_VPORT_ZSCALE_14 :Result:='mmPA_CL_VPORT_ZSCALE_14'; mmPA_CL_VPORT_ZOFFSET_14 :Result:='mmPA_CL_VPORT_ZOFFSET_14'; mmPA_CL_VPORT_XSCALE_15 :Result:='mmPA_CL_VPORT_XSCALE_15'; mmPA_CL_VPORT_XOFFSET_15 :Result:='mmPA_CL_VPORT_XOFFSET_15'; mmPA_CL_VPORT_YSCALE_15 :Result:='mmPA_CL_VPORT_YSCALE_15'; mmPA_CL_VPORT_YOFFSET_15 :Result:='mmPA_CL_VPORT_YOFFSET_15'; mmPA_CL_VPORT_ZSCALE_15 :Result:='mmPA_CL_VPORT_ZSCALE_15'; mmPA_CL_VPORT_ZOFFSET_15 :Result:='mmPA_CL_VPORT_ZOFFSET_15'; mmPA_CL_UCP_0_X :Result:='mmPA_CL_UCP_0_X'; mmPA_CL_UCP_0_Y :Result:='mmPA_CL_UCP_0_Y'; mmPA_CL_UCP_0_Z :Result:='mmPA_CL_UCP_0_Z'; mmPA_CL_UCP_0_W :Result:='mmPA_CL_UCP_0_W'; mmPA_CL_UCP_1_X :Result:='mmPA_CL_UCP_1_X'; mmPA_CL_UCP_1_Y :Result:='mmPA_CL_UCP_1_Y'; mmPA_CL_UCP_1_Z :Result:='mmPA_CL_UCP_1_Z'; mmPA_CL_UCP_1_W :Result:='mmPA_CL_UCP_1_W'; mmPA_CL_UCP_2_X :Result:='mmPA_CL_UCP_2_X'; mmPA_CL_UCP_2_Y :Result:='mmPA_CL_UCP_2_Y'; mmPA_CL_UCP_2_Z :Result:='mmPA_CL_UCP_2_Z'; mmPA_CL_UCP_2_W :Result:='mmPA_CL_UCP_2_W'; mmPA_CL_UCP_3_X :Result:='mmPA_CL_UCP_3_X'; mmPA_CL_UCP_3_Y :Result:='mmPA_CL_UCP_3_Y'; mmPA_CL_UCP_3_Z :Result:='mmPA_CL_UCP_3_Z'; mmPA_CL_UCP_3_W :Result:='mmPA_CL_UCP_3_W'; mmPA_CL_UCP_4_X :Result:='mmPA_CL_UCP_4_X'; mmPA_CL_UCP_4_Y :Result:='mmPA_CL_UCP_4_Y'; mmPA_CL_UCP_4_Z :Result:='mmPA_CL_UCP_4_Z'; mmPA_CL_UCP_4_W :Result:='mmPA_CL_UCP_4_W'; mmPA_CL_UCP_5_X :Result:='mmPA_CL_UCP_5_X'; mmPA_CL_UCP_5_Y :Result:='mmPA_CL_UCP_5_Y'; mmPA_CL_UCP_5_Z :Result:='mmPA_CL_UCP_5_Z'; mmPA_CL_UCP_5_W :Result:='mmPA_CL_UCP_5_W'; mmSPI_PS_INPUT_CNTL_0 :Result:='mmSPI_PS_INPUT_CNTL_0'; mmSPI_PS_INPUT_CNTL_1 :Result:='mmSPI_PS_INPUT_CNTL_1'; mmSPI_PS_INPUT_CNTL_2 :Result:='mmSPI_PS_INPUT_CNTL_2'; mmSPI_PS_INPUT_CNTL_3 :Result:='mmSPI_PS_INPUT_CNTL_3'; mmSPI_PS_INPUT_CNTL_4 :Result:='mmSPI_PS_INPUT_CNTL_4'; mmSPI_PS_INPUT_CNTL_5 :Result:='mmSPI_PS_INPUT_CNTL_5'; mmSPI_PS_INPUT_CNTL_6 :Result:='mmSPI_PS_INPUT_CNTL_6'; mmSPI_PS_INPUT_CNTL_7 :Result:='mmSPI_PS_INPUT_CNTL_7'; mmSPI_PS_INPUT_CNTL_8 :Result:='mmSPI_PS_INPUT_CNTL_8'; mmSPI_PS_INPUT_CNTL_9 :Result:='mmSPI_PS_INPUT_CNTL_9'; mmSPI_PS_INPUT_CNTL_10 :Result:='mmSPI_PS_INPUT_CNTL_10'; mmSPI_PS_INPUT_CNTL_11 :Result:='mmSPI_PS_INPUT_CNTL_11'; mmSPI_PS_INPUT_CNTL_12 :Result:='mmSPI_PS_INPUT_CNTL_12'; mmSPI_PS_INPUT_CNTL_13 :Result:='mmSPI_PS_INPUT_CNTL_13'; mmSPI_PS_INPUT_CNTL_14 :Result:='mmSPI_PS_INPUT_CNTL_14'; mmSPI_PS_INPUT_CNTL_15 :Result:='mmSPI_PS_INPUT_CNTL_15'; mmSPI_PS_INPUT_CNTL_16 :Result:='mmSPI_PS_INPUT_CNTL_16'; mmSPI_PS_INPUT_CNTL_17 :Result:='mmSPI_PS_INPUT_CNTL_17'; mmSPI_PS_INPUT_CNTL_18 :Result:='mmSPI_PS_INPUT_CNTL_18'; mmSPI_PS_INPUT_CNTL_19 :Result:='mmSPI_PS_INPUT_CNTL_19'; mmSPI_PS_INPUT_CNTL_20 :Result:='mmSPI_PS_INPUT_CNTL_20'; mmSPI_PS_INPUT_CNTL_21 :Result:='mmSPI_PS_INPUT_CNTL_21'; mmSPI_PS_INPUT_CNTL_22 :Result:='mmSPI_PS_INPUT_CNTL_22'; mmSPI_PS_INPUT_CNTL_23 :Result:='mmSPI_PS_INPUT_CNTL_23'; mmSPI_PS_INPUT_CNTL_24 :Result:='mmSPI_PS_INPUT_CNTL_24'; mmSPI_PS_INPUT_CNTL_25 :Result:='mmSPI_PS_INPUT_CNTL_25'; mmSPI_PS_INPUT_CNTL_26 :Result:='mmSPI_PS_INPUT_CNTL_26'; mmSPI_PS_INPUT_CNTL_27 :Result:='mmSPI_PS_INPUT_CNTL_27'; mmSPI_PS_INPUT_CNTL_28 :Result:='mmSPI_PS_INPUT_CNTL_28'; mmSPI_PS_INPUT_CNTL_29 :Result:='mmSPI_PS_INPUT_CNTL_29'; mmSPI_PS_INPUT_CNTL_30 :Result:='mmSPI_PS_INPUT_CNTL_30'; mmSPI_PS_INPUT_CNTL_31 :Result:='mmSPI_PS_INPUT_CNTL_31'; mmSPI_VS_OUT_CONFIG :Result:='mmSPI_VS_OUT_CONFIG'; mmSPI_PS_INPUT_ENA :Result:='mmSPI_PS_INPUT_ENA'; mmSPI_PS_INPUT_ADDR :Result:='mmSPI_PS_INPUT_ADDR'; mmSPI_INTERP_CONTROL_0 :Result:='mmSPI_INTERP_CONTROL_0'; mmSPI_PS_IN_CONTROL :Result:='mmSPI_PS_IN_CONTROL'; mmSPI_BARYC_CNTL :Result:='mmSPI_BARYC_CNTL'; mmSPI_TMPRING_SIZE :Result:='mmSPI_TMPRING_SIZE'; mmSPI_SHADER_POS_FORMAT :Result:='mmSPI_SHADER_POS_FORMAT'; mmSPI_SHADER_Z_FORMAT :Result:='mmSPI_SHADER_Z_FORMAT'; mmSPI_SHADER_COL_FORMAT :Result:='mmSPI_SHADER_COL_FORMAT'; mmCB_BLEND0_CONTROL :Result:='mmCB_BLEND0_CONTROL'; mmCB_BLEND1_CONTROL :Result:='mmCB_BLEND1_CONTROL'; mmCB_BLEND2_CONTROL :Result:='mmCB_BLEND2_CONTROL'; mmCB_BLEND3_CONTROL :Result:='mmCB_BLEND3_CONTROL'; mmCB_BLEND4_CONTROL :Result:='mmCB_BLEND4_CONTROL'; mmCB_BLEND5_CONTROL :Result:='mmCB_BLEND5_CONTROL'; mmCB_BLEND6_CONTROL :Result:='mmCB_BLEND6_CONTROL'; mmCB_BLEND7_CONTROL :Result:='mmCB_BLEND7_CONTROL'; mmPA_CL_POINT_X_RAD :Result:='mmPA_CL_POINT_X_RAD'; mmPA_CL_POINT_Y_RAD :Result:='mmPA_CL_POINT_Y_RAD'; mmPA_CL_POINT_SIZE :Result:='mmPA_CL_POINT_SIZE'; mmPA_CL_POINT_CULL_RAD :Result:='mmPA_CL_POINT_CULL_RAD'; mmVGT_DMA_BASE_HI :Result:='mmVGT_DMA_BASE_HI'; mmVGT_DMA_BASE :Result:='mmVGT_DMA_BASE'; mmVGT_DRAW_INITIATOR :Result:='mmVGT_DRAW_INITIATOR'; mmVGT_IMMED_DATA :Result:='mmVGT_IMMED_DATA'; mmVGT_EVENT_ADDRESS_REG :Result:='mmVGT_EVENT_ADDRESS_REG'; mmDB_DEPTH_CONTROL :Result:='mmDB_DEPTH_CONTROL'; mmDB_EQAA :Result:='mmDB_EQAA'; mmCB_COLOR_CONTROL :Result:='mmCB_COLOR_CONTROL'; mmDB_SHADER_CONTROL :Result:='mmDB_SHADER_CONTROL'; mmPA_CL_CLIP_CNTL :Result:='mmPA_CL_CLIP_CNTL'; mmPA_SU_SC_MODE_CNTL :Result:='mmPA_SU_SC_MODE_CNTL'; mmPA_CL_VTE_CNTL :Result:='mmPA_CL_VTE_CNTL'; mmPA_CL_VS_OUT_CNTL :Result:='mmPA_CL_VS_OUT_CNTL'; mmPA_CL_NANINF_CNTL :Result:='mmPA_CL_NANINF_CNTL'; mmPA_SU_LINE_STIPPLE_CNTL :Result:='mmPA_SU_LINE_STIPPLE_CNTL'; mmPA_SU_LINE_STIPPLE_SCALE :Result:='mmPA_SU_LINE_STIPPLE_SCALE'; mmPA_SU_PRIM_FILTER_CNTL :Result:='mmPA_SU_PRIM_FILTER_CNTL'; mmPA_SU_POINT_SIZE :Result:='mmPA_SU_POINT_SIZE'; mmPA_SU_POINT_MINMAX :Result:='mmPA_SU_POINT_MINMAX'; mmPA_SU_LINE_CNTL :Result:='mmPA_SU_LINE_CNTL'; mmPA_SC_LINE_STIPPLE :Result:='mmPA_SC_LINE_STIPPLE'; mmVGT_OUTPUT_PATH_CNTL :Result:='mmVGT_OUTPUT_PATH_CNTL'; mmVGT_HOS_CNTL :Result:='mmVGT_HOS_CNTL'; mmVGT_HOS_MAX_TESS_LEVEL :Result:='mmVGT_HOS_MAX_TESS_LEVEL'; mmVGT_HOS_MIN_TESS_LEVEL :Result:='mmVGT_HOS_MIN_TESS_LEVEL'; mmVGT_HOS_REUSE_DEPTH :Result:='mmVGT_HOS_REUSE_DEPTH'; mmVGT_GROUP_PRIM_TYPE :Result:='mmVGT_GROUP_PRIM_TYPE'; mmVGT_GROUP_FIRST_DECR :Result:='mmVGT_GROUP_FIRST_DECR'; mmVGT_GROUP_DECR :Result:='mmVGT_GROUP_DECR'; mmVGT_GROUP_VECT_0_CNTL :Result:='mmVGT_GROUP_VECT_0_CNTL'; mmVGT_GROUP_VECT_1_CNTL :Result:='mmVGT_GROUP_VECT_1_CNTL'; mmVGT_GROUP_VECT_0_FMT_CNTL :Result:='mmVGT_GROUP_VECT_0_FMT_CNTL'; mmVGT_GROUP_VECT_1_FMT_CNTL :Result:='mmVGT_GROUP_VECT_1_FMT_CNTL'; mmVGT_GS_MODE :Result:='mmVGT_GS_MODE'; mmVGT_GS_ONCHIP_CNTL :Result:='mmVGT_GS_ONCHIP_CNTL'; mmPA_SC_MODE_CNTL_0 :Result:='mmPA_SC_MODE_CNTL_0'; mmPA_SC_MODE_CNTL_1 :Result:='mmPA_SC_MODE_CNTL_1'; mmVGT_ENHANCE :Result:='mmVGT_ENHANCE'; mmVGT_GS_PER_ES :Result:='mmVGT_GS_PER_ES'; mmVGT_ES_PER_GS :Result:='mmVGT_ES_PER_GS'; mmVGT_GS_PER_VS :Result:='mmVGT_GS_PER_VS'; mmVGT_GSVS_RING_OFFSET_1 :Result:='mmVGT_GSVS_RING_OFFSET_1'; mmVGT_GSVS_RING_OFFSET_2 :Result:='mmVGT_GSVS_RING_OFFSET_2'; mmVGT_GSVS_RING_OFFSET_3 :Result:='mmVGT_GSVS_RING_OFFSET_3'; mmVGT_GS_OUT_PRIM_TYPE :Result:='mmVGT_GS_OUT_PRIM_TYPE'; mmIA_ENHANCE :Result:='mmIA_ENHANCE'; mmVGT_DMA_SIZE :Result:='mmVGT_DMA_SIZE'; mmVGT_DMA_MAX_SIZE :Result:='mmVGT_DMA_MAX_SIZE'; mmVGT_DMA_INDEX_TYPE :Result:='mmVGT_DMA_INDEX_TYPE'; mmVGT_PRIMITIVEID_EN :Result:='mmVGT_PRIMITIVEID_EN'; mmVGT_DMA_NUM_INSTANCES :Result:='mmVGT_DMA_NUM_INSTANCES'; mmVGT_PRIMITIVEID_RESET :Result:='mmVGT_PRIMITIVEID_RESET'; mmVGT_EVENT_INITIATOR :Result:='mmVGT_EVENT_INITIATOR'; mmVGT_MULTI_PRIM_IB_RESET_EN :Result:='mmVGT_MULTI_PRIM_IB_RESET_EN'; mmVGT_INSTANCE_STEP_RATE_0 :Result:='mmVGT_INSTANCE_STEP_RATE_0'; mmVGT_INSTANCE_STEP_RATE_1 :Result:='mmVGT_INSTANCE_STEP_RATE_1'; mmIA_MULTI_VGT_PARAM :Result:='mmIA_MULTI_VGT_PARAM'; mmVGT_ESGS_RING_ITEMSIZE :Result:='mmVGT_ESGS_RING_ITEMSIZE'; mmVGT_GSVS_RING_ITEMSIZE :Result:='mmVGT_GSVS_RING_ITEMSIZE'; mmVGT_REUSE_OFF :Result:='mmVGT_REUSE_OFF'; mmVGT_VTX_CNT_EN :Result:='mmVGT_VTX_CNT_EN'; mmDB_HTILE_SURFACE :Result:='mmDB_HTILE_SURFACE'; mmDB_SRESULTS_COMPARE_STATE0 :Result:='mmDB_SRESULTS_COMPARE_STATE0'; mmDB_SRESULTS_COMPARE_STATE1 :Result:='mmDB_SRESULTS_COMPARE_STATE1'; mmDB_PRELOAD_CONTROL :Result:='mmDB_PRELOAD_CONTROL'; mmVGT_STRMOUT_BUFFER_SIZE_0 :Result:='mmVGT_STRMOUT_BUFFER_SIZE_0'; mmVGT_STRMOUT_VTX_STRIDE_0 :Result:='mmVGT_STRMOUT_VTX_STRIDE_0'; mmVGT_STRMOUT_BUFFER_OFFSET_0 :Result:='mmVGT_STRMOUT_BUFFER_OFFSET_0'; mmVGT_STRMOUT_BUFFER_SIZE_1 :Result:='mmVGT_STRMOUT_BUFFER_SIZE_1'; mmVGT_STRMOUT_VTX_STRIDE_1 :Result:='mmVGT_STRMOUT_VTX_STRIDE_1'; mmVGT_STRMOUT_BUFFER_OFFSET_1 :Result:='mmVGT_STRMOUT_BUFFER_OFFSET_1'; mmVGT_STRMOUT_BUFFER_SIZE_2 :Result:='mmVGT_STRMOUT_BUFFER_SIZE_2'; mmVGT_STRMOUT_VTX_STRIDE_2 :Result:='mmVGT_STRMOUT_VTX_STRIDE_2'; mmVGT_STRMOUT_BUFFER_OFFSET_2 :Result:='mmVGT_STRMOUT_BUFFER_OFFSET_2'; mmVGT_STRMOUT_BUFFER_SIZE_3 :Result:='mmVGT_STRMOUT_BUFFER_SIZE_3'; mmVGT_STRMOUT_VTX_STRIDE_3 :Result:='mmVGT_STRMOUT_VTX_STRIDE_3'; mmVGT_STRMOUT_BUFFER_OFFSET_3 :Result:='mmVGT_STRMOUT_BUFFER_OFFSET_3'; mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET :Result:='mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET'; mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE:Result:='mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE'; mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE :Result:='mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE'; mmVGT_GS_MAX_VERT_OUT :Result:='mmVGT_GS_MAX_VERT_OUT'; mmVGT_TESS_DISTRIBUTION :Result:='mmVGT_TESS_DISTRIBUTION'; mmVGT_SHADER_STAGES_EN :Result:='mmVGT_SHADER_STAGES_EN'; mmVGT_LS_HS_CONFIG :Result:='mmVGT_LS_HS_CONFIG'; mmVGT_GS_VERT_ITEMSIZE :Result:='mmVGT_GS_VERT_ITEMSIZE'; mmVGT_GS_VERT_ITEMSIZE_1 :Result:='mmVGT_GS_VERT_ITEMSIZE_1'; mmVGT_GS_VERT_ITEMSIZE_2 :Result:='mmVGT_GS_VERT_ITEMSIZE_2'; mmVGT_GS_VERT_ITEMSIZE_3 :Result:='mmVGT_GS_VERT_ITEMSIZE_3'; mmVGT_TF_PARAM :Result:='mmVGT_TF_PARAM'; mmDB_ALPHA_TO_MASK :Result:='mmDB_ALPHA_TO_MASK'; mmVGT_DISPATCH_DRAW_INDEX :Result:='mmVGT_DISPATCH_DRAW_INDEX'; mmPA_SU_POLY_OFFSET_DB_FMT_CNTL :Result:='mmPA_SU_POLY_OFFSET_DB_FMT_CNTL'; mmPA_SU_POLY_OFFSET_CLAMP :Result:='mmPA_SU_POLY_OFFSET_CLAMP'; mmPA_SU_POLY_OFFSET_FRONT_SCALE :Result:='mmPA_SU_POLY_OFFSET_FRONT_SCALE'; mmPA_SU_POLY_OFFSET_FRONT_OFFSET :Result:='mmPA_SU_POLY_OFFSET_FRONT_OFFSET'; mmPA_SU_POLY_OFFSET_BACK_SCALE :Result:='mmPA_SU_POLY_OFFSET_BACK_SCALE'; mmPA_SU_POLY_OFFSET_BACK_OFFSET :Result:='mmPA_SU_POLY_OFFSET_BACK_OFFSET'; mmVGT_GS_INSTANCE_CNT :Result:='mmVGT_GS_INSTANCE_CNT'; mmVGT_STRMOUT_CONFIG :Result:='mmVGT_STRMOUT_CONFIG'; mmVGT_STRMOUT_BUFFER_CONFIG :Result:='mmVGT_STRMOUT_BUFFER_CONFIG'; mmPA_SC_CENTROID_PRIORITY_0 :Result:='mmPA_SC_CENTROID_PRIORITY_0'; mmPA_SC_CENTROID_PRIORITY_1 :Result:='mmPA_SC_CENTROID_PRIORITY_1'; mmPA_SC_LINE_CNTL :Result:='mmPA_SC_LINE_CNTL'; mmPA_SC_AA_CONFIG :Result:='mmPA_SC_AA_CONFIG'; mmPA_SU_VTX_CNTL :Result:='mmPA_SU_VTX_CNTL'; mmPA_CL_GB_VERT_CLIP_ADJ :Result:='mmPA_CL_GB_VERT_CLIP_ADJ'; mmPA_CL_GB_VERT_DISC_ADJ :Result:='mmPA_CL_GB_VERT_DISC_ADJ'; mmPA_CL_GB_HORZ_CLIP_ADJ :Result:='mmPA_CL_GB_HORZ_CLIP_ADJ'; mmPA_CL_GB_HORZ_DISC_ADJ :Result:='mmPA_CL_GB_HORZ_DISC_ADJ'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2'; mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 :Result:='mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3'; mmPA_SC_AA_MASK_X0Y0_X1Y0 :Result:='mmPA_SC_AA_MASK_X0Y0_X1Y0'; mmPA_SC_AA_MASK_X0Y1_X1Y1 :Result:='mmPA_SC_AA_MASK_X0Y1_X1Y1'; mmVGT_VERTEX_REUSE_BLOCK_CNTL :Result:='mmVGT_VERTEX_REUSE_BLOCK_CNTL'; mmVGT_OUT_DEALLOC_CNTL :Result:='mmVGT_OUT_DEALLOC_CNTL'; mmCB_COLOR0_BASE :Result:='mmCB_COLOR0_BASE'; mmCB_COLOR0_PITCH :Result:='mmCB_COLOR0_PITCH'; mmCB_COLOR0_SLICE :Result:='mmCB_COLOR0_SLICE'; mmCB_COLOR0_VIEW :Result:='mmCB_COLOR0_VIEW'; mmCB_COLOR0_INFO :Result:='mmCB_COLOR0_INFO'; mmCB_COLOR0_ATTRIB :Result:='mmCB_COLOR0_ATTRIB'; mmCB_COLOR0_DCC_CONTROL :Result:='mmCB_COLOR0_DCC_CONTROL'; mmCB_COLOR0_CMASK :Result:='mmCB_COLOR0_CMASK'; mmCB_COLOR0_CMASK_SLICE :Result:='mmCB_COLOR0_CMASK_SLICE'; mmCB_COLOR0_FMASK :Result:='mmCB_COLOR0_FMASK'; mmCB_COLOR0_FMASK_SLICE :Result:='mmCB_COLOR0_FMASK_SLICE'; mmCB_COLOR0_CLEAR_WORD0 :Result:='mmCB_COLOR0_CLEAR_WORD0'; mmCB_COLOR0_CLEAR_WORD1 :Result:='mmCB_COLOR0_CLEAR_WORD1'; mmCB_COLOR0_DCC_BASE :Result:='mmCB_COLOR0_DCC_BASE'; mmCB_COLOR1_BASE :Result:='mmCB_COLOR1_BASE'; mmCB_COLOR1_PITCH :Result:='mmCB_COLOR1_PITCH'; mmCB_COLOR1_SLICE :Result:='mmCB_COLOR1_SLICE'; mmCB_COLOR1_VIEW :Result:='mmCB_COLOR1_VIEW'; mmCB_COLOR1_INFO :Result:='mmCB_COLOR1_INFO'; mmCB_COLOR1_ATTRIB :Result:='mmCB_COLOR1_ATTRIB'; mmCB_COLOR1_DCC_CONTROL :Result:='mmCB_COLOR1_DCC_CONTROL'; mmCB_COLOR1_CMASK :Result:='mmCB_COLOR1_CMASK'; mmCB_COLOR1_CMASK_SLICE :Result:='mmCB_COLOR1_CMASK_SLICE'; mmCB_COLOR1_FMASK :Result:='mmCB_COLOR1_FMASK'; mmCB_COLOR1_FMASK_SLICE :Result:='mmCB_COLOR1_FMASK_SLICE'; mmCB_COLOR1_CLEAR_WORD0 :Result:='mmCB_COLOR1_CLEAR_WORD0'; mmCB_COLOR1_CLEAR_WORD1 :Result:='mmCB_COLOR1_CLEAR_WORD1'; mmCB_COLOR1_DCC_BASE :Result:='mmCB_COLOR1_DCC_BASE'; mmCB_COLOR2_BASE :Result:='mmCB_COLOR2_BASE'; mmCB_COLOR2_PITCH :Result:='mmCB_COLOR2_PITCH'; mmCB_COLOR2_SLICE :Result:='mmCB_COLOR2_SLICE'; mmCB_COLOR2_VIEW :Result:='mmCB_COLOR2_VIEW'; mmCB_COLOR2_INFO :Result:='mmCB_COLOR2_INFO'; mmCB_COLOR2_ATTRIB :Result:='mmCB_COLOR2_ATTRIB'; mmCB_COLOR2_DCC_CONTROL :Result:='mmCB_COLOR2_DCC_CONTROL'; mmCB_COLOR2_CMASK :Result:='mmCB_COLOR2_CMASK'; mmCB_COLOR2_CMASK_SLICE :Result:='mmCB_COLOR2_CMASK_SLICE'; mmCB_COLOR2_FMASK :Result:='mmCB_COLOR2_FMASK'; mmCB_COLOR2_FMASK_SLICE :Result:='mmCB_COLOR2_FMASK_SLICE'; mmCB_COLOR2_CLEAR_WORD0 :Result:='mmCB_COLOR2_CLEAR_WORD0'; mmCB_COLOR2_CLEAR_WORD1 :Result:='mmCB_COLOR2_CLEAR_WORD1'; mmCB_COLOR2_DCC_BASE :Result:='mmCB_COLOR2_DCC_BASE'; mmCB_COLOR3_BASE :Result:='mmCB_COLOR3_BASE'; mmCB_COLOR3_PITCH :Result:='mmCB_COLOR3_PITCH'; mmCB_COLOR3_SLICE :Result:='mmCB_COLOR3_SLICE'; mmCB_COLOR3_VIEW :Result:='mmCB_COLOR3_VIEW'; mmCB_COLOR3_INFO :Result:='mmCB_COLOR3_INFO'; mmCB_COLOR3_ATTRIB :Result:='mmCB_COLOR3_ATTRIB'; mmCB_COLOR3_DCC_CONTROL :Result:='mmCB_COLOR3_DCC_CONTROL'; mmCB_COLOR3_CMASK :Result:='mmCB_COLOR3_CMASK'; mmCB_COLOR3_CMASK_SLICE :Result:='mmCB_COLOR3_CMASK_SLICE'; mmCB_COLOR3_FMASK :Result:='mmCB_COLOR3_FMASK'; mmCB_COLOR3_FMASK_SLICE :Result:='mmCB_COLOR3_FMASK_SLICE'; mmCB_COLOR3_CLEAR_WORD0 :Result:='mmCB_COLOR3_CLEAR_WORD0'; mmCB_COLOR3_CLEAR_WORD1 :Result:='mmCB_COLOR3_CLEAR_WORD1'; mmCB_COLOR3_DCC_BASE :Result:='mmCB_COLOR3_DCC_BASE'; mmCB_COLOR4_BASE :Result:='mmCB_COLOR4_BASE'; mmCB_COLOR4_PITCH :Result:='mmCB_COLOR4_PITCH'; mmCB_COLOR4_SLICE :Result:='mmCB_COLOR4_SLICE'; mmCB_COLOR4_VIEW :Result:='mmCB_COLOR4_VIEW'; mmCB_COLOR4_INFO :Result:='mmCB_COLOR4_INFO'; mmCB_COLOR4_ATTRIB :Result:='mmCB_COLOR4_ATTRIB'; mmCB_COLOR4_DCC_CONTROL :Result:='mmCB_COLOR4_DCC_CONTROL'; mmCB_COLOR4_CMASK :Result:='mmCB_COLOR4_CMASK'; mmCB_COLOR4_CMASK_SLICE :Result:='mmCB_COLOR4_CMASK_SLICE'; mmCB_COLOR4_FMASK :Result:='mmCB_COLOR4_FMASK'; mmCB_COLOR4_FMASK_SLICE :Result:='mmCB_COLOR4_FMASK_SLICE'; mmCB_COLOR4_CLEAR_WORD0 :Result:='mmCB_COLOR4_CLEAR_WORD0'; mmCB_COLOR4_CLEAR_WORD1 :Result:='mmCB_COLOR4_CLEAR_WORD1'; mmCB_COLOR4_DCC_BASE :Result:='mmCB_COLOR4_DCC_BASE'; mmCB_COLOR5_BASE :Result:='mmCB_COLOR5_BASE'; mmCB_COLOR5_PITCH :Result:='mmCB_COLOR5_PITCH'; mmCB_COLOR5_SLICE :Result:='mmCB_COLOR5_SLICE'; mmCB_COLOR5_VIEW :Result:='mmCB_COLOR5_VIEW'; mmCB_COLOR5_INFO :Result:='mmCB_COLOR5_INFO'; mmCB_COLOR5_ATTRIB :Result:='mmCB_COLOR5_ATTRIB'; mmCB_COLOR5_DCC_CONTROL :Result:='mmCB_COLOR5_DCC_CONTROL'; mmCB_COLOR5_CMASK :Result:='mmCB_COLOR5_CMASK'; mmCB_COLOR5_CMASK_SLICE :Result:='mmCB_COLOR5_CMASK_SLICE'; mmCB_COLOR5_FMASK :Result:='mmCB_COLOR5_FMASK'; mmCB_COLOR5_FMASK_SLICE :Result:='mmCB_COLOR5_FMASK_SLICE'; mmCB_COLOR5_CLEAR_WORD0 :Result:='mmCB_COLOR5_CLEAR_WORD0'; mmCB_COLOR5_CLEAR_WORD1 :Result:='mmCB_COLOR5_CLEAR_WORD1'; mmCB_COLOR5_DCC_BASE :Result:='mmCB_COLOR5_DCC_BASE'; mmCB_COLOR6_BASE :Result:='mmCB_COLOR6_BASE'; mmCB_COLOR6_PITCH :Result:='mmCB_COLOR6_PITCH'; mmCB_COLOR6_SLICE :Result:='mmCB_COLOR6_SLICE'; mmCB_COLOR6_VIEW :Result:='mmCB_COLOR6_VIEW'; mmCB_COLOR6_INFO :Result:='mmCB_COLOR6_INFO'; mmCB_COLOR6_ATTRIB :Result:='mmCB_COLOR6_ATTRIB'; mmCB_COLOR6_DCC_CONTROL :Result:='mmCB_COLOR6_DCC_CONTROL'; mmCB_COLOR6_CMASK :Result:='mmCB_COLOR6_CMASK'; mmCB_COLOR6_CMASK_SLICE :Result:='mmCB_COLOR6_CMASK_SLICE'; mmCB_COLOR6_FMASK :Result:='mmCB_COLOR6_FMASK'; mmCB_COLOR6_FMASK_SLICE :Result:='mmCB_COLOR6_FMASK_SLICE'; mmCB_COLOR6_CLEAR_WORD0 :Result:='mmCB_COLOR6_CLEAR_WORD0'; mmCB_COLOR6_CLEAR_WORD1 :Result:='mmCB_COLOR6_CLEAR_WORD1'; mmCB_COLOR6_DCC_BASE :Result:='mmCB_COLOR6_DCC_BASE'; mmCB_COLOR7_BASE :Result:='mmCB_COLOR7_BASE'; mmCB_COLOR7_PITCH :Result:='mmCB_COLOR7_PITCH'; mmCB_COLOR7_SLICE :Result:='mmCB_COLOR7_SLICE'; mmCB_COLOR7_VIEW :Result:='mmCB_COLOR7_VIEW'; mmCB_COLOR7_INFO :Result:='mmCB_COLOR7_INFO'; mmCB_COLOR7_ATTRIB :Result:='mmCB_COLOR7_ATTRIB'; mmCB_COLOR7_DCC_CONTROL :Result:='mmCB_COLOR7_DCC_CONTROL'; mmCB_COLOR7_CMASK :Result:='mmCB_COLOR7_CMASK'; mmCB_COLOR7_CMASK_SLICE :Result:='mmCB_COLOR7_CMASK_SLICE'; mmCB_COLOR7_FMASK :Result:='mmCB_COLOR7_FMASK'; mmCB_COLOR7_FMASK_SLICE :Result:='mmCB_COLOR7_FMASK_SLICE'; mmCB_COLOR7_CLEAR_WORD0 :Result:='mmCB_COLOR7_CLEAR_WORD0'; mmCB_COLOR7_CLEAR_WORD1 :Result:='mmCB_COLOR7_CLEAR_WORD1'; mmCB_COLOR7_DCC_BASE :Result:='mmCB_COLOR7_DCC_BASE'; mmGRBM_GFX_INDEX :Result:='mmGRBM_GFX_INDEX'; mmVGT_ESGS_RING_SIZE :Result:='mmVGT_ESGS_RING_SIZE'; mmVGT_GSVS_RING_SIZE :Result:='mmVGT_GSVS_RING_SIZE'; mmVGT_PRIMITIVE_TYPE :Result:='mmVGT_PRIMITIVE_TYPE'; mmVGT_INDEX_TYPE :Result:='mmVGT_INDEX_TYPE'; mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0 :Result:='mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0'; mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1 :Result:='mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1'; mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2 :Result:='mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2'; mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3 :Result:='mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3'; mmVGT_NUM_INDICES :Result:='mmVGT_NUM_INDICES'; mmVGT_NUM_INSTANCES :Result:='mmVGT_NUM_INSTANCES'; mmVGT_TF_RING_SIZE :Result:='mmVGT_TF_RING_SIZE'; mmVGT_HS_OFFCHIP_PARAM :Result:='mmVGT_HS_OFFCHIP_PARAM'; mmVGT_TF_MEMORY_BASE :Result:='mmVGT_TF_MEMORY_BASE'; mmPA_SU_LINE_STIPPLE_VALUE :Result:='mmPA_SU_LINE_STIPPLE_VALUE'; mmPA_SC_LINE_STIPPLE_STATE :Result:='mmPA_SC_LINE_STIPPLE_STATE'; mmPA_SC_P3D_TRAP_SCREEN_HV_EN :Result:='mmPA_SC_P3D_TRAP_SCREEN_HV_EN'; mmPA_SC_P3D_TRAP_SCREEN_H :Result:='mmPA_SC_P3D_TRAP_SCREEN_H'; mmPA_SC_P3D_TRAP_SCREEN_V :Result:='mmPA_SC_P3D_TRAP_SCREEN_V'; mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE :Result:='mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE'; mmPA_SC_P3D_TRAP_SCREEN_COUNT :Result:='mmPA_SC_P3D_TRAP_SCREEN_COUNT'; mmPA_SC_HP3D_TRAP_SCREEN_HV_EN :Result:='mmPA_SC_HP3D_TRAP_SCREEN_HV_EN'; mmPA_SC_HP3D_TRAP_SCREEN_H :Result:='mmPA_SC_HP3D_TRAP_SCREEN_H'; mmPA_SC_HP3D_TRAP_SCREEN_V :Result:='mmPA_SC_HP3D_TRAP_SCREEN_V'; mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE :Result:='mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE'; mmPA_SC_HP3D_TRAP_SCREEN_COUNT :Result:='mmPA_SC_HP3D_TRAP_SCREEN_COUNT'; mmPA_SC_TRAP_SCREEN_HV_EN :Result:='mmPA_SC_TRAP_SCREEN_HV_EN'; mmPA_SC_TRAP_SCREEN_H :Result:='mmPA_SC_TRAP_SCREEN_H'; mmPA_SC_TRAP_SCREEN_V :Result:='mmPA_SC_TRAP_SCREEN_V'; mmPA_SC_TRAP_SCREEN_OCCURRENCE :Result:='mmPA_SC_TRAP_SCREEN_OCCURRENCE'; mmPA_SC_TRAP_SCREEN_COUNT :Result:='mmPA_SC_TRAP_SCREEN_COUNT'; mmDB_OCCLUSION_COUNT0_LOW :Result:='mmDB_OCCLUSION_COUNT0_LOW'; mmDB_OCCLUSION_COUNT0_HI :Result:='mmDB_OCCLUSION_COUNT0_HI'; mmDB_OCCLUSION_COUNT1_LOW :Result:='mmDB_OCCLUSION_COUNT1_LOW'; mmDB_OCCLUSION_COUNT1_HI :Result:='mmDB_OCCLUSION_COUNT1_HI'; mmDB_OCCLUSION_COUNT2_LOW :Result:='mmDB_OCCLUSION_COUNT2_LOW'; mmDB_OCCLUSION_COUNT2_HI :Result:='mmDB_OCCLUSION_COUNT2_HI'; mmDB_OCCLUSION_COUNT3_LOW :Result:='mmDB_OCCLUSION_COUNT3_LOW'; mmDB_OCCLUSION_COUNT3_HI :Result:='mmDB_OCCLUSION_COUNT3_HI'; mmDB_ZPASS_COUNT_LOW :Result:='mmDB_ZPASS_COUNT_LOW'; mmDB_ZPASS_COUNT_HI :Result:='mmDB_ZPASS_COUNT_HI'; mmGRBM_PERFCOUNTER0_LO :Result:='mmGRBM_PERFCOUNTER0_LO'; mmGRBM_PERFCOUNTER0_HI :Result:='mmGRBM_PERFCOUNTER0_HI'; mmGRBM_PERFCOUNTER1_LO :Result:='mmGRBM_PERFCOUNTER1_LO'; mmGRBM_PERFCOUNTER1_HI :Result:='mmGRBM_PERFCOUNTER1_HI'; mmGRBM_SE0_PERFCOUNTER_LO :Result:='mmGRBM_SE0_PERFCOUNTER_LO'; mmGRBM_SE0_PERFCOUNTER_HI :Result:='mmGRBM_SE0_PERFCOUNTER_HI'; mmGRBM_SE1_PERFCOUNTER_LO :Result:='mmGRBM_SE1_PERFCOUNTER_LO'; mmGRBM_SE1_PERFCOUNTER_HI :Result:='mmGRBM_SE1_PERFCOUNTER_HI'; mmGRBM_SE2_PERFCOUNTER_LO :Result:='mmGRBM_SE2_PERFCOUNTER_LO'; mmGRBM_SE2_PERFCOUNTER_HI :Result:='mmGRBM_SE2_PERFCOUNTER_HI'; mmGRBM_SE3_PERFCOUNTER_LO :Result:='mmGRBM_SE3_PERFCOUNTER_LO'; mmGRBM_SE3_PERFCOUNTER_HI :Result:='mmGRBM_SE3_PERFCOUNTER_HI'; mmIA_PERFCOUNTER0_LO :Result:='mmIA_PERFCOUNTER0_LO'; mmIA_PERFCOUNTER0_HI :Result:='mmIA_PERFCOUNTER0_HI'; mmIA_PERFCOUNTER1_LO :Result:='mmIA_PERFCOUNTER1_LO'; mmIA_PERFCOUNTER1_HI :Result:='mmIA_PERFCOUNTER1_HI'; mmIA_PERFCOUNTER2_LO :Result:='mmIA_PERFCOUNTER2_LO'; mmIA_PERFCOUNTER2_HI :Result:='mmIA_PERFCOUNTER2_HI'; mmIA_PERFCOUNTER3_LO :Result:='mmIA_PERFCOUNTER3_LO'; mmIA_PERFCOUNTER3_HI :Result:='mmIA_PERFCOUNTER3_HI'; mmVGT_PERFCOUNTER0_LO :Result:='mmVGT_PERFCOUNTER0_LO'; mmVGT_PERFCOUNTER0_HI :Result:='mmVGT_PERFCOUNTER0_HI'; mmVGT_PERFCOUNTER1_LO :Result:='mmVGT_PERFCOUNTER1_LO'; mmVGT_PERFCOUNTER1_HI :Result:='mmVGT_PERFCOUNTER1_HI'; mmVGT_PERFCOUNTER2_LO :Result:='mmVGT_PERFCOUNTER2_LO'; mmVGT_PERFCOUNTER2_HI :Result:='mmVGT_PERFCOUNTER2_HI'; mmVGT_PERFCOUNTER3_LO :Result:='mmVGT_PERFCOUNTER3_LO'; mmVGT_PERFCOUNTER3_HI :Result:='mmVGT_PERFCOUNTER3_HI'; mmPA_SU_PERFCOUNTER0_LO :Result:='mmPA_SU_PERFCOUNTER0_LO'; mmPA_SU_PERFCOUNTER0_HI :Result:='mmPA_SU_PERFCOUNTER0_HI'; mmPA_SU_PERFCOUNTER1_LO :Result:='mmPA_SU_PERFCOUNTER1_LO'; mmPA_SU_PERFCOUNTER1_HI :Result:='mmPA_SU_PERFCOUNTER1_HI'; mmPA_SU_PERFCOUNTER2_LO :Result:='mmPA_SU_PERFCOUNTER2_LO'; mmPA_SU_PERFCOUNTER2_HI :Result:='mmPA_SU_PERFCOUNTER2_HI'; mmPA_SU_PERFCOUNTER3_LO :Result:='mmPA_SU_PERFCOUNTER3_LO'; mmPA_SU_PERFCOUNTER3_HI :Result:='mmPA_SU_PERFCOUNTER3_HI'; mmPA_SC_PERFCOUNTER0_LO :Result:='mmPA_SC_PERFCOUNTER0_LO'; mmPA_SC_PERFCOUNTER0_HI :Result:='mmPA_SC_PERFCOUNTER0_HI'; mmPA_SC_PERFCOUNTER1_LO :Result:='mmPA_SC_PERFCOUNTER1_LO'; mmPA_SC_PERFCOUNTER1_HI :Result:='mmPA_SC_PERFCOUNTER1_HI'; mmPA_SC_PERFCOUNTER2_LO :Result:='mmPA_SC_PERFCOUNTER2_LO'; mmPA_SC_PERFCOUNTER2_HI :Result:='mmPA_SC_PERFCOUNTER2_HI'; mmPA_SC_PERFCOUNTER3_LO :Result:='mmPA_SC_PERFCOUNTER3_LO'; mmPA_SC_PERFCOUNTER3_HI :Result:='mmPA_SC_PERFCOUNTER3_HI'; mmPA_SC_PERFCOUNTER4_LO :Result:='mmPA_SC_PERFCOUNTER4_LO'; mmPA_SC_PERFCOUNTER4_HI :Result:='mmPA_SC_PERFCOUNTER4_HI'; mmPA_SC_PERFCOUNTER5_LO :Result:='mmPA_SC_PERFCOUNTER5_LO'; mmPA_SC_PERFCOUNTER5_HI :Result:='mmPA_SC_PERFCOUNTER5_HI'; mmPA_SC_PERFCOUNTER6_LO :Result:='mmPA_SC_PERFCOUNTER6_LO'; mmPA_SC_PERFCOUNTER6_HI :Result:='mmPA_SC_PERFCOUNTER6_HI'; mmPA_SC_PERFCOUNTER7_LO :Result:='mmPA_SC_PERFCOUNTER7_LO'; mmPA_SC_PERFCOUNTER7_HI :Result:='mmPA_SC_PERFCOUNTER7_HI'; mmSPI_PERFCOUNTER0_HI :Result:='mmSPI_PERFCOUNTER0_HI'; mmSPI_PERFCOUNTER0_LO :Result:='mmSPI_PERFCOUNTER0_LO'; mmSPI_PERFCOUNTER1_HI :Result:='mmSPI_PERFCOUNTER1_HI'; mmSPI_PERFCOUNTER1_LO :Result:='mmSPI_PERFCOUNTER1_LO'; mmSPI_PERFCOUNTER2_HI :Result:='mmSPI_PERFCOUNTER2_HI'; mmSPI_PERFCOUNTER2_LO :Result:='mmSPI_PERFCOUNTER2_LO'; mmSPI_PERFCOUNTER3_HI :Result:='mmSPI_PERFCOUNTER3_HI'; mmSPI_PERFCOUNTER3_LO :Result:='mmSPI_PERFCOUNTER3_LO'; mmSPI_PERFCOUNTER4_HI :Result:='mmSPI_PERFCOUNTER4_HI'; mmSPI_PERFCOUNTER4_LO :Result:='mmSPI_PERFCOUNTER4_LO'; mmSPI_PERFCOUNTER5_HI :Result:='mmSPI_PERFCOUNTER5_HI'; mmSPI_PERFCOUNTER5_LO :Result:='mmSPI_PERFCOUNTER5_LO'; mmCB_PERFCOUNTER0_LO :Result:='mmCB_PERFCOUNTER0_LO'; mmCB_PERFCOUNTER0_HI :Result:='mmCB_PERFCOUNTER0_HI'; mmCB_PERFCOUNTER1_LO :Result:='mmCB_PERFCOUNTER1_LO'; mmCB_PERFCOUNTER1_HI :Result:='mmCB_PERFCOUNTER1_HI'; mmCB_PERFCOUNTER2_LO :Result:='mmCB_PERFCOUNTER2_LO'; mmCB_PERFCOUNTER2_HI :Result:='mmCB_PERFCOUNTER2_HI'; mmCB_PERFCOUNTER3_LO :Result:='mmCB_PERFCOUNTER3_LO'; mmCB_PERFCOUNTER3_HI :Result:='mmCB_PERFCOUNTER3_HI'; mmDB_PERFCOUNTER0_LO :Result:='mmDB_PERFCOUNTER0_LO'; mmDB_PERFCOUNTER0_HI :Result:='mmDB_PERFCOUNTER0_HI'; mmDB_PERFCOUNTER1_LO :Result:='mmDB_PERFCOUNTER1_LO'; mmDB_PERFCOUNTER1_HI :Result:='mmDB_PERFCOUNTER1_HI'; mmDB_PERFCOUNTER2_LO :Result:='mmDB_PERFCOUNTER2_LO'; mmDB_PERFCOUNTER2_HI :Result:='mmDB_PERFCOUNTER2_HI'; mmDB_PERFCOUNTER3_LO :Result:='mmDB_PERFCOUNTER3_LO'; mmDB_PERFCOUNTER3_HI :Result:='mmDB_PERFCOUNTER3_HI'; mmGRBM_PERFCOUNTER0_SELECT :Result:='mmGRBM_PERFCOUNTER0_SELECT'; mmGRBM_PERFCOUNTER1_SELECT :Result:='mmGRBM_PERFCOUNTER1_SELECT'; mmGRBM_SE0_PERFCOUNTER_SELECT :Result:='mmGRBM_SE0_PERFCOUNTER_SELECT'; mmGRBM_SE1_PERFCOUNTER_SELECT :Result:='mmGRBM_SE1_PERFCOUNTER_SELECT'; mmGRBM_SE2_PERFCOUNTER_SELECT :Result:='mmGRBM_SE2_PERFCOUNTER_SELECT'; mmGRBM_SE3_PERFCOUNTER_SELECT :Result:='mmGRBM_SE3_PERFCOUNTER_SELECT'; mmIA_PERFCOUNTER0_SELECT :Result:='mmIA_PERFCOUNTER0_SELECT'; mmIA_PERFCOUNTER1_SELECT :Result:='mmIA_PERFCOUNTER1_SELECT'; mmIA_PERFCOUNTER2_SELECT :Result:='mmIA_PERFCOUNTER2_SELECT'; mmIA_PERFCOUNTER3_SELECT :Result:='mmIA_PERFCOUNTER3_SELECT'; mmIA_PERFCOUNTER0_SELECT1 :Result:='mmIA_PERFCOUNTER0_SELECT1'; mmVGT_PERFCOUNTER0_SELECT :Result:='mmVGT_PERFCOUNTER0_SELECT'; mmVGT_PERFCOUNTER1_SELECT :Result:='mmVGT_PERFCOUNTER1_SELECT'; mmVGT_PERFCOUNTER2_SELECT :Result:='mmVGT_PERFCOUNTER2_SELECT'; mmVGT_PERFCOUNTER3_SELECT :Result:='mmVGT_PERFCOUNTER3_SELECT'; mmVGT_PERFCOUNTER0_SELECT1 :Result:='mmVGT_PERFCOUNTER0_SELECT1'; mmVGT_PERFCOUNTER1_SELECT1 :Result:='mmVGT_PERFCOUNTER1_SELECT1'; mmVGT_PERFCOUNTER_SEID_MASK :Result:='mmVGT_PERFCOUNTER_SEID_MASK'; mmPA_SU_PERFCOUNTER0_SELECT :Result:='mmPA_SU_PERFCOUNTER0_SELECT'; mmPA_SU_PERFCOUNTER0_SELECT1 :Result:='mmPA_SU_PERFCOUNTER0_SELECT1'; mmPA_SU_PERFCOUNTER1_SELECT :Result:='mmPA_SU_PERFCOUNTER1_SELECT'; mmPA_SU_PERFCOUNTER1_SELECT1 :Result:='mmPA_SU_PERFCOUNTER1_SELECT1'; mmPA_SU_PERFCOUNTER2_SELECT :Result:='mmPA_SU_PERFCOUNTER2_SELECT'; mmPA_SU_PERFCOUNTER3_SELECT :Result:='mmPA_SU_PERFCOUNTER3_SELECT'; mmPA_SC_PERFCOUNTER0_SELECT :Result:='mmPA_SC_PERFCOUNTER0_SELECT'; mmPA_SC_PERFCOUNTER0_SELECT1 :Result:='mmPA_SC_PERFCOUNTER0_SELECT1'; mmPA_SC_PERFCOUNTER1_SELECT :Result:='mmPA_SC_PERFCOUNTER1_SELECT'; mmPA_SC_PERFCOUNTER2_SELECT :Result:='mmPA_SC_PERFCOUNTER2_SELECT'; mmPA_SC_PERFCOUNTER3_SELECT :Result:='mmPA_SC_PERFCOUNTER3_SELECT'; mmPA_SC_PERFCOUNTER4_SELECT :Result:='mmPA_SC_PERFCOUNTER4_SELECT'; mmPA_SC_PERFCOUNTER5_SELECT :Result:='mmPA_SC_PERFCOUNTER5_SELECT'; mmPA_SC_PERFCOUNTER6_SELECT :Result:='mmPA_SC_PERFCOUNTER6_SELECT'; mmPA_SC_PERFCOUNTER7_SELECT :Result:='mmPA_SC_PERFCOUNTER7_SELECT'; mmSPI_PERFCOUNTER0_SELECT :Result:='mmSPI_PERFCOUNTER0_SELECT'; mmSPI_PERFCOUNTER1_SELECT :Result:='mmSPI_PERFCOUNTER1_SELECT'; mmSPI_PERFCOUNTER2_SELECT :Result:='mmSPI_PERFCOUNTER2_SELECT'; mmSPI_PERFCOUNTER3_SELECT :Result:='mmSPI_PERFCOUNTER3_SELECT'; mmSPI_PERFCOUNTER0_SELECT1 :Result:='mmSPI_PERFCOUNTER0_SELECT1'; mmSPI_PERFCOUNTER1_SELECT1 :Result:='mmSPI_PERFCOUNTER1_SELECT1'; mmSPI_PERFCOUNTER2_SELECT1 :Result:='mmSPI_PERFCOUNTER2_SELECT1'; mmSPI_PERFCOUNTER3_SELECT1 :Result:='mmSPI_PERFCOUNTER3_SELECT1'; mmSPI_PERFCOUNTER4_SELECT :Result:='mmSPI_PERFCOUNTER4_SELECT'; mmSPI_PERFCOUNTER5_SELECT :Result:='mmSPI_PERFCOUNTER5_SELECT'; mmSPI_PERFCOUNTER_BINS :Result:='mmSPI_PERFCOUNTER_BINS'; mmCB_PERFCOUNTER_FILTER :Result:='mmCB_PERFCOUNTER_FILTER'; mmCB_PERFCOUNTER0_SELECT :Result:='mmCB_PERFCOUNTER0_SELECT'; mmCB_PERFCOUNTER0_SELECT1 :Result:='mmCB_PERFCOUNTER0_SELECT1'; mmCB_PERFCOUNTER1_SELECT :Result:='mmCB_PERFCOUNTER1_SELECT'; mmCB_PERFCOUNTER2_SELECT :Result:='mmCB_PERFCOUNTER2_SELECT'; mmCB_PERFCOUNTER3_SELECT :Result:='mmCB_PERFCOUNTER3_SELECT'; mmDB_PERFCOUNTER0_SELECT :Result:='mmDB_PERFCOUNTER0_SELECT'; mmDB_PERFCOUNTER0_SELECT1 :Result:='mmDB_PERFCOUNTER0_SELECT1'; mmDB_PERFCOUNTER1_SELECT :Result:='mmDB_PERFCOUNTER1_SELECT'; mmDB_PERFCOUNTER1_SELECT1 :Result:='mmDB_PERFCOUNTER1_SELECT1'; mmDB_PERFCOUNTER2_SELECT :Result:='mmDB_PERFCOUNTER2_SELECT'; mmDB_PERFCOUNTER3_SELECT :Result:='mmDB_PERFCOUNTER3_SELECT'; mmDB_CGTT_CLK_CTRL_0 :Result:='mmDB_CGTT_CLK_CTRL_0'; mmCB_CGTT_SCLK_CTRL :Result:='mmCB_CGTT_SCLK_CTRL'; mmGRBM_HYP_CAM_INDEX :Result:='mmGRBM_HYP_CAM_INDEX'; mmGRBM_HYP_CAM_DATA :Result:='mmGRBM_HYP_CAM_DATA'; else Result:=HexStr(i,4); end; end; end.