mirror of https://github.com/red-prig/fpPS4.git
This commit is contained in:
Pavel
parent
8e49185a9a
commit
f8ed61d997
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@ -403,7 +403,6 @@ type
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procedure AddGw;
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procedure AddGy;
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procedure AddGz;
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procedure AddHdq;
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procedure AddHpd;
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procedure AddHps;
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procedure AddHsd;
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@ -1498,11 +1497,6 @@ begin
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else AddModReg(regGeneral, os32);
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end;
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procedure TX86Disassembler.AddHdq;
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begin
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AddVexReg(regXmm, Vex.VectorLength);
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end;
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procedure TX86Disassembler.AddHpd;
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begin
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if flagVex in Flags
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@ -3677,8 +3671,8 @@ begin
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$C4: begin
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DecodeSIMD([soNone, so66]);
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case SimdOpcode of
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soNone: begin SetOpcode(OPpinsr, OPSx_w ); AddPq; AddRy_Mw; AddIb end;
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so66: begin SetOpcode(OPpinsr, OPSx_w, True); AddVdq; AddHdq; AddRy_Mw; AddIb end;
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soNone: begin SetOpcode(OPpinsr, OPSx_w ); AddPq; AddRy_Mw; AddIb end;
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so66: begin SetOpcode(OPpinsr, OPSx_w, True); AddVdq; AddHx; AddRy_Mw; AddIb end;
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end;
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end;
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$C5: begin
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@ -3937,10 +3931,10 @@ begin
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$BE: begin SetOpcode(OPvfnmsub231, OPS_ps_d ); AddVx; AddHx; AddWx; CheckVex; end;
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$BF: begin SetOpcode(OPvfnmsub231, OPS_ss_d ); AddVx; AddHx; AddWx; CheckVex; end;
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$DB: begin SetOpcode(OPaesimc, OPSnone, True); AddVdq; AddWdq; end;
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$DC: begin SetOpcode(OPaesenc, OPSnone, True); AddVdq; AddHdq; AddWdq; end;
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$DD: begin SetOpcode(OPaesenclast, OPSnone, True); AddVdq; AddHdq; AddWdq; end;
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$DE: begin SetOpcode(OPaesdec, OPSnone, True); AddVdq; AddHdq; AddWdq; end;
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$DF: begin SetOpcode(OPaesdeclast, OPSnone, True); AddVdq; AddHdq; AddWdq; end;
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$DC: begin SetOpcode(OPaesenc, OPSnone, True); AddVdq; AddHx; AddWdq; end;
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$DD: begin SetOpcode(OPaesenclast, OPSnone, True); AddVdq; AddHx; AddWdq; end;
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$DE: begin SetOpcode(OPaesdec, OPSnone, True); AddVdq; AddHx; AddWdq; end;
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$DF: begin SetOpcode(OPaesdeclast, OPSnone, True); AddVdq; AddHx; AddWdq; end;
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$F0: begin SetOpcode(OPmov, OPSc_be ); AddGw; AddMw; end;
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$F1: begin SetOpcode(OPmov, OPSc_be ); AddMw; AddGw; end;
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$F6: begin SetOpcode(OPadcx ); AddGy; AddEy; end;
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@ -4007,15 +4001,15 @@ begin
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$18: begin SetOpcode(OPinsert, OPSx_f128,True); AddVqq; AddHqq; AddWqq; AddIb; CheckVex; end;
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$19: begin SetOpcode(OPextract, OPSx_f128,True); AddWdq; AddVqq; AddIb; CheckVex; end;
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$1D: begin SetOpcode(OPcvtps2, OPSx_ph, True); AddWx_Mq; AddVx; AddIb; CheckVex; end;
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$20: begin SetOpcode(OPpinsr, OPSx_b, True); AddVdq; AddHdq; AddRy_Mb; AddIb; end;
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$21: begin SetOpcode(OPinsert, OPSx_ps, True); AddVdq; AddHdq; AddUdq_Md; AddIb; end;
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$22: begin SetOpcode(OPpinsr, OPS_d_q, True); AddVdq; AddHdq; AddEy; AddIb; end;
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$20: begin SetOpcode(OPpinsr, OPSx_b, True); AddVdq; AddHx; AddRy_Mb; AddIb; end;
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$21: begin SetOpcode(OPinsert, OPSx_ps, True); AddVdq; AddHx; AddUdq_Md; AddIb; end;
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$22: begin SetOpcode(OPpinsr, OPS_d_q, True); AddVdq; AddHx; AddEy; AddIb; end;
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$38: begin SetOpcode(OPinsert, OPSx_i128,True); AddVqq; AddHqq; AddWqq; AddIb; CheckVex; end;
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$39: begin SetOpcode(OPextract, OPSx_i128,True); AddWdq; AddVqq; AddIb; CheckVex; end;
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$40: begin SetOpcode(OPdp, OPSx_ps, True); AddVx; AddHx; AddWx; AddIb; end;
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$41: begin SetOpcode(OPdp, OPSx_pd, True); AddVdq; AddHx; AddWdq; AddIb; end;
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$42: begin SetOpcode(OPmpsadbw, OPSnone, True); AddVx; AddHx; AddWx; AddIb; end;
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$44: begin SetOpcode(OPpclmulqdq, OPSnone, True); AddVdq; AddHdq; AddWdq; AddIb; end;
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$44: begin SetOpcode(OPpclmulqdq, OPSnone, True); AddVdq; AddHx; AddWdq; AddIb; end;
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$46: begin SetOpcode(OPvperm2, OPSx_i128 ); AddVqq; AddHqq; AddWqq; AddIb; CheckVex; end;
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$4A: begin SetOpcode(OPblendv, OPSx_ps, True); AddVx; AddHx; AddWx; AddLx; CheckVex; end;
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$4B: begin SetOpcode(OPblendv, OPSx_pd, True); AddVx; AddHx; AddWx; AddLx; CheckVex; end;
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@ -387,7 +387,14 @@ type
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procedure subi (reg:TRegValue ;imm:Int64);
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procedure subi8 (reg:TRegValue ;imm:Byte);
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procedure subi8 (mem:t_jit_leas ;imm:Byte);
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procedure shli8 (reg:TRegValue ;imm:Byte);
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procedure shri8 (reg:TRegValue ;imm:Byte);
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procedure andi (reg:TRegValue ;imm:Int64);
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procedure andi8 (reg:TRegValue ;imm:Byte);
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procedure andq (reg0:TRegValue ;reg1:TRegValue);
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procedure orq (reg0:TRegValue ;reg1:TRegValue);
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procedure xorq (reg0:TRegValue ;reg1:TRegValue);
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procedure notq (reg:TRegValue);
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procedure cmpq (mem:t_jit_leas ;reg:TRegValue);
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procedure cmpq (reg:TRegValue ;mem:t_jit_leas);
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procedure cmpq (reg0:TRegValue ;reg1:TRegValue);
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@ -433,6 +440,8 @@ type
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procedure int3;
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procedure testq(reg0:TRegValue;reg1:TRegValue);
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procedure bti8 (mem:t_jit_leas;imm:Byte);
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procedure shlx (reg0,reg1,reg2:TRegValue);
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procedure shrx (reg0,reg1,reg2:TRegValue);
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end;
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operator :=(const A:TRegValue):t_jit_lea;
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@ -3746,6 +3755,50 @@ end;
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///
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procedure t_jit_builder.shli8(reg:TRegValue;imm:Byte);
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const
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desc:t_op_type=(op:$C1;index:4);
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begin
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_RI8(desc,reg,imm);
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end;
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procedure t_jit_builder.shri8(reg:TRegValue;imm:Byte);
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const
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desc:t_op_type=(op:$C1;index:5);
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begin
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_RI8(desc,reg,imm);
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end;
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///
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procedure t_jit_builder.andi(reg:TRegValue;imm:Int64);
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const
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desc:t_op_type=(op:$81;index:4);
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begin
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_RI(desc,reg,imm);
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end;
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procedure t_jit_builder.andi8(reg:TRegValue;imm:Byte);
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const
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desc:t_op_type=(op:$83;index:4);
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begin
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_RI8(desc,reg,imm);
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end;
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procedure t_jit_builder.andq(reg0:TRegValue;reg1:TRegValue);
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const
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desc:t_op_type=(op:$21;index:0);
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begin
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_RR(desc,reg0,reg1);
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end;
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procedure t_jit_builder.orq(reg0:TRegValue;reg1:TRegValue);
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const
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desc:t_op_type=(op:$09;index:0);
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begin
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_RR(desc,reg0,reg1);
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end;
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procedure t_jit_builder.xorq(reg0:TRegValue;reg1:TRegValue);
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const
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desc:t_op_type=(op:$31;index:0);
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@ -3753,6 +3806,13 @@ begin
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_RR(desc,reg0,reg1);
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end;
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procedure t_jit_builder.notq(reg:TRegValue);
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const
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desc:t_op_type=(op:$F7;index:2);
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begin
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_R(desc,reg);
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end;
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///
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procedure t_jit_builder.cmpq(mem:t_jit_leas;reg:TRegValue);
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@ -4879,7 +4939,7 @@ end;
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procedure t_jit_builder.seto(reg:TRegValue);
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const
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desc:t_op_type=(op:$0F90;opt:[not_prefix]);
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desc:t_op_type=(op:$0F90;opt:[not_prefix,not_os8]);
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begin
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_R(desc,reg);
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end;
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@ -4903,6 +4963,23 @@ begin
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_MI8(desc,mem,imm);
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end;
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procedure t_jit_builder.shlx(reg0,reg1,reg2:TRegValue);
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const
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desc:t_op_type=(
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op:$F7;simdop:1;mm:2;vw_mode:vwR64;
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);
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begin
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_VVV(desc,reg0,reg2,reg1,os64); //1 3 2
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end;
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procedure t_jit_builder.shrx(reg0,reg1,reg2:TRegValue);
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const
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desc:t_op_type=(
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op:$F7;simdop:3;mm:2;vw_mode:vwR64;
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);
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begin
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_VVV(desc,reg0,reg2,reg1,os64); //1 3 2
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end;
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end.
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@ -1037,8 +1037,8 @@ begin
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movq([GS+Integer(teb_jitcall)],r13);
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//load curkthread,jit ctx
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movq(r13,[GS+Integer(teb_thread)]);
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leaq(r13,[r13+jit_frame_offset]);
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movq(r13,[GS +Integer(teb_thread)]);
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leaq(r13,[r13+jit_frame_offset ]);
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//load r14,r15
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movq([r13+Integer(@p_jit_frame(nil)^.tf_r14)],r14);
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@ -1610,13 +1610,6 @@ end;
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// 64-40 = 24
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procedure op_uplift(var ctx:t_jit_context2;const dst:TRegValue;mem_size:TOperandSize;hint:t_lea_hint=[]);
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const
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shlx_desc:t_op_type=(
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op:$F7;simdop:1;mm:2;vw_mode:vwR64;
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);
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shrx_desc:t_op_type=(
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op:$F7;simdop:3;mm:2;vw_mode:vwR64;
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);
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var
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rbits:TRegValue;
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begin
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@ -1647,8 +1640,8 @@ begin
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movi(new_reg_size(rbits,os8),24); //mov $24,%bpl
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//clear hi
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_VVV(shlx_desc,dst,rbits,dst,os64); //1 3 2 | shlx %rbp,%r14,%r14
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_VVV(shrx_desc,dst,rbits,dst,os64); //1 3 2 | shrx %rbp,%r14,%r14
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shlx(dst,dst,rbits); //shlx %rbp,%r14,%r14
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shrx(dst,dst,rbits); //shrx %rbp,%r14,%r14
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if (rbits.AIndex=rbp.AIndex) then
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begin
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@ -8,9 +8,11 @@ interface
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implementation
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uses
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kern_thr,
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x86_fpdbgdisas,
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x86_jit,
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kern_jit_ops,
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kern_jit_asm,
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kern_jit_ctx;
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var
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@ -323,14 +325,180 @@ begin
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end;
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end;
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//
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//SSE4a
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{
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AMD64 Architecture
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Programmer’s Manual
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Volume 4:
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128-Bit and 256-Bit
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Media Instructions
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}
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procedure op_movnt_sd_ss(var ctx:t_jit_context2);
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begin
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op_emit2_simd_mem_reg(ctx,[his_mov,his_wo]);
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end;
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//
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{
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a = xmm0[0:63]
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b = xmm1[0:63]
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mask = 0xFFFFFFFFFFFFFFFF;
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m = mask shl (64 - (idx + len));
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m = m shr (64 - len);
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m = m shl idx;
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b = b shl idx;
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b = b and m;
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a = (not m) and a;
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a = a or b;
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xmm0[0:63] = a;
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}
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procedure movq_r_xmm(var ctx:t_jit_context2;reg0,reg1:TRegValue);
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const
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desc:t_op_type=(op:$660F7E;index:0);
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begin
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ctx.builder._RR(desc,reg0,reg1,reg0.ASize); //66 REX.W 0F 7E /r MOVQ r/m64, xmm
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end;
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procedure pinsrq(var ctx:t_jit_context2;reg0,reg1:TRegValue;imm8:Byte);
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const
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desc:t_op_type=(op:$660F3A22;index:0);
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begin
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ctx.builder._RRI8(desc,reg0,reg1,imm8,reg1.ASize);
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end;
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procedure pextrq(var ctx:t_jit_context2;reg0,reg1:TRegValue;imm8:Byte);
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const
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desc:t_op_type=(op:$660F3A16;index:0);
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begin
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ctx.builder._RRI8(desc,reg0,reg1,imm8,reg0.ASize);
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end;
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procedure op_insertq(var ctx:t_jit_context2);
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var
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len,idx:Int64;
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mask:QWORD;
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xmm_a,xmm_b:TRegValue;
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a,b,m:TRegValue;
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begin
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xmm_a:=new_reg(ctx.din.Operand[1]);
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xmm_b:=new_reg(ctx.din.Operand[2]);
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a:=r_tmp0;
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b:=r_tmp1;
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m:=r_thrd;
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with ctx.builder do
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begin
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//swap
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xchgq(rbp,rax);
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//load flags to al,ah
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seto(al);
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lahf;
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if (ctx.din.OperCnt=4) then
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begin
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//insertq xmm0,xmm1,$10,$30
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len:=0;
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GetTargetOfs(ctx.din,ctx.code,3,len);
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idx:=0;
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GetTargetOfs(ctx.din,ctx.code,4,idx);
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len:=len and $3F;
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idx:=idx and $3F;
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mask:=QWORD($FFFFFFFFFFFFFFFF);
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mask:=mask shl (64 - (idx + len));
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mask:=mask shr (64 - len);
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mask:=mask shl idx;
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if (classif_offset_u64(mask)=os64) then
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begin
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//64bit mask
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movi64(m,mask);
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end else
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begin
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//32bit zero extend
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movi(new_reg_size(m,os32),mask);
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end;
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end else
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begin
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//insertq xmm0,xmm1
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//PEXTRQ r/m64, xmm2, imm8
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pextrq(ctx,m,xmm_b,1);
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movq (b,m);
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andi8(b,$3F); //b = len with m[0]
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movi (new_reg_size(a,os32),64); //a = 64
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subq (a,b); //a = (64 - len)
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andi (m,$3F00); //filter
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movq (b,a);
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andi8(b,$FF);
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orq (m,b); // save (64 - len) to m[0]
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movq (b,m);
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shri8(b,8);
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andi8(b,$3F); // b = idx with m[1]
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subq (a,b); // a = (64 - len - idx)
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movi (b,-1); // b = 0xFFFFFFFFFFFFFFFF
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shlx (b,b,a); // b = b shl (64 - idx - len)
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shrx (b,b,m); // b = b shr (64 - len):[0x3F];
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shli8(m,8); // m[0] = m[1]
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shlx (b,b,m); // b = b shl idx
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movq (m,b); // m = b
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end;
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//a = xmm0[0:63]
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movq_r_xmm(ctx,a,xmm_a);
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movq_r_xmm(ctx,b,xmm_b);
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andq(b,m);
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notq(m);
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andq(a,m);
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orq (a,b);
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//xmm0[0:63] = a;
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//PINSRQ xmm1, r/m64, imm8
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pinsrq(ctx,xmm_a,a,0);
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//store flags from al,ah
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addi(al,127);
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sahf;
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//swap
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xchgq(rbp,rax);
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//restore rbp
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movq(rbp,rsp);
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//restore jit_frame
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movq(r13,[GS +Integer(teb_thread)]);
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leaq(r13,[r13+jit_frame_offset ]);
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end;
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||||
|
||||
end;
|
||||
|
||||
//SSE4a
|
||||
|
||||
const
|
||||
movl_ps_pd_desc:t_op_desc=(
|
||||
|
|
@ -633,12 +801,15 @@ begin
|
|||
begin
|
||||
jit_cbs[OPPnone,OPmovnt,OPSx_sd]:=@op_movnt_sd_ss;
|
||||
jit_cbs[OPPnone,OPmovnt,OPSx_ss]:=@op_movnt_sd_ss;
|
||||
jit_cbs[OPPnone,OPinsert,OPSx_q]:=@add_orig;
|
||||
end else
|
||||
begin
|
||||
jit_cbs[OPPnone,OPmovnt,OPSx_sd]:=@op_movsd;
|
||||
jit_cbs[OPPnone,OPmovnt,OPSx_ss]:=@op_movss;
|
||||
jit_cbs[OPPnone,OPinsert,OPSx_q]:=@op_insertq;
|
||||
end;
|
||||
|
||||
|
||||
jit_cbs[OPPnone,OPaeskeygenassist,OPSnone]:=@op_reg_mem_wo;
|
||||
jit_cbs[OPPnone,OPaesimc ,OPSnone]:=@op_reg_mem_wo;
|
||||
|
||||
|
|
|
|||
|
|
@ -5,6 +5,9 @@ unit kern_mtx;
|
|||
|
||||
interface
|
||||
|
||||
uses
|
||||
sysutils;
|
||||
|
||||
type
|
||||
p_mtx=^mtx;
|
||||
mtx=packed record
|
||||
|
|
@ -133,7 +136,7 @@ end;
|
|||
|
||||
procedure mtx_assert(var m:mtx); inline;
|
||||
begin
|
||||
Assert(mtx_owned(m));
|
||||
Assert(mtx_owned(m),IntToStr(m.c.OwningThread)+'<>'+IntToStr(GetCurrentThreadId));
|
||||
end;
|
||||
|
||||
end.
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@ uses
|
|||
vm_pmap_prot,
|
||||
vm_tracking_map,
|
||||
kern_proc,
|
||||
kern_jit_ctx,
|
||||
kern_jit_dynamic;
|
||||
|
||||
const
|
||||
|
|
@ -256,6 +257,8 @@ begin
|
|||
end;
|
||||
|
||||
function ProcessException(p:PExceptionPointers):longint; stdcall;
|
||||
var
|
||||
instr:t_instruction_info;
|
||||
begin
|
||||
Result:=EXCEPTION_CONTINUE_SEARCH;
|
||||
if (curkthread=nil) then Exit;
|
||||
|
|
@ -271,10 +274,11 @@ begin
|
|||
|
||||
STATUS_ACCESS_VIOLATION:
|
||||
begin
|
||||
instr:=get_instruction_info(Pointer(p^.ContextRecord^.Rip));
|
||||
|
||||
if pmap_danger_zone(vm_map_t(p_proc.p_vmspace)^.pmap,
|
||||
get_pageflt_addr(p),
|
||||
256 //TODO: access len
|
||||
instr.mema_size
|
||||
) then
|
||||
begin
|
||||
Exit(EXCEPTION_CONTINUE_EXECUTION);
|
||||
|
|
@ -283,23 +287,21 @@ begin
|
|||
case get_pageflt_err(p) of
|
||||
VM_PROT_READ:
|
||||
begin
|
||||
//TODO: access len
|
||||
if ((ppmap_get_prot(get_pageflt_addr(p),256) and VM_PROT_READ)<>0) then
|
||||
if ((ppmap_get_prot(get_pageflt_addr(p),instr.mema_size) and VM_PROT_READ)<>0) then
|
||||
begin
|
||||
Writeln(stderr,'Unhandled VM_PROT_READ');
|
||||
end;
|
||||
end;
|
||||
VM_PROT_WRITE:
|
||||
begin
|
||||
//TODO: access len
|
||||
if ((ppmap_get_prot(get_pageflt_addr(p),256) and VM_PROT_WRITE)<>0) then
|
||||
if ((ppmap_get_prot(get_pageflt_addr(p),instr.mema_size) and VM_PROT_WRITE)<>0) then
|
||||
begin
|
||||
Writeln('TRACK_WRITE:',HexStr(get_pageflt_addr(p),10));
|
||||
|
||||
//trigger and restore
|
||||
vm_map_track_trigger(p_proc.p_vmspace,
|
||||
get_pageflt_addr(p),
|
||||
get_pageflt_addr(p)+256, //TODO: access len
|
||||
get_pageflt_addr(p)+instr.mema_size,
|
||||
nil,
|
||||
M_CPU_WRITE);
|
||||
//
|
||||
|
|
|
|||
Loading…
Reference in New Issue