+

rtl/x86_fpdbgdisas.pp

@@ -1794,12 +1794,12 @@ end;
 
 procedure TX86Disassembler.AddUpd;
 begin
-  AddModRM([modReg], os128, regXmm);
+  AddModRM([modReg], VectorSize, regXmm);
 end;
 
 procedure TX86Disassembler.AddUps;
 begin
-  AddModRM([modReg], os128, regXmm);
+  AddModRM([modReg], VectorSize, regXmm);
 end;
 
 procedure TX86Disassembler.AddUq;

rtl/x86_jit.pas

@@ -341,8 +341,8 @@ type
   procedure _VVM    (const desc:t_op_type;reg0,reg1:TRegValue;mem:t_jit_regs;size:TOperandSize);
   procedure _VVMI8  (const desc:t_op_type;reg0,reg1:TRegValue;mem:t_jit_regs;size:TOperandSize;imm8:Byte);
   procedure _VVMV   (const desc:t_op_type;reg0,reg1:TRegValue;mem:t_jit_regs;size:TOperandSize;reg2:TRegValue);
-  procedure _VVV    (const desc:t_op_type;reg0,reg1,reg2:TRegValue);
+  procedure _VVV    (const desc:t_op_type;reg0,reg1,reg2:TRegValue;size:TOperandSize);
-  procedure _VVVI8  (const desc:t_op_type;reg0,reg1,reg2:TRegValue;imm8:Byte);
+  procedure _VVVI8  (const desc:t_op_type;reg0,reg1,reg2:TRegValue;size:TOperandSize;imm8:Byte);
   procedure _VVI8   (const desc:t_op_type;reg0,reg1:TRegValue;size:TOperandSize;imm8:Byte);
   procedure _VMI8   (const desc:t_op_type;reg:TRegValue;mem:t_jit_regs;size:TOperandSize;imm8:Byte);
   procedure vmovdqu (reg:TRegValue ;mem:t_jit_regs);
@@ -3240,15 +3240,20 @@ begin
  ji:=default_jit_instruction;
 
  Vex.Length:=0;
+ Vex.rexW:=False;
 
- if not (not_vex_len in desc.opt) then
+ if (size=os0) then
- case reg0.ASize of
+ begin
-  os128:Vex.Length:=0;
+  size:=reg0.ASize;
-  os256:Vex.Length:=1;
-  else;
  end;
 
- Vex.rexW:=False;
+ if not (not_vex_len in desc.opt) then
+ if (size=os256) then
+ begin
+  Vex.Length:=1;
+ end;
+
+ if not (not_prefix in desc.opt) then
  if (size=os64) then
  begin
   Vex.rexW:=True;
@@ -3312,15 +3317,20 @@ begin
  ji:=default_jit_instruction;
 
  Vex.Length:=0;
+ Vex.rexW:=False;
 
- if not (not_vex_len in desc.opt) then
+ if (size=os0) then
- case reg.ASize of
+ begin
-  os128:Vex.Length:=0;
+  size:=reg.ASize;
-  os256:Vex.Length:=1;
-  else;
  end;
 
- Vex.rexW:=False;
+ if not (not_vex_len in desc.opt) then
+ if (size=os256) then
+ begin
+  Vex.Length:=1;
+ end;
+
+ if not (not_prefix in desc.opt) then
  if (size=os64) then
  begin
   Vex.rexW:=True;
@@ -3383,8 +3393,20 @@ begin
  ji:=default_jit_instruction;
 
  Vex.Length:=0;
-
  Vex.rexW:=False;
+
+ if (size=os0) then
+ begin
+  size:=reg0.ASize;
+ end;
+
+ if not (not_vex_len in desc.opt) then
+ if (size=os256) then
+ begin
+  Vex.Length:=1;
+ end;
+
+ if not (not_prefix in desc.opt) then
  if (size=os64) then
  begin
   Vex.rexW:=True;
@@ -3442,29 +3464,27 @@ begin
  ji:=default_jit_instruction;
 
  Vex.Length:=0;
-
+ Vex.rexW:=False;
- if not (not_vex_len in desc.opt) then
- case reg0.ASize of
-  os128:Vex.Length:=0;
-  os256:Vex.Length:=1;
-  else;
- end;
-
- Vex.Index:=reg1.AIndex;
 
  if (size=os0) then
  begin
   size:=reg0.ASize;
  end;
 
+ if not (not_vex_len in desc.opt) then
+ if (size=os256) then
+ begin
+  Vex.Length:=1;
+ end;
+
+ if not (not_prefix in desc.opt) then
  if (size=os64) then
  begin
   Vex.rexW:=True;
- end else
- begin
-  Vex.rexW:=False;
  end;
 
+ Vex.Index:=reg1.AIndex;
+
  modrm_info:=Default(t_modrm_info);
 
  modrm_info.build_rm(reg0,mreg);
@@ -3538,29 +3558,27 @@ begin
  ji:=default_jit_instruction;
 
  Vex.Length:=0;
-
+ Vex.rexW:=False;
- if not (not_vex_len in desc.opt) then
- case reg0.ASize of
-  os128:Vex.Length:=0;
-  os256:Vex.Length:=1;
-  else;
- end;
-
- Vex.Index:=reg1.AIndex;
 
  if (size=os0) then
  begin
   size:=reg0.ASize;
  end;
 
+ if not (not_vex_len in desc.opt) then
+ if (size=os256) then
+ begin
+  Vex.Length:=1;
+ end;
+
+ if not (not_prefix in desc.opt) then
  if (size=os64) then
  begin
   Vex.rexW:=True;
- end else
- begin
-  Vex.rexW:=False;
  end;
 
+ Vex.Index:=reg1.AIndex;
+
  modrm_info:=Default(t_modrm_info);
 
  modrm_info.build_rm(reg0,mreg);
@@ -3607,7 +3625,7 @@ begin
  _VVMI8(desc,reg0,reg1,mem,size,reg2.AIndex shl 4);
 end;
 
-procedure t_jit_builder._VVV(const desc:t_op_type;reg0,reg1,reg2:TRegValue);
+procedure t_jit_builder._VVV(const desc:t_op_type;reg0,reg1,reg2:TRegValue;size:TOperandSize);
 var
  modrm_info:t_modrm_info;
 
@@ -3637,22 +3655,27 @@ begin
  ji:=default_jit_instruction;
 
  Vex.Length:=0;
+ Vex.rexW:=False;
 
- if not (not_vex_len in desc.opt) then
+ if (size=os0) then
- case reg0.ASize of
+ begin
-  os128:Vex.Length:=0;
+  size:=reg0.ASize;
-  os256:Vex.Length:=1;
-  else;
  end;
 
- Vex.Index:=reg1.AIndex;
+ if not (not_vex_len in desc.opt) then
+ if (size=os256) then
+ begin
+  Vex.Length:=1;
+ end;
 
- Vex.rexW:=False;
+ if not (not_prefix in desc.opt) then
- if (reg0.ASize=os64) then
+ if (size=os64) then
  begin
   Vex.rexW:=True;
  end;
 
+ Vex.Index:=reg1.AIndex;
+
  modrm_info:=Default(t_modrm_info);
 
  modrm_info.build_rr(reg2,reg0);
@@ -3680,7 +3703,7 @@ begin
  _add(ji);
 end;
 
-procedure t_jit_builder._VVVI8(const desc:t_op_type;reg0,reg1,reg2:TRegValue;imm8:Byte);
+procedure t_jit_builder._VVVI8(const desc:t_op_type;reg0,reg1,reg2:TRegValue;size:TOperandSize;imm8:Byte);
 var
  modrm_info:t_modrm_info;
 
@@ -3710,22 +3733,27 @@ begin
  ji:=default_jit_instruction;
 
  Vex.Length:=0;
+ Vex.rexW:=False;
 
- if not (not_vex_len in desc.opt) then
+ if (size=os0) then
- case reg0.ASize of
+ begin
-  os128:Vex.Length:=0;
+  size:=reg0.ASize;
-  os256:Vex.Length:=1;
-  else;
  end;
 
- Vex.Index:=reg1.AIndex;
+ if not (not_vex_len in desc.opt) then
+ if (size=os256) then
+ begin
+  Vex.Length:=1;
+ end;
 
- Vex.rexW:=False;
+ if not (not_prefix in desc.opt) then
- if (reg0.ASize=os64) then
+ if (size=os64) then
  begin
   Vex.rexW:=True;
  end;
 
+ Vex.Index:=reg1.AIndex;
+
  modrm_info:=Default(t_modrm_info);
 
  modrm_info.build_rr(reg2,reg0);
@@ -3780,25 +3808,23 @@ begin
  ji:=default_jit_instruction;
 
  Vex.Length:=0;
-
+ Vex.rexW:=False;
- if not (not_vex_len in desc.opt) then
- case reg1.ASize of
-  os128:Vex.Length:=0;
-  os256:Vex.Length:=1;
-  else;
- end;
 
  if (size=os0) then
  begin
   size:=reg0.ASize;
  end;
 
+ if not (not_vex_len in desc.opt) then
+ if (size=os256) then
+ begin
+  Vex.Length:=1;
+ end;
+
+ if not (not_prefix in desc.opt) then
  if (size=os64) then
  begin
   Vex.rexW:=True;
- end else
- begin
-  Vex.rexW:=False;
  end;
 
  modrm_info:=Default(t_modrm_info);
@@ -3848,25 +3874,23 @@ begin
  ji:=default_jit_instruction;
 
  Vex.Length:=0;
-
+ Vex.rexW:=False;
- if not (not_vex_len in desc.opt) then
- case reg.ASize of
-  os128:Vex.Length:=0;
-  os256:Vex.Length:=1;
-  else;
- end;
 
  if (size=os0) then
  begin
   size:=reg.ASize;
  end;
 
+ if not (not_vex_len in desc.opt) then
+ if (size=os256) then
+ begin
+  Vex.Length:=1;
+ end;
+
+ if not (not_prefix in desc.opt) then
  if (size=os64) then
  begin
   Vex.rexW:=True;
- end else
- begin
-  Vex.rexW:=False;
  end;
 
  modrm_info:=Default(t_modrm_info);

sys/test/kern_jit2.pas

@@ -16,7 +16,8 @@ uses
  x86_fpdbgdisas,
  x86_jit,
  kern_stub,
- kern_jit2_ctx;
+ kern_jit2_ctx,
+ kern_jit2_ops_avx;
 
 procedure pick(var ctx:t_jit_context2);
 
@@ -556,6 +557,9 @@ begin
 
  jit_cbs[OPPnone,OPnop,OPSnone]:=@op_nop;
 
+ kern_jit2_ops.init_cbs;
+ init_cbs_avx;
+
  inited:=1;
 end;
 
@@ -584,7 +588,6 @@ var
 begin
 
  init_cbs;
- kern_jit2_ops.init_cbs;
 
  ctx.max:=QWORD(ctx.max_forward_point);
  Writeln(' ctx.text_start:0x',HexStr(ctx.text_start,16));

sys/test/kern_jit2_ctx.pas

@@ -205,6 +205,7 @@ procedure op_save_rax(var ctx:t_jit_context2;reg:TRegValue);
 procedure op_emit1(var ctx:t_jit_context2;const desc:t_op_type;hint:t_op_hint);
 procedure op_emit2(var ctx:t_jit_context2;const desc:t_op_desc);
 procedure op_emit_shift(var ctx:t_jit_context2;const desc:t_op_shift);
+procedure op_emit_avx2_rr(var ctx:t_jit_context2;const desc:t_op_type);
 procedure op_emit_avx2(var ctx:t_jit_context2;const desc:t_op_desc);
 procedure op_emit_avx3(var ctx:t_jit_context2;const desc:t_op_type);
 procedure op_emit_avx3_imm8(var ctx:t_jit_context2;const desc:t_op_avx3_imm);
@@ -1996,6 +1997,31 @@ end;
 
 //
 
+procedure op_emit_avx2_rr(var ctx:t_jit_context2;const desc:t_op_type);
+var
+ i:Integer;
+ new1,new2:TRegValue;
+begin
+ if is_preserved(ctx.din.Operand[1]) then
+ begin
+  with ctx.builder do
+  begin
+   new1:=r_tmp0;
+   new2:=new_reg(ctx.din.Operand[2]);
+
+   _VV(desc,new1,new2,new2.ASize);
+
+   i:=GetFrameOffset(ctx.din.Operand[1]);
+   movq([r_thrd+i],new1);
+  end;
+ end else
+ begin
+  Assert(False);
+ end;
+end;
+
+//
+
 procedure op_emit_avx2(var ctx:t_jit_context2;const desc:t_op_desc);
 var
  i:Integer;
@@ -2639,7 +2665,7 @@ begin
    new3:=new_reg(ctx.din.Operand[3]);
   end;
 
-  _VVV(desc,new1,new3,new2); //1 3 2
+  _VVV(desc,new1,new3,new2,new3.ASize); //1 3 2
 
   if is_preserved(ctx.din.Operand[1]) then
   begin
@@ -2705,7 +2731,7 @@ begin
    new3:=new_reg(ctx.din.Operand[3]);
   end;
 
-  _VVV(desc,new1,new2,new3); //1 2 3
+  _VVV(desc,new1,new2,new3,new3.ASize); //1 2 3
 
   if is_preserved(ctx.din.Operand[1]) then
   begin

sys/test/project1.lpi

@@ -754,6 +754,10 @@
         <Filename Value="..\..\rtl\g_node_splay.pas"/>
         <IsPartOfProject Value="True"/>
       </Unit>
+      <Unit>
+        <Filename Value="kern_jit2_ops_avx.pas"/>
+        <IsPartOfProject Value="True"/>
+      </Unit>
     </Units>
   </ProjectOptions>
   <CompilerOptions>