diff --git a/chip/ps4_pssl.pas b/chip/ps4_pssl.pas
index b71d6884..9d4da648 100644
--- a/chip/ps4_pssl.pas
+++ b/chip/ps4_pssl.pas
@@ -1953,7 +1953,7 @@ begin
  end;
  Write(' ');
  _print_sdst7(SPI.SOPK.SDST);
- Write(' ');
+ Write(', ');
 
  Case SPI.SOPK.OP of
   S_MOVK_I32   ,
@@ -2202,7 +2202,7 @@ begin
   V_CMPX_CLASS_F64:Write('V_CMPX_CLASS_F64');
 
   else
-      Write('VOP3a_cmp?',VOP3.OP);
+      Write('VOP3c?',VOP3.OP);
  end;
  Write(' ');
 
diff --git a/spirv/SprvEmit.pas b/spirv/SprvEmit.pas
index 3553676b..a53ca51d 100644
--- a/spirv/SprvEmit.pas
+++ b/spirv/SprvEmit.pas
@@ -168,8 +168,6 @@ type
   procedure RegPrepType(node:PsrRegNode;rtype:TsrDataType);
 
   procedure _emit_spi;
-  procedure _emit_DS;
-  procedure _emit_SOPK;
  end;
 
 function  RegDown(node:PsrRegNode):PsrRegNode;
@@ -191,6 +189,7 @@ uses
  emit_SOP2,
  emit_SOPC,
  emit_SOPP,
+ emit_SOPK,
  emit_VOP1,
  emit_VOP2,
  emit_VOP3,
@@ -1741,7 +1740,7 @@ begin
   W_VINTRP:TEmit_VINTRP(Self)._emit_VINTRP;
   W_MIMG  :TEmit_MIMG(Self)._emit_MIMG;
   W_SMRD  :TEmit_SMRD(Self)._emit_SMRD;
-  W_SOPK  :_emit_SOPK;
+  W_SOPK  :TEmit_SOPK(Self)._emit_SOPK;
   W_SOP2  :TEmit_SOP2(Self)._emit_SOP2;
   W_VOP2  :TEmit_VOP2(Self)._emit_VOP2;
   else
@@ -1749,15 +1748,5 @@ begin
  end;
 end;
 
-procedure TSprvEmit._emit_DS;
-begin
- Assert(false,'DS?'+IntToStr(FSPI.DS.OP));
-end;
-
-procedure TSprvEmit._emit_SOPK;
-begin
- Assert(false,'SOPK?'+IntToStr(FSPI.SOPK.OP));
-end;
-
 end.
 
diff --git a/spirv/emit_sop2.pas b/spirv/emit_sop2.pas
index 58afd442..c90d9773 100644
--- a/spirv/emit_sop2.pas
+++ b/spirv/emit_sop2.pas
@@ -27,6 +27,7 @@ type
   procedure _emit_S_OR_B64;
   procedure _emit_S_NOR_B64;
   procedure _emit_S_CSELECT_B32;
+  procedure _emit_S_CSELECT_B64;
   procedure _emit_S_BFE_U32;
  end;
 
@@ -242,6 +243,24 @@ begin
  emit_OpSelect(dst,src[0],src[1],src[2]);
 end;
 
+procedure TEmit_SOP2._emit_S_CSELECT_B64; //sdst[2] = SCC ? ssrc0[2] : ssrc1[2]
+Var
+ dst:array[0..1] of PsrRegSlot;
+ src0,src1:array[0..1] of PsrRegNode;
+ scc:PsrRegNode;
+begin
+ if not FRegsStory.get_sdst7_pair(FSPI.SOP2.SDST,@dst) then Assert(False);
+
+ if not fetch_ssrc9_pair(@src0,FSPI.SOP2.SSRC0,dtUInt32) then Assert(False);
+ if not fetch_ssrc9_pair(@src1,FSPI.SOP2.SSRC1,dtUInt32) then Assert(False);
+
+ scc:=MakeRead(@FRegsStory.SCC,dtBool);
+ scc^.mark_read;
+
+ emit_OpSelect(dst[0],src0[0],src1[0],scc);
+ emit_OpSelect(dst[1],src0[1],src1[1],scc);
+end;
+
 //offset = ssrc1[4:0].u   and 31
 //width = ssrc1[22:16].u  shr 16
 procedure TEmit_SOP2._emit_S_BFE_U32; //sdst.u = bitFieldExtract(ssrc0); SCC = (sdst.u != 0)
@@ -330,6 +349,11 @@ begin
      _emit_S_CSELECT_B32;
     end;
 
+  S_CSELECT_B64:
+    begin
+     _emit_S_CSELECT_B64;
+    end;
+
   S_BFE_U32:
     begin
      _emit_S_BFE_U32;
diff --git a/spirv/emit_sopk.pas b/spirv/emit_sopk.pas
new file mode 100644
index 00000000..0b9918af
--- /dev/null
+++ b/spirv/emit_sopk.pas
@@ -0,0 +1,53 @@
+unit emit_SOPK;
+
+{$mode objfpc}{$H+}
+
+interface
+
+uses
+  sysutils,
+  ps4_pssl,
+  srTypes,
+  srConst,
+  srReg,
+  SprvEmit,
+  emit_op;
+
+type
+ TEmit_SOPK=object(TEmitOp)
+  procedure _emit_SOPK;
+  procedure _emit_S_MOVK_I32;
+ end;
+
+implementation
+
+procedure TEmit_SOPK._emit_S_MOVK_I32;
+Var
+ dst:PsrRegSlot;
+ src:PsrRegNode;
+begin
+ dst:=FRegsStory.get_sdst7(FSPI.SOPK.SDST);
+ src:=FetchReg(FConsts.Fetchi(dtInt32,SmallInt(FSPI.SOPK.SIMM)));
+ _MakeCopy(dst,src);
+end;
+
+procedure TEmit_SOPK._emit_SOPK;
+begin
+
+ Case FSPI.SOPK.OP of
+
+  S_MOVK_I32:
+   begin
+    _emit_S_MOVK_I32;
+   end;
+
+  else
+   Assert(false,'SOPK?'+IntToStr(FSPI.SOPK.OP));
+ end;
+
+end;
+
+
+end.
+
+
diff --git a/spirv/emit_vop3.pas b/spirv/emit_vop3.pas
index 26c8f100..30e7a4aa 100644
--- a/spirv/emit_vop3.pas
+++ b/spirv/emit_vop3.pas
@@ -38,6 +38,7 @@ type
   procedure _emit_V_MUL_F32;
   procedure _emit_V_MUL_I32_I24;
   procedure _emit_V_MUL_U32_U24;
+  procedure _emit_V_MUL_HI_U32;
   procedure _emit_V_MAC_F32;
 
   procedure _emit_V_BFE_U32;
@@ -388,6 +389,31 @@ begin
  emit_OpIMul(dst,src[0],src[1]);
 end;
 
+procedure TEmit_VOP3._emit_V_MUL_HI_U32;
+Var
+ dst,tmp:PsrRegSlot;
+ src:array[0..1] of PsrRegNode;
+ tmp_r,dst_r:PsrRegNode;
+begin
+ dst:=FRegsStory.get_vdst8(FSPI.VOP3a.VDST);
+ tmp:=@FRegsStory.FUnattach;
+
+ Assert(FSPI.VOP3a.OMOD =0,'FSPI.VOP3a.OMOD');
+ Assert(FSPI.VOP3a.ABS  =0,'FSPI.VOP3a.ABS');
+ Assert(FSPI.VOP3a.CLAMP=0,'FSPI.VOP3a.CLAMP');
+ Assert(FSPI.VOP3a.NEG  =0,'FSPI.VOP3a.NEG');
+
+ src[0]:=fetch_ssrc9(FSPI.VOP3a.SRC0,dtUInt32);
+ src[1]:=fetch_ssrc9(FSPI.VOP3a.SRC1,dtUInt32);
+
+ emit_Op2(Op.OpUMulExtended,dtStruct2u,tmp,src[0],src[1]);
+
+ tmp_r:=MakeRead(tmp,dtStruct2u);
+ dst_r:=dst^.New(line,dtUInt32);
+
+ emit_OpCompExtract(line,dst_r,tmp_r,1);
+end;
+
 procedure TEmit_VOP3._emit_V_MAC_F32; //vdst = vsrc0.f * vsrc1.f + vdst.f  -> fma
 Var
  dst:PsrRegSlot;
@@ -980,6 +1006,11 @@ begin
      _emit_V_MUL_LO_I32;
     end;
 
+  V_MUL_HI_U32:
+    begin
+     _emit_V_MUL_HI_U32;
+    end;
+
   V_BFE_U32:
    begin
     _emit_V_BFE_U32;