From b2d4c43379e17f662cdc00e389e155dd1795dcae Mon Sep 17 00:00:00 2001
From: red-prig <vdpasha@mail.ru>
Date: Sun, 30 Jul 2023 22:31:24 +0300
Subject: [PATCH] Ignore M0 on VINTRP

---
 spirv/emit_vintrp.pas | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/spirv/emit_vintrp.pas b/spirv/emit_vintrp.pas
index 6f834ae9..de6a917e 100644
--- a/spirv/emit_vintrp.pas
+++ b/spirv/emit_vintrp.pas
@@ -38,8 +38,8 @@ begin
 
  inp_M0:=GetInputRegNode(get_m0^.current);
 
- Assert(inp_M0<>nil);
- Assert(inp_M0^.itype=itPsState);
+ //Assert(inp_M0<>nil);
+ //Assert(inp_M0^.itype=itPsState);
 
  Case FSPI.VINTRP.OP of
   V_INTERP_P1_F32: