diff --git a/chip/ps4_gpu_regs.pas b/chip/ps4_gpu_regs.pas index 7421af7c..bfc78ef3 100644 --- a/chip/ps4_gpu_regs.pas +++ b/chip/ps4_gpu_regs.pas @@ -235,7 +235,10 @@ type MAX_INDX:DWORD; end; - VGT_MULTI_PRIM_IB_RESET_INDX:TVGT_MULTI_PRIM_IB_RESET_INDX; + VGT_MULTI_PRIM:packed record + IB_RESET_EN :TVGT_MULTI_PRIM_IB_RESET_EN; + IB_RESET_INDX:TVGT_MULTI_PRIM_IB_RESET_INDX; + end; VGT_OUTPUT_PATH_CNTL:TVGT_OUTPUT_PATH_CNTL; diff --git a/chip/ps4_videodrv.pas b/chip/ps4_videodrv.pas index 174ccfa3..93ac05bf 100644 --- a/chip/ps4_videodrv.pas +++ b/chip/ps4_videodrv.pas @@ -1280,7 +1280,8 @@ begin mmVGT_INDX_OFFSET :DWORD(GPU_REGS.VGT_VTX_INDX.INDX_OFFSET):=value; - mmVGT_MULTI_PRIM_IB_RESET_INDX:DWORD(GPU_REGS.VGT_MULTI_PRIM_IB_RESET_INDX):=value; + mmVGT_MULTI_PRIM_IB_RESET_EN :DWORD(GPU_REGS.VGT_MULTI_PRIM.IB_RESET_EN):=value; + mmVGT_MULTI_PRIM_IB_RESET_INDX:DWORD(GPU_REGS.VGT_MULTI_PRIM.IB_RESET_INDX):=value; mmVGT_OUTPUT_PATH_CNTL:DWORD(GPU_REGS.VGT_OUTPUT_PATH_CNTL):=value; @@ -1766,7 +1767,9 @@ begin FRenderCmd.FFramebuffer.SetSize(GPU_REGS.GET_SCREEN_SIZE); - FRenderCmd.FPipeline.SetPrimType(GPU_REGS.GET_PRIM_TYPE); + FRenderCmd.FPipeline.SetPrimType (GPU_REGS.GET_PRIM_TYPE); + FRenderCmd.FPipeline.SetPrimReset(GPU_REGS.VGT_MULTI_PRIM.IB_RESET_EN.RESET_EN); + FRenderCmd.FPipeline.SetBlendColors(@GPU_REGS.CB_BLEND_RGBA); //FRenderCmd.FPipeline.multisampling.sampleShadingEnable :=VK_FALSE; @@ -1890,7 +1893,7 @@ begin end; - //if not GPU_REGS.COMP_ENABLE then Exit(false); + if not GPU_REGS.COMP_ENABLE then Exit(false); if GPU_REGS.DB_ENABLE {false} then begin DB_INFO:=GPU_REGS.GET_DB_INFO; @@ -2299,6 +2302,19 @@ begin // end; +procedure test_reset_index(INDEX_TYPE:TVkIndexType;RESET_EN:Byte;IB_RESET_INDX:DWORD); +begin + if (RESET_EN<>0) then + begin + Case INDEX_TYPE of + VK_INDEX_TYPE_UINT8_EXT:Assert(IB_RESET_INDX=$000000FF,'unsupport reset index:'+HexStr(IB_RESET_INDX,8)); + VK_INDEX_TYPE_UINT16 :Assert(IB_RESET_INDX=$0000FFFF,'unsupport reset index:'+HexStr(IB_RESET_INDX,8)); + VK_INDEX_TYPE_UINT32 :Assert(IB_RESET_INDX=$FFFFFFFF,'unsupport reset index:'+HexStr(IB_RESET_INDX,8)); + else; + end; + end; +end; + procedure onDrawIndex2(pm4Hdr:PM4_TYPE_3_HEADER;Body:PPM4CMDDRAWINDEX2); var Addr:Pointer; @@ -2312,13 +2328,26 @@ begin //drawInitiator:TVGT_DRAW_INITIATOR; + test_reset_index(GPU_REGS.GET_INDEX_TYPE, + GPU_REGS.VGT_MULTI_PRIM.IB_RESET_EN.RESET_EN, + GPU_REGS.VGT_MULTI_PRIM.IB_RESET_INDX); + if UpdateGpuRegsInfo then begin Addr:=getIndexAddress(GPU_REGS.VGT_DMA.BASE_LO,GPU_REGS.VGT_DMA.BASE_HI); GFXRing.CmdBuffer.DrawIndex2(Addr,GPU_REGS.VGT_DMA.INDICES,GPU_REGS.GET_INDEX_TYPE); end; - {$ifdef ww}Writeln('DrawIndex:',Body^.indexCount);{$endif} + {$ifdef ww} + Writeln('DrawIndex:',Body^.indexCount); + Writeln('VGT_VTX_INDX.CNT_EN :',GPU_REGS.VGT_VTX_INDX.CNT_EN.VTX_CNT_EN); + Writeln('VGT_VTX_INDX.INDX_OFFSET :',GPU_REGS.VGT_VTX_INDX.INDX_OFFSET); + + Writeln('VGT_MULTI_PRIM.IB_RESET_EN :',GPU_REGS.VGT_MULTI_PRIM.IB_RESET_EN.RESET_EN); + Writeln('VGT_MULTI_PRIM.IB_RESET_INDX:',HexStr(GPU_REGS.VGT_MULTI_PRIM.IB_RESET_INDX,8)); + {$endif} + + //GFXMicroEngine.PushCmd(GFXRing.CmdBuffer); end; @@ -2332,7 +2361,10 @@ begin GFXRing.CmdBuffer.DrawIndexAuto(GPU_REGS.VGT_DMA.INDICES); end; - {$ifdef ww}Writeln('onDrawIndexAuto:',Body^.indexCount);{$endif} + {$ifdef ww} + Writeln('onDrawIndexAuto:',Body^.indexCount); + Writeln('VGT_VTX_INDX.CNT_EN:',GPU_REGS.VGT_VTX_INDX.CNT_EN.VTX_CNT_EN); + {$endif} //GFXMicroEngine.PushCmd(GFXRing.CmdBuffer); end; @@ -2352,13 +2384,25 @@ begin GPU_REGS.VGT_DMA.SIZE :=Body^.indexCount; GPU_REGS.VGT_DMA.INDICES :=Body^.indexCount; + test_reset_index(GPU_REGS.GET_INDEX_TYPE, + GPU_REGS.VGT_MULTI_PRIM.IB_RESET_EN.RESET_EN, + GPU_REGS.VGT_MULTI_PRIM.IB_RESET_INDX); + if UpdateGpuRegsInfo then begin Addr:=getIndexAddress(GPU_REGS.VGT_DMA.BASE_LO,GPU_REGS.VGT_DMA.BASE_HI); GFXRing.CmdBuffer.DrawIndexOffset2(Addr,Body^.indexOffset,GPU_REGS.VGT_DMA.INDICES,GPU_REGS.GET_INDEX_TYPE); end; - {$ifdef ww}Writeln('DrawIndexOffset2:',Body^.indexOffset,' ',Body^.indexCount);{$endif} + {$ifdef ww} + Writeln('DrawIndexOffset2:',Body^.indexOffset,' ',Body^.indexCount); + + Writeln('VGT_VTX_INDX.CNT_EN :',GPU_REGS.VGT_VTX_INDX.CNT_EN.VTX_CNT_EN); + Writeln('VGT_VTX_INDX.INDX_OFFSET :',GPU_REGS.VGT_VTX_INDX.INDX_OFFSET); + + Writeln('VGT_MULTI_PRIM.IB_RESET_EN :',GPU_REGS.VGT_MULTI_PRIM.IB_RESET_EN.RESET_EN); + Writeln('VGT_MULTI_PRIM.IB_RESET_INDX:',HexStr(GPU_REGS.VGT_MULTI_PRIM.IB_RESET_INDX,8)); + {$endif} end; @@ -2380,6 +2424,7 @@ type procedure onNumInstances(pm4Hdr:PM4_TYPE_3_HEADER;Body:PVGT_DMA_NUM_INSTANCES); begin GPU_REGS.VGT_DMA.NUM_INSTANCES:=Body^; + Assert(GPU_REGS.VGT_DMA.NUM_INSTANCES<=1,'instancing TODO:'+IntToStr(GPU_REGS.VGT_DMA.NUM_INSTANCES)); {$ifdef ww}Writeln('onNumInstances:',Body^);{$endif} end; diff --git a/vulkan/vBuffer.pas b/vulkan/vBuffer.pas index 8816485b..c0199820 100644 --- a/vulkan/vBuffer.pas +++ b/vulkan/vBuffer.pas @@ -23,7 +23,7 @@ type end; function VkBindSparseBufferMemory(queue:TVkQueue;buffer:TVkBuffer;bindCount:TVkUInt32;pBinds:PVkSparseMemoryBind):TVkResult; -function GetRequirements(size:TVkDeviceSize;usage:TVkFlags;ext:Pointer=nil):TVkMemoryRequirements; +function GetRequirements(sparce:boolean;size:TVkDeviceSize;usage:TVkFlags;ext:Pointer=nil):TVkMemoryRequirements; implementation @@ -72,11 +72,14 @@ begin vkDestroyFence(Device.FHandle,fence,nil); end; -function GetRequirements(size:TVkDeviceSize;usage:TVkFlags;ext:Pointer=nil):TVkMemoryRequirements; +function GetRequirements(sparce:boolean;size:TVkDeviceSize;usage:TVkFlags;ext:Pointer=nil):TVkMemoryRequirements; var Buffer:TvBuffer; begin - Buffer:=TvBuffer.Create(size,usage,ext); + Case sparce of + True :Buffer:=TvBuffer.CreateSparce(size,usage,ext); + False:Buffer:=TvBuffer.Create(size,usage,ext); + end; Result:=Buffer.GetRequirements; Buffer.Free; end; diff --git a/vulkan/vHostBufferManager.pas b/vulkan/vHostBufferManager.pas index 894f66a0..baaad9be 100644 --- a/vulkan/vHostBufferManager.pas +++ b/vulkan/vHostBufferManager.pas @@ -89,28 +89,65 @@ begin end; end; -function _fix_buf_size(var Offset,Size:TVkDeviceSize;usage:TVkFlags):TVkDeviceSize; -var - mr:TVkMemoryRequirements; - pAlign:TVkDeviceSize; +function Max(a,b:QWORD):QWORD; inline; begin - mr:=GetRequirements(Size,usage,@buf_ext); - - pAlign:=AlignDw(Offset,mr.alignment); - Result:=(Offset-pAlign); - - Offset:=pAlign; - Size :=Size+Result; - - if (Sizeb) then Result:=a else Result:=b; end; -function _New_simple(host:TvPointer;Size:TVkDeviceSize;usage:TVkFlags):TvHostBuffer; +function Min(a,b:QWORD):QWORD; inline; +begin + if (a=Size) then + begin + Result:=0; + end else + begin + Result:=1; + end; +end; + +function _New_simple(Addr:Pointer;Size:TVkDeviceSize;usage:TVkFlags):TvHostBuffer; +var + host:TvPointer; + t:TvHostBuffer; delta:TVkDeviceSize; begin - delta:=_fix_buf_size(host.FOffset,Size,usage); + Result:=nil; + + delta:=_fix_buf_size(False,Addr,Size,usage); + + host:=Default(TvPointer); + if not TryGetHostPointerByAddr(addr,host) then Exit; t:=TvHostBuffer.Create(Size,usage,@buf_ext); @@ -121,11 +158,6 @@ begin Result:=t; end; -function Min(a,b:QWORD):QWORD; inline; -begin - if (a=Size) then - begin - t:=_New_simple(host,Size,usage); - end else - begin //is Sparse buffers - Assert(vDevice.sparseBinding,'sparseBinding not support'); - Assert(MemManager.SparceSupportHost,'sparse not support for host'); - t:=_New_sparce(cmd.FQueue.FHandle,Addr,Size,usage); + t:=nil; + Case _is_sparce(Addr,Size,usage) of + 0:begin + t:=_New_simple(Addr,Size,usage); + end; + 1:begin //is Sparse buffers + Assert(vDevice.sparseBinding,'sparseBinding not support'); + Assert(MemManager.SparceSupportHost,'sparse not support for host'); + t:=_New_sparce(cmd.FQueue.FHandle,Addr,Size,usage); + end; + else; end; t.FAddr:=addr; diff --git a/vulkan/vRender.pas b/vulkan/vRender.pas index 25c2badb..7b2e04ca 100644 --- a/vulkan/vRender.pas +++ b/vulkan/vRender.pas @@ -73,6 +73,7 @@ type emulate_primtype:Integer; Procedure SetPrimType(t:TVkPrimitiveTopology); + Procedure SetPrimReset(enable:TVkBool32); Procedure AddVPort(const V:TVkViewport;const S:TVkRect2D); Procedure AddBlend(const b:TVkPipelineColorBlendAttachmentState); Procedure Clear; @@ -398,6 +399,11 @@ begin end; end; +Procedure TvGraphicsPipeline.SetPrimReset(enable:TVkBool32); +begin + inputAssembly.primitiveRestartEnable:=enable; +end; + Procedure TvGraphicsPipeline.AddVPort(const V:TVkViewport;const S:TVkRect2D); begin if (s.extent.width=0) or (s.extent.height=0) then Assert(false);