+

chip/pm4_me.pas

@@ -2918,6 +2918,34 @@ begin
 
 end;
 
+var
+ fake_zpass_counter:QWORD=0;
+
+procedure pm4_PipeStatDump(var ctx:t_me_render_context;node:p_pm4_node_PipeStatDump);
+const
+ stride=16; //128_BIT  <-TODO:PIPE_STAT_CONTROL
+ c_db_counts:array[0..1] of Byte=(8,16);
+ c_ready_mask=QWORD(1) shl 63;
+var
+ i,count:Byte;
+ addr_dmem:Pointer;
+begin
+ if not ctx.WaitConfirmOrSwitch then Exit;
+
+ count:=c_db_counts[p_neomode and 1];
+
+ addr_dmem:=get_dmem_ptr(Pointer(node^.address));
+
+ fake_zpass_counter:=fake_zpass_counter+1;
+
+ For i:=0 to count-1 do
+ begin
+  PQWORD(addr_dmem)^:=c_ready_mask or fake_zpass_counter;
+  addr_dmem:=addr_dmem+stride;
+ end;
+
+end;
+
 procedure pm4_EventWriteEos(var ctx:t_me_render_context;node:p_pm4_node_EventWriteEos);
 var
  addr_dmem:Pointer;
@@ -3478,6 +3506,7 @@ begin
       ntFastClear          :pm4_FastClear          (ctx,Pointer(ctx.node));
       ntDispatchDirect     :pm4_DispatchDirect     (ctx,Pointer(ctx.node));
       ntEventWrite         :pm4_EventWrite         (ctx,Pointer(ctx.node));
+      ntPipeStatDump       :pm4_PipeStatDump       (ctx,Pointer(ctx.node));
       ntEventWriteEop      :pm4_EventWriteEop      (ctx,Pointer(ctx.node));
       ntSubmitFlipEop      :pm4_SubmitFlipEop      (ctx,Pointer(ctx.node));
       ntReleaseMem         :pm4_ReleaseMem         (ctx,Pointer(ctx.node));

chip/pm4_pfp.pas

@@ -1077,6 +1077,8 @@ begin
 end;
 
 procedure onEventWrite(pctx:p_pfp_ctx;Body:PTPM4CMDEVENTWRITE);
+const
+ c_p_stride:array[0..3] of PChar=('32_BITS','64_BITS','128_BITS','256_BITS');
 begin
  Assert(pctx^.stream_type=stGfxDcb);
 
@@ -1104,7 +1106,30 @@ begin
                               Writeln(' eventType=0x',HexStr(Body^.eventType,2));
  end;
 
- pctx^.stream[stGfxDcb].EventWrite(Body^.eventType);
+ if p_print_gpu_ops then
+ Case Body^.eventType of
+  PIXEL_PIPE_STAT_CONTROL:
+   begin
+    Writeln('  counter_id=',Body^.u.counter_id);
+    Writeln('  stride    =',c_p_stride[Body^.u.stride]);
+   end;
+  PIXEL_PIPE_STAT_DUMP:
+   begin
+    Writeln('  address=0x',HexStr(Body^.u.address and QWORD($FFFFFFFFF8),10));
+   end;
+ end;
+
+ Case Body^.eventType of
+  PIXEL_PIPE_STAT_DUMP:
+   begin
+    pctx^.stream[stGfxDcb].PipeStatDump(Body^.u.address and QWORD($FFFFFFFFF8));
+   end;
+  else
+   begin
+    pctx^.stream[stGfxDcb].EventWrite(Body^.eventType);
+   end;
+ end;
+
 end;
 
 procedure onEventWriteEop(pctx:p_pfp_ctx;Body:PPM4CMDEVENTWRITEEOP);
@@ -1519,15 +1544,17 @@ procedure onSetPredication(pctx:p_pfp_ctx;Body:PPM4CMDSETPREDICATION);
 const
  c_pred_b:array[0..1] of PChar=('DrawIfNotVisible','DrawIfVisible');
  c_hint_v:array[0..1] of PChar=('Wait','Draw');
+ c_pred_o:array[0..3] of PChar=('CLEAR','ZPASS','PRIMCOUNT','MEM');
 begin
  Assert(pctx^.stream_type=stGfxDcb);
 
- if (Body^.predOp<>0) then
+ if p_print_gpu_ops then
+ if (Body^.predOp<>SET_PRED_CLEAR) or (Body^.startAddress<>0) then
  begin
   Writeln(' startAddress=0x',HexStr(Body^.startAddress,10));
   Writeln(' pred        =',c_pred_b[Body^.predicationBoolean]);
   Writeln(' hint        =',c_hint_v[Body^.hint]);
-  Writeln(' predOp      =',Body^.predOp);
+  Writeln(' predOp      =',c_pred_o[Body^.predOp and 3]);
   Writeln(' continueBit =',Body^.continueBit);
  end;
 end;

chip/pm4_stream.pas

@@ -116,6 +116,7 @@ type
   ntWaitOnCECounter,
   ntWaitOnDECounterDiff,
   ntEventWrite,
+  ntPipeStatDump,
   ntEventWriteEop,
   ntEventWriteEos,
   ntSubmitFlipEop,
@@ -278,6 +279,11 @@ type
   eventType:Byte;
  end;
 
+ p_pm4_node_PipeStatDump=^t_pm4_node_PipeStatDump;
+ t_pm4_node_PipeStatDump=packed object(t_pm4_node)
+  address:QWORD;
+ end;
+
  p_pm4_node_EventWriteEop=^t_pm4_node_EventWriteEop;
  t_pm4_node_EventWriteEop=packed object(t_pm4_node)
   addr     :Pointer;
@@ -413,6 +419,7 @@ type
   procedure WaitOnCECounter();
   procedure WaitOnDECounterDiff(diff:DWORD);
   procedure EventWrite   (eventType:Byte);
+  procedure PipeStatDump (address:QWORD);
   procedure EventWriteEop(addr:Pointer;data:QWORD;eventType,dataSel,intSel:Byte);
   procedure EventWriteEos(addr:Pointer;data:DWORD;eventType,command:Byte);
   procedure SubmitFlipEop(eop_value:QWORD;intSel:Byte);
@@ -1024,6 +1031,19 @@ begin
  add_node(node);
 end;
 
+procedure t_pm4_stream.PipeStatDump(address:QWORD);
+var
+ node:p_pm4_node_PipeStatDump;
+begin
+ node:=allocator.Alloc(SizeOf(t_pm4_node_PipeStatDump));
+
+ node^.ntype  :=ntPipeStatDump;
+ node^.scope  :=Default(t_pm4_resource_curr_scope);
+ node^.address:=address;
+
+ add_node(node);
+end;
+
 procedure t_pm4_stream.EventWriteEop(addr:Pointer;data:QWORD;eventType,dataSel,intSel:Byte);
 var
  node:p_pm4_node_EventWriteEop;

chip/pm4defs.pas

@@ -548,13 +548,13 @@ type
   u:bitpacked record
    case Byte of
     //PIXEL_PIPE_STAT_DUMP
-    0:(address:QWORD);       // 8 byte aligned (40bit)
+    0:(address:QWORD);       // 8 byte aligned (40bit) (0xff fffffff8)
     //PIXEL_PIPE_STAT_CONTROL
-    1:(
+    1:(                      //[0x7 fc 00] or [0x7 ff fc 00]
        reserved2      :bit3;
-       counter_id     :bit6;
-       stride         :bit2;
-       instance_enable:bit16;
+       counter_id     :bit6;  //00 -> PIXEL_PIPE_OCCLUSION_COUNT_0
+       stride         :bit2;  //02 -> PIXEL_PIPE_STRIDE_128_BITS
+       instance_enable:bit16; //[FF] or [FFFF]
        reserved3      :bit5;
       );
   end;