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FPPS4
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This commit is contained in:
Pavel 2022-10-12 17:00:49 +03:00
parent 640e7d1a36
commit 79a9c2eae0
8 changed files with 170 additions and 43 deletions
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1
chip/ps4_gpu_regs.pas
View File

@ -1543,6 +1543,7 @@ begin
IMG_DATA_FORMAT_4_4_4_4 :Result:=VK_FORMAT_R4G4B4A4_UNORM_PACK16;
IMG_DATA_FORMAT_BC1 :Result:=VK_FORMAT_BC1_RGBA_UNORM_BLOCK;
IMG_DATA_FORMAT_BC3 :Result:=VK_FORMAT_BC3_UNORM_BLOCK;
IMG_DATA_FORMAT_BC7 :Result:=VK_FORMAT_BC7_UNORM_BLOCK;
else
Assert(false,_get_tex_dfmt_str(PT^.dfmt));
end;

72
chip/ps4_pssl.pas
View File

@ -1237,6 +1237,7 @@ EXP 64
}
type
PSPI=^TSPI;
TSPI=packed record
OFFSET_DW:DWORD;
CMD:packed record
@ -1799,40 +1800,46 @@ end;
procedure _print_SMRD(Var SPI:TSPI);
var
t:Byte;
t1,t2:Byte;
begin
t:=0;
t1:=0;
t2:=0;
Case SPI.SMRD.OP of
S_LOAD_DWORD:
begin
Write('S_LOAD_DWORD');
t:=1;
t1:=1;
t2:=2;
end;
S_LOAD_DWORDX2:
begin
Write('S_LOAD_DWORDX2');
t:=2;
t1:=2;
t2:=2;
end;
S_LOAD_DWORDX4:
begin
Write('S_LOAD_DWORDX4');
t:=4;
t1:=4;
t2:=2;
end;
S_LOAD_DWORDX8:
begin
Write('S_LOAD_DWORDX8');
t:=8;
t1:=8;
t2:=2;
end;
S_LOAD_DWORDX16:
begin
Write('S_LOAD_DWORDX16');
t:=16;
t1:=16;
t2:=2;
end;
//--
@ -1840,31 +1847,36 @@ begin
S_BUFFER_LOAD_DWORD:
begin
Write('S_BUFFER_LOAD_DWORD');
t:=1;
t1:=1;
t2:=4;
end;
S_BUFFER_LOAD_DWORDX2:
begin
Write('S_BUFFER_LOAD_DWORDX2');
t:=2;
t1:=2;
t2:=4;
end;
S_BUFFER_LOAD_DWORDX4:
begin
Write('S_BUFFER_LOAD_DWORDX4');
t:=4;
t1:=4;
t2:=4;
end;
S_BUFFER_LOAD_DWORDX8:
begin
Write('S_BUFFER_LOAD_DWORDX8');
t:=8;
t1:=8;
t2:=4;
end;
S_BUFFER_LOAD_DWORDX16:
begin
Write('S_BUFFER_LOAD_DWORDX16');
t:=16;
t1:=16;
t2:=4;
end;
S_MEMTIME:
@ -1887,31 +1899,41 @@ begin
end;
Write(' ');
case t of
case t1 of
1:begin
With SPI.SMRD do
Write('s[',SDST,'], s[',SBASE*2,':',SBASE*2+3,'], ');
Write('s[',SDST,'], ');
end;
2:begin
With SPI.SMRD do
Write('s[',SDST,':',SDST+1,'], s[',SBASE*2,':',SBASE*2+3,'], ');
Write('s[',SDST,':',SDST+1,'], ');
end;
4:begin
With SPI.SMRD do
Write('s[',SDST,':',SDST+3,'], s[',SBASE*2,':',SBASE*2+3,'], ');
Write('s[',SDST,':',SDST+3,'], ');
end;
8:begin
With SPI.SMRD do
Write('s[',SDST,':',SDST+7,'], s[',SBASE*2,':',SBASE*2+3,'], ');
Write('s[',SDST,':',SDST+7,'], ');
end;
16:
begin
With SPI.SMRD do
Write('s[',SDST,':',SDST+15,'], s[',SBASE*2,':',SBASE*2+3,'], ');
Write('s[',SDST,':',SDST+15,'], ');
end;
end;
Write(' ');
case t2 of
2:begin
With SPI.SMRD do
Write('s[',SBASE*2,':',SBASE*2+1,'], ');
end;
4:begin
With SPI.SMRD do
Write('s[',SBASE*2,':',SBASE*2+3,'], ');
end;
end;
With SPI.SMRD do
Case IMM of
@ -2219,7 +2241,7 @@ begin
_print_ssrc9(VOP3.SRC1);
if Byte(VOP3.ABS).TestBit(1) then Write(')');
Writeln;
Writeln(' ; VOP3c');
end;
procedure _print_VOP3a(Var VOP3:TVOP3a);
@ -2236,7 +2258,7 @@ begin
256+V_MUL_F32 :Write('V_MUL_F32');
256+V_MUL_I32_I24 :Write('V_MUL_I32_I24');
256+V_MUL_HI_I32_I24 :Write('V_MUL_HI_I32_I24');
256+V_MUL_U32_U24 :Write('V_MUL_U32_U24 ');
256+V_MUL_U32_U24 :Write('V_MUL_U32_U24');
256+V_MUL_HI_U32_U24 :Write('V_MUL_HI_U32_U24');
256+V_MIN_LEGACY_F32 :Write('V_MIN_LEGACY_F32');
256+V_MAX_LEGACY_F32 :Write('V_MAX_LEGACY_F32');
@ -2439,7 +2461,7 @@ begin
if (VOP3.CLAMP<>0) then
Write(' clamp');
Writeln;
Writeln(' ; VOP3a');
end;
procedure _print_VOP3b(Var VOP3:TVOP3b);
@ -2484,7 +2506,7 @@ begin
if Byte(VOP3.NEG).TestBit(2) then Write('-');
_print_ssrc9(VOP3.SRC2);
Writeln;
Writeln(' ; VOP3b');
end;
procedure _print_VOP3(Var SPI:TSPI);
@ -2511,7 +2533,7 @@ begin
V_MUL_F32 :Write('V_MUL_F32');
V_MUL_I32_I24 :Write('V_MUL_I32_I24');
V_MUL_HI_I32_I24 :Write('V_MUL_HI_I32_I24');
V_MUL_U32_U24 :Write('V_MUL_U32_U24 ');
V_MUL_U32_U24 :Write('V_MUL_U32_U24');
V_MUL_HI_U32_U24 :Write('V_MUL_HI_U32_U24');
V_MIN_LEGACY_F32 :Write('V_MIN_LEGACY_F32');
V_MAX_LEGACY_F32 :Write('V_MAX_LEGACY_F32');
@ -2985,7 +3007,7 @@ begin
BUF_DATA_FORMAT_32 :Write('32');
BUF_DATA_FORMAT_16_16 :Write('16_16');
BUF_DATA_FORMAT_10_11_11 :Write('10_11_11');
BUF_DATA_FORMAT_11_11_10 :Write('11_11_10 ');
BUF_DATA_FORMAT_11_11_10 :Write('11_11_10');
BUF_DATA_FORMAT_10_10_10_2 :Write('10_10_10_2');
BUF_DATA_FORMAT_2_10_10_10 :Write('2_10_10_10');
BUF_DATA_FORMAT_8_8_8_8 :Write('8_8_8_8');

2
spirv/emit_exp.pas
View File

@ -36,7 +36,7 @@ Var
src:array[0..3] of PsrRegNode;
//rsl:array[0..3] of PsrRegNode;
rtype:TsrDataType;
f,i,p:Byte;
f,i,p:DWORD;
begin
//if (VM<>0) and (EXEC<>0) = set pixel else (if DONE=1) discard pixel /(PS only)

62
spirv/emit_mubuf.pas
View File

@ -28,6 +28,8 @@ type
function emit_BUFFER_LOAD_VA(src:PPsrRegSlot;count:Byte):Boolean;
procedure emit_BUFFER_LOAD_FORMAT(count:Byte);
procedure emit_BUFFER_STORE_FORMAT(count:Byte);
procedure emit_BUFFER_LOAD_DWORDX(count,dfmt:Byte);
procedure emit_BUFFER_STORE_DWORDX(count,dfmt:Byte);
end;
implementation
@ -204,6 +206,56 @@ begin
end;
procedure TEmit_MUBUF.emit_BUFFER_LOAD_DWORDX(count,dfmt:Byte);
var
src:array[0..3] of PsrRegSlot;
grp:PsrDataLayout;
PV:PVSharpResource4;
begin
Assert(FSPI.MUBUF.LDS=0,'FSPI.MUBUF.LDS');
if not get_srsrc(FSPI.MUBUF.SRSRC,4,@src) then Assert(false);
grp:=GroupingSharp(@src,rtVSharp4);
PV:=grp^.pData;
TEmit_vbuf_load(TObject(Self)).buf_load(
Buf_info(grp,
dst_sel_identity,
dfmt,
PV^.nfmt,
count)
);
end;
procedure TEmit_MUBUF.emit_BUFFER_STORE_DWORDX(count,dfmt:Byte);
var
src:array[0..3] of PsrRegSlot;
grp:PsrDataLayout;
PV:PVSharpResource4;
begin
Assert(FSPI.MUBUF.LDS=0,'FSPI.MUBUF.LDS');
if not get_srsrc(FSPI.MUBUF.SRSRC,4,@src) then Assert(false);
grp:=GroupingSharp(@src,rtVSharp4);
PV:=grp^.pData;
TEmit_vbuf_store(TObject(Self)).buf_store(
Buf_info(grp,
dst_sel_identity,
dfmt,
PV^.nfmt,
count)
);
end;
procedure TEmit_MUBUF.emit_MUBUF;
begin
case FSPI.MUBUF.OP of
@ -217,6 +269,16 @@ begin
BUFFER_STORE_FORMAT_XYZ : emit_BUFFER_STORE_FORMAT(3);
BUFFER_STORE_FORMAT_XYZW: emit_BUFFER_STORE_FORMAT(4);
BUFFER_LOAD_DWORD : emit_BUFFER_LOAD_DWORDX(1,BUF_DATA_FORMAT_32);
BUFFER_LOAD_DWORDX2 : emit_BUFFER_LOAD_DWORDX(2,BUF_DATA_FORMAT_32_32);
BUFFER_LOAD_DWORDX3 : emit_BUFFER_LOAD_DWORDX(3,BUF_DATA_FORMAT_32_32_32);
BUFFER_LOAD_DWORDX4 : emit_BUFFER_LOAD_DWORDX(4,BUF_DATA_FORMAT_32_32_32_32);
BUFFER_STORE_DWORD : emit_BUFFER_STORE_DWORDX(1,BUF_DATA_FORMAT_32);
BUFFER_STORE_DWORDX2 : emit_BUFFER_STORE_DWORDX(2,BUF_DATA_FORMAT_32_32);
BUFFER_STORE_DWORDX3 : emit_BUFFER_STORE_DWORDX(3,BUF_DATA_FORMAT_32_32_32);
BUFFER_STORE_DWORDX4 : emit_BUFFER_STORE_DWORDX(4,BUF_DATA_FORMAT_32_32_32_32);
else
Assert(false,'MUBUF?'+IntToStr(FSPI.MUBUF.OP));
end;

2
spirv/emit_post_op.pas
View File

@ -1806,7 +1806,7 @@ var
src:array[0..1] of PsrRegNode;
rIndex,rCount:PsrRegNode;
data:array[0..1] of QWORD;
index,count:Byte;
index,count:DWORD;
begin
Result:=0;
dst:=node^.pDst^.AsType(ntReg);

4
spirv/emit_sopp.pas
View File

@ -164,7 +164,7 @@ begin
bnew:=true;
if Cursor.pBlock^.IsEndOf(Cursor.Adr) then //is last
begin
Assert(node^.Block.e_adr.get_pc=Cursor.Adr.get_pc);
//Assert(node^.Block.e_adr.get_pc=Cursor.Adr.get_pc);
Case node^.Block.bType of
btSetpc:;
else
@ -276,7 +276,7 @@ begin
pLabel:=FindLabel(b_adr);
Assert(pLabel<>nil);
Assert(not pLabel^.IsType(ltUnknow));
//Assert(not pLabel^.IsType(ltUnknow));
if pLabel^.IsType(ltBegAdr) then //adr
begin

41
spirv/emit_vop1.pas
View File

@ -17,6 +17,8 @@ type
procedure emit_VOP1;
procedure emit_V_MOV_B32;
procedure emit_V_CVT(OpId:DWORD;dst_type,src_type:TsrDataType);
procedure emit_V_CVT_F16_F32;
procedure emit_V_CVT_F32_F16;
procedure emit_V_CVT_OFF_F32_I4;
procedure emit_V_CVT_F32_UBYTE0;
procedure emit_V_EXT_F32(OpId:DWORD);
@ -47,6 +49,41 @@ begin
Op1(OpId,dst_type,dst,src);
end;
procedure TEmit_VOP1.emit_V_CVT_F16_F32; //vdst[15:0].hf = ConvertFloatToHalfFloat(vsrc.f)
Var
dst:PsrRegSlot;
src:array[0..1] of PsrRegNode;
dstv:PsrRegNode;
begin
dst:=get_vdst8(FSPI.VOP1.VDST);
src[0]:=fetch_ssrc9(FSPI.VOP1.SRC0,dtFloat32);
src[0]:=OpFToF(src[0],dtHalf16);
src[1]:=NewReg_s(dtHalf16,0);
dstv:=OpMakeVec(line,dtVec2h,@src);
dst^.New(line,dtVec2h)^.pWriter:=dstv;
end;
procedure TEmit_VOP1.emit_V_CVT_F32_F16; //vdst.f = ConvertHalfFloatToFloat(vsrc[15:0].hf)
Var
dst:PsrRegSlot;
src:PsrRegNode;
dst0:PsrRegNode;
begin
dst:=get_vdst8(FSPI.VOP1.VDST);
src:=fetch_ssrc9(FSPI.VOP1.SRC0,dtVec2h{dtUnknow});
//src:=OpBitwiseAndTo(src,$FFFF);
//src^.PrepType(ord(dtHalf16));
dst0:=NewReg(dtHalf16);
OpExtract(line,dst0,src,0);
Op1(Op.OpFConvert,dtFloat32,dst,{src}dst0);
end;
//V_CVT_OFF_F32_I4
//([0..3]-8)/16
procedure TEmit_VOP1.emit_V_CVT_OFF_F32_I4;
@ -148,6 +185,9 @@ begin
V_CVT_U32_F32: emit_V_CVT(Op.OpConvertFToU,dtUInt32 ,dtFloat32);
V_CVT_I32_F32: emit_V_CVT(Op.OpConvertFToS,dtInt32 ,dtFloat32);
V_CVT_F16_F32: emit_V_CVT_F16_F32;
V_CVT_F32_F16: emit_V_CVT_F32_F16;
V_CVT_OFF_F32_I4: emit_V_CVT_OFF_F32_I4;
V_CVT_F32_UBYTE0: emit_V_CVT_F32_UBYTE0;
@ -156,6 +196,7 @@ begin
V_TRUNC_F32: emit_V_EXT_F32(GlslOp.Trunc);
V_CEIL_F32 : emit_V_EXT_F32(GlslOp.Ceil);
V_RNDNE_F32: emit_V_EXT_F32(GlslOp.RoundEven);
V_FLOOR_F32: emit_V_EXT_F32(GlslOp.Floor);
V_EXP_F32 : emit_V_EXT_F32(GlslOp.Exp2);
V_LOG_F32 : emit_V_EXT_F32(GlslOp.Log2);

29
spirv/emit_vop3.pas
View File

@ -49,8 +49,8 @@ type
procedure emit_V_FMA_F32;
procedure emit_V_CUBE(OpId:DWORD);
procedure emit_V_MOV_B32;
procedure emit_V2_EXT_F32(OpId:DWORD);
procedure emit_V2_SIN_COS(OpId:DWORD);
procedure emit_V_EXT_F32(OpId:DWORD);
procedure emit_V_SIN_COS(OpId:DWORD);
procedure emit_V_RCP_F32;
end;
@ -644,7 +644,7 @@ begin
end;
procedure TEmit_VOP3.emit_V2_EXT_F32(OpId:DWORD);
procedure TEmit_VOP3.emit_V_EXT_F32(OpId:DWORD);
Var
dst:PsrRegSlot;
src:PsrRegNode;
@ -662,7 +662,7 @@ begin
emit_dst_clamp_f(dst);
end;
procedure TEmit_VOP3.emit_V2_SIN_COS(OpId:DWORD);
procedure TEmit_VOP3.emit_V_SIN_COS(OpId:DWORD);
const
PI2:Single=2*PI;
Var
@ -905,20 +905,21 @@ begin
384+V_MOV_B32 : emit_V_MOV_B32;
384+V_FRACT_F32: emit_V2_EXT_F32(GlslOp.Fract);
384+V_TRUNC_F32: emit_V2_EXT_F32(GlslOp.Trunc);
384+V_CEIL_F32 : emit_V2_EXT_F32(GlslOp.Ceil);
384+V_FRACT_F32: emit_V_EXT_F32(GlslOp.Fract);
384+V_TRUNC_F32: emit_V_EXT_F32(GlslOp.Trunc);
384+V_CEIL_F32 : emit_V_EXT_F32(GlslOp.Ceil);
384+V_FLOOR_F32: emit_V2_EXT_F32(GlslOp.Floor);
384+V_EXP_F32 : emit_V2_EXT_F32(GlslOp.Exp2);
384+V_LOG_F32 : emit_V2_EXT_F32(GlslOp.Log2);
384+V_RNDNE_F32: emit_V_EXT_F32(GlslOp.RoundEven);
384+V_FLOOR_F32: emit_V_EXT_F32(GlslOp.Floor);
384+V_EXP_F32 : emit_V_EXT_F32(GlslOp.Exp2);
384+V_LOG_F32 : emit_V_EXT_F32(GlslOp.Log2);
384+V_RSQ_F32 : emit_V2_EXT_F32(GlslOp.InverseSqrt);
384+V_RSQ_F32 : emit_V_EXT_F32(GlslOp.InverseSqrt);
384+V_SQRT_F32 : emit_V2_EXT_F32(GlslOp.Sqrt);
384+V_SQRT_F32 : emit_V_EXT_F32(GlslOp.Sqrt);
384+V_SIN_F32 : emit_V2_SIN_COS(GlslOp.Sin);
384+V_COS_F32 : emit_V2_SIN_COS(GlslOp.Cos);
384+V_SIN_F32 : emit_V_SIN_COS(GlslOp.Sin);
384+V_COS_F32 : emit_V_SIN_COS(GlslOp.Cos);
384+V_RCP_F32 : emit_V_RCP_F32;