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FPPS4
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This commit is contained in:
Pavel 2024-04-03 17:00:17 +03:00
parent f1fca4c6f7
commit 6f64fa969a
4 changed files with 60 additions and 23 deletions
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73
rtl/x86_jit.pas
View File

@ -2036,37 +2036,64 @@ begin
end; end;
procedure t_modrm_info.emit_gop(var ji:t_jit_instruction;rexW:Boolean;op:DWORD); procedure t_modrm_info.emit_gop(var ji:t_jit_instruction;rexW:Boolean;op:DWORD);
var
b_op:array[0..3] of Byte;
begin begin
DWORD(b_op):=op;
//
case op of case op of
$00..$FF: $00..$FF:
begin begin
emit_rex(ji,rexW); emit_rex(ji,rexW);
ji.EmitByte(Byte(op)); ji.EmitByte(b_op[0]);
end; end;
$100..$FFFF: $100..$FFFF:
begin begin
emit_rex(ji,rexW); emit_rex(ji,rexW);
ji.EmitByte(Hi(Lo(op))); ji.EmitByte(b_op[1]);
ji.EmitByte(Lo(Lo(op))); ji.EmitByte(b_op[0]);
end; end;
else $10000..$FFFFFF:
begin begin
case Lo(Hi(op)) of case b_op[2] of
$66, $66,
$F2, $F2,
$F3: $F3:
begin begin
ji.EmitByte(Lo(Hi(op))); ji.EmitByte(b_op[2]);
emit_rex(ji,rexW); emit_rex(ji,rexW);
ji.EmitByte(Hi(Lo(op))); ji.EmitByte(b_op[1]);
ji.EmitByte(Lo(Lo(op))); ji.EmitByte(b_op[0]);
end; end;
else else
begin begin
emit_rex(ji,rexW); emit_rex(ji,rexW);
ji.EmitByte(Lo(Hi(op))); ji.EmitByte(b_op[2]);
ji.EmitByte(Hi(Lo(op))); ji.EmitByte(b_op[1]);
ji.EmitByte(Lo(Lo(op))); ji.EmitByte(b_op[0]);
end;
end;
end;
else
begin
case b_op[3] of
$66,
$F2,
$F3:
begin
ji.EmitByte(b_op[3]);
emit_rex(ji,rexW);
ji.EmitByte(b_op[2]);
ji.EmitByte(b_op[1]);
ji.EmitByte(b_op[0]);
end;
else
begin
emit_rex(ji,rexW);
ji.EmitByte(b_op[3]);
ji.EmitByte(b_op[2]);
ji.EmitByte(b_op[1]);
ji.EmitByte(b_op[0]);
end; end;
end; end;
end; end;
@ -2131,7 +2158,7 @@ var
begin begin
Assert(not (not_impl in desc.opt)); Assert(not (not_impl in desc.opt));
Assert(is_reg_size(reg,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg,[os8,os16,os32,os64,os128]));
Assert(is_reg_type(reg,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(reg.AScale<=1); Assert(reg.AScale<=1);
mreg:=Sums(mem); mreg:=Sums(mem);
@ -2212,7 +2239,7 @@ var
begin begin
Assert(not (not_impl in desc.opt)); Assert(not (not_impl in desc.opt));
Assert(is_reg_size(reg,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg,[os8,os16,os32,os64,os128]));
Assert(is_reg_type(reg,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(reg.AScale<=1); Assert(reg.AScale<=1);
mreg:=Sums(mem); mreg:=Sums(mem);
@ -2301,7 +2328,7 @@ var
begin begin
Assert(not (not_impl in desc.opt)); Assert(not (not_impl in desc.opt));
Assert(is_reg_size(reg,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg,[os8,os16,os32,os64,os128]));
Assert(is_reg_type(reg,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(reg.AScale<=1); Assert(reg.AScale<=1);
mreg:=Sums(mem); mreg:=Sums(mem);
@ -2385,8 +2412,8 @@ begin
Assert(is_reg_size(reg0,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg0,[os8,os16,os32,os64,os128]));
Assert(is_reg_size(reg1,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg1,[os8,os16,os32,os64,os128]));
Assert(is_reg_type(reg0,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg0,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(is_reg_type(reg1,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg1,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(reg0.AScale<=1); Assert(reg0.AScale<=1);
Assert(reg1.AScale<=1); Assert(reg1.AScale<=1);
@ -2455,8 +2482,8 @@ begin
Assert(is_reg_size(reg0,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg0,[os8,os16,os32,os64,os128]));
Assert(is_reg_size(reg1,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg1,[os8,os16,os32,os64,os128]));
Assert(is_reg_type(reg0,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg0,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(is_reg_type(reg1,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg1,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(reg0.AScale<=1); Assert(reg0.AScale<=1);
Assert(reg1.AScale<=1); Assert(reg1.AScale<=1);
@ -2531,8 +2558,8 @@ begin
Assert(is_reg_size(reg0,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg0,[os8,os16,os32,os64,os128]));
Assert(is_reg_size(reg1,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg1,[os8,os16,os32,os64,os128]));
Assert(is_reg_type(reg0,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg0,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(is_reg_type(reg1,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg1,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(reg0.AScale<=1); Assert(reg0.AScale<=1);
Assert(reg1.AScale<=1); Assert(reg1.AScale<=1);
@ -2598,7 +2625,7 @@ var
begin begin
Assert(not (not_impl in desc.opt)); Assert(not (not_impl in desc.opt));
Assert(is_reg_size(reg,[os8,os16,os32,os64,os128])); Assert(is_reg_size(reg,[os8,os16,os32,os64,os128]));
Assert(is_reg_type(reg,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(reg.AScale<=1); Assert(reg.AScale<=1);
ji:=default_jit_instruction; ji:=default_jit_instruction;
@ -2889,7 +2916,7 @@ var
begin begin
Assert(not (not_impl in desc.opt)); Assert(not (not_impl in desc.opt));
Assert(is_reg_size(reg,[os8,os16,os32,os64])); Assert(is_reg_size(reg,[os8,os16,os32,os64]));
Assert(is_reg_type(reg,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(reg.AScale<=1); Assert(reg.AScale<=1);
ji:=default_jit_instruction; ji:=default_jit_instruction;
@ -3036,7 +3063,7 @@ var
begin begin
Assert(not (not_impl in desc.opt)); Assert(not (not_impl in desc.opt));
Assert(is_reg_size(reg,[os8,os16,os32,os64])); Assert(is_reg_size(reg,[os8,os16,os32,os64]));
Assert(is_reg_type(reg,[regGeneral,regGeneralH,regXmm])); Assert(is_reg_type(reg,[regGeneral,regGeneralH,regMm,regXmm]));
Assert(reg.AScale<=1); Assert(reg.AScale<=1);
ji:=default_jit_instruction; ji:=default_jit_instruction;

2
sys/jit/kern_jit_ctx.pas
View File

@ -1946,6 +1946,7 @@ begin
pop(fix_size8(reg)); pop(fix_size8(reg));
end; end;
reg:=ovr.original;
end; end;
end; end;
@ -2011,6 +2012,7 @@ begin
pop(fix_size8(reg)); pop(fix_size8(reg));
end; end;
reg:=ovr.original;
end; end;
end; end;

4
sys/jit/kern_jit_ops_avx.pas
View File

@ -1180,6 +1180,10 @@ begin
jit_cbs[OPPv,OPpalignr,OPSnone]:=@op_avx3_gen; jit_cbs[OPPv,OPpalignr,OPSnone]:=@op_avx3_gen;
jit_cbs[OPPv,OPpsign,OPSx_b]:=@op_avx3_gen;
jit_cbs[OPPv,OPpsign,OPSx_w]:=@op_avx3_gen;
jit_cbs[OPPv,OPpsign,OPSx_d]:=@op_avx3_gen;
jit_cbs[OPPv,OPldmxcsr,OPSnone]:=@op_vldmxcsr; jit_cbs[OPPv,OPldmxcsr,OPSnone]:=@op_vldmxcsr;
jit_cbs[OPPv,OPstmxcsr,OPSnone]:=@op_vstmxcsr; jit_cbs[OPPv,OPstmxcsr,OPSnone]:=@op_vstmxcsr;

4
sys/jit/kern_jit_ops_sse.pas
View File

@ -622,6 +622,10 @@ begin
jit_cbs[OPPnone,OPpalignr,OPSnone]:=@op_reg_mem_rw; jit_cbs[OPPnone,OPpalignr,OPSnone]:=@op_reg_mem_rw;
jit_cbs[OPPnone,OPpsign,OPSx_b]:=@op_reg_mem_rw;
jit_cbs[OPPnone,OPpsign,OPSx_w]:=@op_reg_mem_rw;
jit_cbs[OPPnone,OPpsign,OPSx_d]:=@op_reg_mem_rw;
jit_cbs[OPPnone,OPldmxcsr,OPSnone]:=@op_ldmxcsr; jit_cbs[OPPnone,OPldmxcsr,OPSnone]:=@op_ldmxcsr;
jit_cbs[OPPnone,OPstmxcsr,OPSnone]:=@op_stmxcsr; jit_cbs[OPPnone,OPstmxcsr,OPSnone]:=@op_stmxcsr;