diff --git a/spirv/emit_mimg.pas b/spirv/emit_mimg.pas
index d067af2c..a2e26ca9 100644
--- a/spirv/emit_mimg.pas
+++ b/spirv/emit_mimg.pas
@@ -712,9 +712,6 @@ var
  Tgrp:PsrNode;
 
 begin
-
- Assert(FSPI.MIMG.UNRM=0,'FSPI.MIMG.UNRM');
-
  pLayout:=nil;
 
  Case FSPI.MIMG.R128 of
@@ -735,6 +732,8 @@ begin
  Case FSPI.MIMG.OP of
   IMAGE_SAMPLE..IMAGE_SAMPLE_C_LZ_O:  //sampled
     begin
+     Assert(FSPI.MIMG.UNRM=0,'FSPI.MIMG.UNRM');
+
      info.tinfo.Sampled:=1;
      Tgrp:=FetchImage(pLayout,info.dtype,info.tinfo);
 
diff --git a/spirv/emit_sop1.pas b/spirv/emit_sop1.pas
index 38c335f2..b1ccb353 100644
--- a/spirv/emit_sop1.pas
+++ b/spirv/emit_sop1.pas
@@ -22,8 +22,9 @@ type
   Function  GetFuncPtr(src:PPsrRegNode):Pointer;
   procedure emit_S_MOV_B32;
   procedure emit_S_MOV_B64;
-  procedure emit_S_SWAPPC_B64;
+  procedure emit_S_GETPC_B64;
   procedure emit_S_SETPC_B64;
+  procedure emit_S_SWAPPC_B64;
   procedure emit_S_AND_SAVEEXEC_B64;
   procedure emit_S_WQM_B64;
  end;
@@ -88,6 +89,33 @@ begin
  MakeCopy(dst[1],src[1]);
 end;
 
+procedure TEmit_SOP1.emit_S_GETPC_B64;
+Var
+ dst:array[0..1] of PsrRegSlot;
+
+ oldptr:Pointer;
+begin
+ if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(false);
+
+ oldptr:=GetPtr;
+
+ SetConst_q(dst[0],dtUint32,QWORD(oldptr));
+ SetConst_q(dst[1],dtUint32,QWORD(oldptr) shr 32);
+end;
+
+procedure TEmit_SOP1.emit_S_SETPC_B64;
+Var
+ src:array[0..1] of PsrRegNode;
+
+ newptr:Pointer;
+begin
+ if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
+
+ newptr:=GetFuncPtr(@src);
+
+ SetPtr(newptr,btMain);
+end;
+
 procedure TEmit_SOP1.emit_S_SWAPPC_B64;
 Var
  dst:array[0..1] of PsrRegSlot;
@@ -109,19 +137,6 @@ begin
  SetPtr(newptr,btSetpc);
 end;
 
-procedure TEmit_SOP1.emit_S_SETPC_B64;
-Var
- src:array[0..1] of PsrRegNode;
-
- newptr:Pointer;
-begin
- if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
-
- newptr:=GetFuncPtr(@src);
-
- SetPtr(newptr,btMain);
-end;
-
 procedure TEmit_SOP1.emit_S_AND_SAVEEXEC_B64; //sdst.du = EXEC;| EXEC = (ssrc.du & EXEC);| SCC = (sdst != 0)
 Var
  dst:array[0..1] of PsrRegSlot;
@@ -175,10 +190,10 @@ begin
   S_MOV_B32         : emit_S_MOV_B32;
   S_MOV_B64         : emit_S_MOV_B64;
   S_WQM_B64         : emit_S_WQM_B64;
-  S_SWAPPC_B64      : emit_S_SWAPPC_B64;
+  S_GETPC_B64       : emit_S_GETPC_B64;
   S_SETPC_B64       : emit_S_SETPC_B64;
+  S_SWAPPC_B64      : emit_S_SWAPPC_B64;
   S_AND_SAVEEXEC_B64: emit_S_AND_SAVEEXEC_B64;
-
   else
    Assert(false,'SOP1?'+IntToStr(FSPI.SOP1.OP));
  end;
diff --git a/spirv/emit_sop2.pas b/spirv/emit_sop2.pas
index 1e71ff1c..78c2632b 100644
--- a/spirv/emit_sop2.pas
+++ b/spirv/emit_sop2.pas
@@ -16,7 +16,9 @@ uses
 type
  TEmit_SOP2=class(TEmitFetch)
   procedure emit_SOP2;
+  procedure emit_S_ADD_U32;
   procedure emit_S_ADD_I32;
+  procedure emit_S_ADDC_U32;
   procedure emit_S_MUL_I32;
   procedure OpISccNotZero(src:PsrRegNode);
   procedure emit_S_LSHL_B32;
@@ -34,6 +36,20 @@ type
 
 implementation
 
+procedure TEmit_SOP2.emit_S_ADD_U32;
+Var
+ dst,car:PsrRegSlot;
+ src:array[0..1] of PsrRegNode;
+begin
+ dst:=get_sdst7(FSPI.SOP2.SDST);
+ car:=get_scc;
+
+ src[0]:=fetch_ssrc9(FSPI.SOP2.SSRC0,dtUInt32);
+ src[1]:=fetch_ssrc9(FSPI.SOP2.SSRC1,dtUInt32);
+
+ OpIAddExt(dst,car,src[0],src[1]);
+end;
+
 procedure TEmit_SOP2.emit_S_ADD_I32;
 Var
  dst,car:PsrRegSlot;
@@ -48,6 +64,30 @@ begin
  OpIAddExt(dst,car,src[0],src[1]);
 end;
 
+procedure TEmit_SOP2.emit_S_ADDC_U32;
+Var
+ dst,car:PsrRegSlot;
+ src:array[0..2] of PsrRegNode;
+begin
+ dst:=get_sdst7(FSPI.SOP2.SDST);
+ car:=get_scc;
+
+ src[0]:=fetch_ssrc9(FSPI.SOP2.SSRC0,dtUInt32);
+ src[1]:=fetch_ssrc9(FSPI.SOP2.SSRC1,dtUInt32);
+ src[2]:=MakeRead(car,dtUInt32);
+
+ OpIAddExt(dst,car,src[0],src[1]); //src0+src1
+
+ src[0]:=MakeRead(dst,dtUInt32);
+ src[1]:=MakeRead(car,dtUInt32);
+
+ OpIAddExt(dst,car,src[0],src[2]); //(src0+src1)+SCC
+
+ src[0]:=MakeRead(car,dtUInt32);
+
+ OpBitwiseOr(car,src[1],src[0]);  //SCC1 or SCC2
+end;
+
 procedure TEmit_SOP2.emit_S_MUL_I32;
 Var
  dst:PsrRegSlot;
@@ -280,7 +320,11 @@ begin
 
  Case FSPI.SOP2.OP of
 
+  S_ADD_U32: emit_S_ADD_U32;
   S_ADD_I32: emit_S_ADD_I32;
+
+  S_ADDC_U32: emit_S_ADDC_U32;
+
   S_MUL_I32: emit_S_MUL_I32;
 
   S_LSHL_B32: emit_S_LSHL_B32;
diff --git a/src/audio/ps4_libsceaudioout.pas b/src/audio/ps4_libsceaudioout.pas
index 9a95804a..af8abf07 100644
--- a/src/audio/ps4_libsceaudioout.pas
+++ b/src/audio/ps4_libsceaudioout.pas
@@ -447,7 +447,7 @@ begin
  if (flag and SCE_AUDIO_VOLUME_FLAG_RE_CH <>0) then H.volume[7]:=i;
 
  H.Release;
- Writeln('sceAudioOutSetVolume:',handle,':',flag);
+ //Writeln('sceAudioOutSetVolume:',handle,':',flag);
  Result:=0;
 end;