mirror of https://github.com/red-prig/fpPS4.git
This commit is contained in:
Pavel
parent
221230efc3
commit
3b7fe1d186
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@ -589,6 +589,9 @@ type
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function GetCanReverseDisassemble: boolean;
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function ReadCodeAt(AnAddress: TDBGPtr; var ALen: Cardinal): Boolean; inline;
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public
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Disassembler: TX86Disassembler;
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Instr: TInstruction;
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constructor Create(AProcess: TDbgProcess);
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procedure Disassemble(var AAddress: Pointer; out ACodeBytes: RawByteString; out ACode: RawByteString; out AnInfo: TDbgInstInfo);
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@ -5061,8 +5064,6 @@ const
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OSTEXT: array[TOperandSize] of RawByteString = ('os8', 'os16', 'os32', 'os64', 'os48', 'os80', 'os128');
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{$endif}
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var
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Disassembler: TX86Disassembler;
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Instr: TInstruction;
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S, Soper: RawByteString;
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n, i: Integer;
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TargetAddrOffs: Int64;
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526
rtl/x86_jit.pas
526
rtl/x86_jit.pas
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@ -151,6 +151,23 @@ type
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FS :t_jit_reg=(ARegValue:((AType:regNone),(AType:regNone));ASegment:4);
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GS :t_jit_reg=(ARegValue:((AType:regNone),(AType:regNone));ASegment:5);
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mm0 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 0),(AType:regNone)));
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mm1 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 1),(AType:regNone)));
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mm2 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 2),(AType:regNone)));
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mm3 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 3),(AType:regNone)));
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mm4 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 4),(AType:regNone)));
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mm5 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 5),(AType:regNone)));
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mm6 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 6),(AType:regNone)));
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mm7 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 7),(AType:regNone)));
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mm8 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 8),(AType:regNone)));
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mm9 :t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 9),(AType:regNone)));
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mm10:t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 10),(AType:regNone)));
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mm11:t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 11),(AType:regNone)));
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mm12:t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 12),(AType:regNone)));
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mm13:t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 13),(AType:regNone)));
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mm14:t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 14),(AType:regNone)));
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mm15:t_jit_reg=(ARegValue:((AType:regMm;ASize:os64;AIndex: 15),(AType:regNone)));
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xmm0 :t_jit_reg=(ARegValue:((AType:regXmm;ASize:os128;AIndex: 0),(AType:regNone)));
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xmm1 :t_jit_reg=(ARegValue:((AType:regXmm;ASize:os128;AIndex: 1),(AType:regNone)));
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xmm2 :t_jit_reg=(ARegValue:((AType:regXmm;ASize:os128;AIndex: 2),(AType:regNone)));
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@ -200,6 +217,8 @@ type
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//
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function call(_label_id:Integer):t_jit_i_link;
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function jmp (_label_id:Integer):t_jit_i_link;
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function jmp8(_label_id:Integer):t_jit_i_link;
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function jcc (op:TOpCodeSuffix;_label_id:Integer):t_jit_i_link;
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function movj(reg:t_jit_reg;mem:t_jit_regs;_label_id:Integer):t_jit_i_link;
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function leaj(reg:t_jit_reg;mem:t_jit_regs;_label_id:Integer):t_jit_i_link;
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//
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@ -214,6 +233,7 @@ type
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//
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procedure _mov (op,op8:Byte;reg:t_jit_reg;mem:t_jit_regs);
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procedure _mov (op,op8:Byte;reg0:t_jit_reg;reg1:t_jit_reg);
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procedure _mov (op,op8,index:Byte;reg:t_jit_reg);
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procedure _movi (op,op8,index:Byte;reg:t_jit_reg;imm:Int64);
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procedure _movi (op,op8,index:Byte;size:TOperandSize;mem:t_jit_regs;imm:Int64);
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procedure _movi8 (op,index:Byte;reg:t_jit_reg;imm:Byte);
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@ -224,6 +244,7 @@ type
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procedure movq (reg0:t_jit_reg ;reg1:t_jit_reg);
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procedure movi (size:TOperandSize;mem:t_jit_regs;imm:Int64);
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procedure movi (reg:t_jit_reg ;imm:Int64);
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procedure movi64 (reg:t_jit_reg ;imm:Int64);
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procedure movq (reg:t_jit_reg ;mem:t_jit_regs);
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procedure movq (mem:t_jit_regs ;reg:t_jit_reg);
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procedure leaq (reg:t_jit_reg ;mem:t_jit_regs);
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@ -232,11 +253,13 @@ type
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procedure addq (reg0:t_jit_reg ;reg1:t_jit_reg);
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procedure addi (reg:t_jit_reg ;imm:Int64);
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procedure addi8 (reg:t_jit_reg ;imm:Byte);
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procedure addi8 (size:TOperandSize;mem:t_jit_regs;imm:Byte);
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procedure subq (mem:t_jit_regs ;reg:t_jit_reg);
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procedure subq (reg:t_jit_reg ;mem:t_jit_regs);
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procedure subq (reg0:t_jit_reg ;reg1:t_jit_reg);
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procedure subi (reg:t_jit_reg ;imm:Int64);
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procedure subi8 (reg:t_jit_reg ;imm:Byte);
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procedure subi8 (size:TOperandSize;mem:t_jit_regs;imm:Byte);
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procedure xorq (reg0:t_jit_reg ;reg1:t_jit_reg);
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procedure cmpq (mem:t_jit_regs ;reg:t_jit_reg);
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procedure cmpq (reg:t_jit_reg ;mem:t_jit_regs);
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@ -254,7 +277,10 @@ type
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procedure pop16 (mem:t_jit_regs);
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procedure pop64 (mem:t_jit_regs);
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procedure pop (reg:t_jit_reg);
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procedure _vmov (Op,SimdOpcode:Byte;reg:t_jit_reg;mem:t_jit_regs);
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procedure pushfq;
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procedure popfq;
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procedure _pmov (Op0,Op1:Byte;reg:t_jit_reg;mem:t_jit_regs);
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procedure _vmov (Op0,Op1:Byte;reg:t_jit_reg;mem:t_jit_regs);
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procedure vmovdqu (reg:t_jit_reg ;mem:t_jit_regs);
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procedure vmovdqu (mem:t_jit_regs;reg:t_jit_reg);
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procedure vmovdqa (reg:t_jit_reg ;mem:t_jit_regs);
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@ -272,6 +298,10 @@ operator + (A:t_jit_reg;B:Integer):t_jit_reg;
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operator + (A:t_jit_reg;B:Int64):t_jit_reg;
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operator * (A:t_jit_reg;B:Integer):t_jit_reg;
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function classif_offset_32(AOffset:Integer):Byte;
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function classif_offset_64(AOffset:Int64):Byte;
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function classif_offset_se64(AOffset:Int64):Byte;
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implementation
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function is_valid_reg_type(reg:TRegValue):Boolean; inline;
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@ -306,9 +336,9 @@ begin
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end;
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end;
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function classif_offset_32(reg:t_jit_reg):Byte; inline;
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function classif_offset_32(AOffset:Integer):Byte;
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begin
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case reg.AOffset of
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case AOffset of
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0:Result:=0;
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-128..-1,1..127:Result:=1;
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else
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@ -316,9 +346,9 @@ begin
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end;
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end;
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function classif_offset_64(reg:t_jit_reg):Byte; inline;
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function classif_offset_64(AOffset:Int64):Byte;
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begin
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case reg.AOffset of
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case AOffset of
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0:Result:=0;
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-128 .. -1, 1..127 :Result:=1;
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-2147483648..-129,128..2147483647:Result:=2;
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@ -327,6 +357,27 @@ begin
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end;
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end;
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function classif_offset_se64(AOffset:Int64):Byte;
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begin
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case AOffset of
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0:Result:=0;
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1..127:Result:=1;
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128..2147483647:Result:=2;
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else
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Result:=3;
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end;
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end;
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function classif_offset_32(reg:t_jit_reg):Byte; inline;
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begin
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Result:=classif_offset_32(reg.AOffset);
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end;
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function classif_offset_64(reg:t_jit_reg):Byte; inline;
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begin
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Result:=classif_offset_64(reg.AOffset);
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end;
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function is_not_reg(reg:t_jit_reg):Boolean; inline;
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begin
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Result:=(not is_valid_reg_type(reg.ARegValue[0])) and
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@ -689,6 +740,60 @@ begin
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Result.inst_id:=High(AInstructions);
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end;
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function t_jit_builder.jmp8(_label_id:Integer):t_jit_i_link;
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var
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ji:t_jit_instruction;
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begin
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ji:=default_jit_instruction;
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ji.EmitByte($EB);
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ji.ALink.AType:=lnkLabel;
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ji.ALink.ADataOffset:=ji.ASize;
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ji.ALink.ALinkId:=_label_id;
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ji.EmitByte(0);
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_add(ji);
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Result.builder:=@self;
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Result.inst_id:=High(AInstructions);
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end;
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const
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COND_32:array[OPSc_o..OPSc_nle] of Byte=(
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$80,$81,$82,$83,$84,$85,$86,$87,
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$88,$89,$8A,$8B,$8C,$8D,$8E,$8F
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);
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function t_jit_builder.jcc(op:TOpCodeSuffix;_label_id:Integer):t_jit_i_link;
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var
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ji:t_jit_instruction;
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begin
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ji:=default_jit_instruction;
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case op of
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OPSc_o..OPSc_nle:;
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else
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Assert(false);
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end;
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ji.EmitByte($0F);
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ji.EmitByte(COND_32[op]);
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ji.ALink.AType:=lnkLabel;
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ji.ALink.ADataOffset:=ji.ASize;
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ji.ALink.ALinkId:=_label_id;
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ji.EmitInt32(0);
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_add(ji);
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Result.builder:=@self;
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Result.inst_id:=High(AInstructions);
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end;
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function t_jit_builder.movj(reg:t_jit_reg;mem:t_jit_regs;_label_id:Integer):t_jit_i_link;
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var
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i:Integer;
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@ -818,7 +923,9 @@ end;
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type
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t_modrm_info=object
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rexF,rexB,rexX,rexR:Boolean;
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RH,rexF:Boolean;
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rexB,rexX,rexR:Boolean;
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ModRM:record
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Mode,Index,RM:Byte;
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@ -830,12 +937,15 @@ type
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AOffset:Int64;
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procedure build(Index:Byte;mreg:t_jit_reg);
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procedure build(reg,mreg:t_jit_reg);
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procedure emit(var ji:t_jit_instruction);
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procedure build_im(Index:Byte;mreg:t_jit_reg);
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procedure build_rm(reg,mreg:t_jit_reg);
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procedure build_rr(reg0,reg1:t_jit_reg);
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procedure build_ir(Index:Byte;reg:t_jit_reg);
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procedure emit_rex(var ji:t_jit_instruction;rexW:Boolean);
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procedure emit_mrm(var ji:t_jit_instruction);
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end;
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procedure t_modrm_info.build(Index:Byte;mreg:t_jit_reg);
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procedure t_modrm_info.build_im(Index:Byte;mreg:t_jit_reg);
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var
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ubase:Boolean;
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begin
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@ -882,6 +992,10 @@ begin
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SIB.Index:=mreg.ARegValue[0].AIndex;
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if (SIB.Index>=8) then
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begin
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if RH then
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begin
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Assert(false,'imposible');
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end;
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rexX:=true;
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Dec(SIB.Index,8);
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end;
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@ -891,6 +1005,10 @@ begin
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SIB.Base:=mreg.ARegValue[1].AIndex;
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if (SIB.Base>=8) then
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begin
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if RH then
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begin
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Assert(false,'imposible');
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end;
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rexB:=true;
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Dec(SIB.Base,8);
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end;
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@ -936,6 +1054,10 @@ begin
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ModRM.RM:=mreg.ARegValue[0].AIndex;
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if (ModRM.RM>=8) then
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begin
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if RH then
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begin
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Assert(false,'imposible');
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end;
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rexB:=true;
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Dec(ModRM.RM,8);
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end;
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@ -969,31 +1091,92 @@ begin
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end;
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end;
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procedure t_modrm_info.build(reg,mreg:t_jit_reg);
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procedure t_modrm_info.build_rm(reg,mreg:t_jit_reg);
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begin
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ModRM.Index:=reg.ARegValue[0].AIndex;
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case reg.ARegValue[0].AType of
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regGeneralH:
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begin
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ModRM.Index:=ModRM.Index+4;
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end;
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else
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begin
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if (ModRM.Index>=8) then
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begin
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rexR:=true;
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Dec(ModRM.Index,8);
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end;
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end;
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if (reg.ARegValue[0].AType=regGeneralH) then
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begin
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RH:=True;
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Inc(ModRM.Index,4);
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end else
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if (ModRM.Index>=8) then
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begin
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rexR:=true;
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Dec(ModRM.Index,8);
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end;
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rexF:=get_force_rex(reg);
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build(ModRM.Index,mreg);
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build_im(ModRM.Index,mreg);
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end;
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procedure t_modrm_info.emit(var ji:t_jit_instruction);
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procedure t_modrm_info.build_rr(reg0,reg1:t_jit_reg);
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begin
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ModRM.Index:=reg1.ARegValue[0].AIndex;
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if (reg1.ARegValue[0].AType=regGeneralH) then
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begin
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RH:=True;
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Inc(ModRM.Index,4);
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end else
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if (ModRM.Index>=8) then
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begin
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rexR:=true;
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Dec(ModRM.Index,8);
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end;
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rexF:=get_force_rex(reg1);
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ModRM.RM:=reg0.ARegValue[0].AIndex;
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if (reg0.ARegValue[0].AType=regGeneralH) then
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begin
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if rexF or rexR then
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begin
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Assert(false,'imposible');
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end;
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RH:=True;
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Inc(ModRM.RM,4)
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end else
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if (ModRM.RM>=8) then
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begin
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if RH then
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begin
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Assert(false,'imposible');
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end;
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rexB:=true;
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Dec(ModRM.RM,8);
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end;
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ModRM.Mode:=3;
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end;
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procedure t_modrm_info.build_ir(Index:Byte;reg:t_jit_reg);
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begin
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ModRM.Index:=Index;
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ModRM.RM:=reg.ARegValue[0].AIndex;
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if (ModRM.RM>=8) then
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begin
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rexB:=true;
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Dec(ModRM.RM,8);
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end;
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rexF:=get_force_rex(reg);
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ModRM.Mode:=3;
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end;
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procedure t_modrm_info.emit_rex(var ji:t_jit_instruction;rexW:Boolean);
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begin
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if rexF or rexB or rexX or rexR or rexW then
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begin
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ji.EmitREX(rexB,rexX,rexR,rexW);
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end;
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end;
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procedure t_modrm_info.emit_mrm(var ji:t_jit_instruction);
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begin
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ji.EmitModRM(ModRM.Mode,ModRM.Index,ModRM.RM);
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@ -1017,7 +1200,7 @@ begin
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end;
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end;
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end;
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1:ji.EmitByte (AOffset); //1
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1:ji.EmitByte(AOffset); //1
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2:begin
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ji.ALink.ADataOffset:=ji.ASize;
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ji.EmitInt32(AOffset); //4
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@ -1074,7 +1257,7 @@ begin
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modrm_info:=Default(t_modrm_info);
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modrm_info.build(reg,mreg);
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modrm_info.build_rm(reg,mreg);
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ji.EmitSelector(mreg.ASegment);
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@ -1088,25 +1271,20 @@ begin
|
|||
ji.EmitByte($67); //Address-size override prefix (32)
|
||||
end;
|
||||
|
||||
if modrm_info.rexF or modrm_info.rexB or modrm_info.rexX or modrm_info.rexR or rexW then
|
||||
begin
|
||||
ji.EmitREX(modrm_info.rexB,modrm_info.rexX,modrm_info.rexR,rexW);
|
||||
end;
|
||||
modrm_info.emit_rex(ji,rexW);
|
||||
|
||||
ji.EmitByte(op);
|
||||
|
||||
modrm_info.emit(ji);
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
_add(ji);
|
||||
end;
|
||||
|
||||
procedure t_jit_builder._mov(op,op8:Byte;reg0:t_jit_reg;reg1:t_jit_reg);
|
||||
var
|
||||
rexF,rexB,rexR,rexW:Boolean;
|
||||
rexW:Boolean;
|
||||
|
||||
ModRM:record
|
||||
Index,RM:Byte;
|
||||
end;
|
||||
modrm_info:t_modrm_info;
|
||||
|
||||
Prefix:Byte;
|
||||
|
||||
|
|
@ -1118,21 +1296,16 @@ begin
|
|||
Assert(is_reg_size(reg0,[os8,os16,os32,os64]));
|
||||
Assert(is_reg_size(reg1,[os8,os16,os32,os64]));
|
||||
|
||||
Assert(is_reg_type(reg0,[regGeneral]));
|
||||
Assert(is_reg_type(reg1,[regGeneral]));
|
||||
Assert(is_reg_type(reg0,[regGeneral,regGeneralH]));
|
||||
Assert(is_reg_type(reg1,[regGeneral,regGeneralH]));
|
||||
|
||||
Assert(reg0.ARegValue[0].AScale<=1);
|
||||
Assert(reg1.ARegValue[0].AScale<=1);
|
||||
|
||||
Assert(reg0.ARegValue[0].ASize=reg1.ARegValue[0].ASize);
|
||||
|
||||
Assert(get_force_rex(reg0)=get_force_rex(reg1));
|
||||
|
||||
ji:=default_jit_instruction;
|
||||
|
||||
rexF:=false;
|
||||
rexB:=false;
|
||||
rexR:=false;
|
||||
rexW:=false;
|
||||
Prefix:=0;
|
||||
|
||||
|
|
@ -1153,35 +1326,80 @@ begin
|
|||
else;
|
||||
end;
|
||||
|
||||
ModRM.Index:=reg1.ARegValue[0].AIndex;
|
||||
if (ModRM.Index>=8) then
|
||||
begin
|
||||
rexR:=true;
|
||||
Dec(ModRM.Index,8);
|
||||
end;
|
||||
modrm_info:=Default(t_modrm_info);
|
||||
|
||||
ModRM.RM:=reg0.ARegValue[0].AIndex;
|
||||
if (ModRM.RM>=8) then
|
||||
begin
|
||||
rexB:=true;
|
||||
Dec(ModRM.RM,8);
|
||||
end;
|
||||
|
||||
rexF:=get_force_rex(reg0);
|
||||
modrm_info.build_rr(reg0,reg1);
|
||||
|
||||
if (Prefix<>0) then
|
||||
begin
|
||||
ji.EmitByte(Prefix); //Operand-size override prefix (16)
|
||||
end;
|
||||
|
||||
if rexF or rexB or rexR or rexW then
|
||||
begin
|
||||
ji.EmitREX(rexB,False,rexR,rexW);
|
||||
end;
|
||||
modrm_info.emit_rex(ji,rexW);
|
||||
|
||||
ji.EmitByte(op);
|
||||
|
||||
ji.EmitModRM(3,ModRM.Index,ModRM.RM);
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
_add(ji);
|
||||
end;
|
||||
|
||||
////
|
||||
|
||||
procedure t_jit_builder._mov(op,op8,index:Byte;reg:t_jit_reg);
|
||||
var
|
||||
rexW:Boolean;
|
||||
|
||||
modrm_info:t_modrm_info;
|
||||
|
||||
Prefix:Byte;
|
||||
|
||||
ji:t_jit_instruction;
|
||||
begin
|
||||
Assert(is_one_reg(reg));
|
||||
|
||||
Assert(is_reg_size(reg,[os8,os16,os32,os64]));
|
||||
|
||||
Assert(is_reg_type(reg,[regGeneral,regGeneralH]));
|
||||
|
||||
Assert(reg.ARegValue[0].AScale<=1);
|
||||
|
||||
ji:=default_jit_instruction;
|
||||
|
||||
rexW:=false;
|
||||
Prefix:=0;
|
||||
|
||||
case reg.ARegValue[0].ASize of
|
||||
os8:
|
||||
begin
|
||||
op:=op8;
|
||||
end;
|
||||
os16:
|
||||
begin
|
||||
Prefix:=$66;
|
||||
end;
|
||||
os32:;
|
||||
os64:
|
||||
begin
|
||||
rexW:=True;
|
||||
end;
|
||||
else;
|
||||
end;
|
||||
|
||||
modrm_info:=Default(t_modrm_info);
|
||||
|
||||
modrm_info.build_ir(Index,reg);
|
||||
|
||||
if (Prefix<>0) then
|
||||
begin
|
||||
ji.EmitByte(Prefix); //Operand-size override prefix (16)
|
||||
end;
|
||||
|
||||
modrm_info.emit_rex(ji,rexW);
|
||||
|
||||
ji.EmitByte(op);
|
||||
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
_add(ji);
|
||||
end;
|
||||
|
|
@ -1190,34 +1408,28 @@ end;
|
|||
|
||||
procedure t_jit_builder._movi(op,op8,index:Byte;reg:t_jit_reg;imm:Int64);
|
||||
var
|
||||
rexF,rexB,rexW:Boolean;
|
||||
rexW:Boolean;
|
||||
|
||||
RM,Prefix:Byte;
|
||||
Prefix:Byte;
|
||||
|
||||
modrm_info:t_modrm_info;
|
||||
|
||||
ji:t_jit_instruction;
|
||||
begin
|
||||
Assert(is_one_reg(reg));
|
||||
Assert(is_reg_size(reg,[os8,os16,os32,os64]));
|
||||
|
||||
Assert(is_reg_type(reg,[regGeneral]));
|
||||
Assert(is_reg_type(reg,[regGeneral,regGeneralH]));
|
||||
|
||||
Assert(reg.ARegValue[0].AScale<=1);
|
||||
|
||||
ji:=default_jit_instruction;
|
||||
|
||||
rexF:=false;
|
||||
rexB:=false;
|
||||
rexW:=false;
|
||||
Prefix:=0;
|
||||
|
||||
RM:=reg.ARegValue[0].AIndex;
|
||||
if (RM>=8) then
|
||||
begin
|
||||
rexB:=true;
|
||||
Dec(RM,8);
|
||||
end;
|
||||
modrm_info:=Default(t_modrm_info);
|
||||
|
||||
rexF:=get_force_rex(reg);
|
||||
modrm_info.build_ir(Index,reg);
|
||||
|
||||
case reg.ARegValue[0].ASize of
|
||||
os8:
|
||||
|
|
@ -1241,14 +1453,11 @@ begin
|
|||
ji.EmitByte(Prefix); //Operand-size override prefix (16)
|
||||
end;
|
||||
|
||||
if rexF or rexB or rexW then
|
||||
begin
|
||||
ji.EmitREX(rexB,False,False,rexW);
|
||||
end;
|
||||
modrm_info.emit_rex(ji,rexW);
|
||||
|
||||
ji.EmitByte(op);
|
||||
|
||||
ji.EmitModRM(3,index,RM);
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
case reg.ARegValue[0].ASize of
|
||||
os8:ji.EmitByte (imm);
|
||||
|
|
@ -1304,7 +1513,7 @@ begin
|
|||
|
||||
modrm_info:=Default(t_modrm_info);
|
||||
|
||||
modrm_info.build(Index,mreg);
|
||||
modrm_info.build_im(Index,mreg);
|
||||
|
||||
ji.EmitSelector(mreg.ASegment);
|
||||
|
||||
|
|
@ -1318,20 +1527,17 @@ begin
|
|||
ji.EmitByte($67); //Address-size override prefix (32)
|
||||
end;
|
||||
|
||||
if modrm_info.rexF or modrm_info.rexB or modrm_info.rexX or modrm_info.rexR or rexW then
|
||||
begin
|
||||
ji.EmitREX(modrm_info.rexB,modrm_info.rexX,modrm_info.rexR,rexW);
|
||||
end;
|
||||
modrm_info.emit_rex(ji,rexW);
|
||||
|
||||
ji.EmitByte(op);
|
||||
|
||||
modrm_info.emit(ji);
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
case Size of
|
||||
os8:ji.EmitByte (imm);
|
||||
os16:ji.EmitWord (imm);
|
||||
os32:ji.EmitInt32(imm);
|
||||
os64:ji.EmitInt64(imm);
|
||||
os64:ji.EmitInt32(imm);
|
||||
else;
|
||||
end;
|
||||
|
||||
|
|
@ -1340,34 +1546,29 @@ end;
|
|||
|
||||
procedure t_jit_builder._movi8(op,index:Byte;reg:t_jit_reg;imm:Byte);
|
||||
var
|
||||
rexF,rexB,rexW:Boolean;
|
||||
rexW:Boolean;
|
||||
|
||||
RM,Prefix:Byte;
|
||||
Prefix:Byte;
|
||||
|
||||
modrm_info:t_modrm_info;
|
||||
|
||||
ji:t_jit_instruction;
|
||||
begin
|
||||
Assert(is_one_reg(reg));
|
||||
Assert(is_reg_size(reg,[os16,os32,os64]));
|
||||
|
||||
Assert(is_reg_type(reg,[regGeneral]));
|
||||
Assert(is_reg_type(reg,[regGeneral,regGeneralH]));
|
||||
|
||||
Assert(reg.ARegValue[0].AScale<=1);
|
||||
|
||||
ji:=default_jit_instruction;
|
||||
|
||||
rexF:=false;
|
||||
rexB:=false;
|
||||
rexW:=false;
|
||||
Prefix:=0;
|
||||
|
||||
RM:=reg.ARegValue[0].AIndex;
|
||||
if (RM>=8) then
|
||||
begin
|
||||
rexB:=true;
|
||||
Dec(RM,8);
|
||||
end;
|
||||
modrm_info:=Default(t_modrm_info);
|
||||
|
||||
rexF:=get_force_rex(reg);
|
||||
modrm_info.build_ir(Index,reg);
|
||||
|
||||
case reg.ARegValue[0].ASize of
|
||||
os16:
|
||||
|
|
@ -1387,14 +1588,11 @@ begin
|
|||
ji.EmitByte(Prefix); //Operand-size override prefix (16)
|
||||
end;
|
||||
|
||||
if rexF or rexB or rexW then
|
||||
begin
|
||||
ji.EmitREX(rexB,False,False,rexW);
|
||||
end;
|
||||
modrm_info.emit_rex(ji,rexW);
|
||||
|
||||
ji.EmitByte(op);
|
||||
|
||||
ji.EmitModRM(3,index,RM);
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
ji.EmitByte(imm);
|
||||
|
||||
|
|
@ -1440,7 +1638,7 @@ begin
|
|||
|
||||
modrm_info:=Default(t_modrm_info);
|
||||
|
||||
modrm_info.build(Index,mreg);
|
||||
modrm_info.build_im(Index,mreg);
|
||||
|
||||
ji.EmitSelector(mreg.ASegment);
|
||||
|
||||
|
|
@ -1454,14 +1652,11 @@ begin
|
|||
ji.EmitByte($67); //Address-size override prefix (32)
|
||||
end;
|
||||
|
||||
if modrm_info.rexF or modrm_info.rexB or modrm_info.rexX or modrm_info.rexR or rexW then
|
||||
begin
|
||||
ji.EmitREX(modrm_info.rexB,modrm_info.rexX,modrm_info.rexR,rexW);
|
||||
end;
|
||||
modrm_info.emit_rex(ji,rexW);
|
||||
|
||||
ji.EmitByte(op);
|
||||
|
||||
modrm_info.emit(ji);
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
ji.EmitByte(imm); //1
|
||||
|
||||
|
|
@ -1490,7 +1685,7 @@ begin
|
|||
|
||||
modrm_info:=Default(t_modrm_info);
|
||||
|
||||
modrm_info.build(index,mreg);
|
||||
modrm_info.build_im(index,mreg);
|
||||
|
||||
ji.EmitSelector(mreg.ASegment);
|
||||
|
||||
|
|
@ -1504,14 +1699,11 @@ begin
|
|||
ji.EmitByte($67); //Address-size override prefix (32)
|
||||
end;
|
||||
|
||||
if modrm_info.rexF or modrm_info.rexB or modrm_info.rexX or modrm_info.rexR then
|
||||
begin
|
||||
ji.EmitREX(modrm_info.rexB,modrm_info.rexX,modrm_info.rexR,False);
|
||||
end;
|
||||
modrm_info.emit_rex(ji,False);
|
||||
|
||||
ji.EmitByte(op);
|
||||
|
||||
modrm_info.emit(ji);
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
_add(ji);
|
||||
end;
|
||||
|
|
@ -1624,6 +1816,11 @@ begin
|
|||
end;
|
||||
|
||||
procedure t_jit_builder.movi(reg:t_jit_reg;imm:Int64);
|
||||
begin
|
||||
_movi($C7,$C6,0,reg,imm);
|
||||
end;
|
||||
|
||||
procedure t_jit_builder.movi64(reg:t_jit_reg;imm:Int64);
|
||||
var
|
||||
rexF,rexB,rexW:Boolean;
|
||||
|
||||
|
|
@ -1692,7 +1889,7 @@ begin
|
|||
os8:ji.EmitByte (imm);
|
||||
os16:ji.EmitWord (imm);
|
||||
os32:ji.EmitInt32(imm);
|
||||
os64:ji.EmitInt32(imm);
|
||||
os64:ji.EmitInt64(imm);
|
||||
else;
|
||||
end;
|
||||
|
||||
|
|
@ -1745,6 +1942,11 @@ begin
|
|||
_movi8($83,0,reg,imm);
|
||||
end;
|
||||
|
||||
procedure t_jit_builder.addi8(size:TOperandSize;mem:t_jit_regs;imm:Byte);
|
||||
begin
|
||||
_movi8($83,0,size,mem,imm);
|
||||
end;
|
||||
|
||||
//
|
||||
|
||||
procedure t_jit_builder.subq(mem:t_jit_regs;reg:t_jit_reg);
|
||||
|
|
@ -1772,6 +1974,11 @@ begin
|
|||
_movi8($83,5,reg,imm);
|
||||
end;
|
||||
|
||||
procedure t_jit_builder.subi8(size:TOperandSize;mem:t_jit_regs;imm:Byte);
|
||||
begin
|
||||
_movi8($83,5,size,mem,imm);
|
||||
end;
|
||||
|
||||
///
|
||||
|
||||
procedure t_jit_builder.xorq(reg0:t_jit_reg;reg1:t_jit_reg);
|
||||
|
|
@ -1864,7 +2071,78 @@ begin
|
|||
_push($58,reg);
|
||||
end;
|
||||
|
||||
procedure t_jit_builder._vmov(Op,SimdOpcode:Byte;reg:t_jit_reg;mem:t_jit_regs);
|
||||
procedure t_jit_builder.pushfq;
|
||||
var
|
||||
ji:t_jit_instruction;
|
||||
begin
|
||||
ji:=default_jit_instruction;
|
||||
|
||||
ji.EmitByte($9C);
|
||||
|
||||
_add(ji);
|
||||
end;
|
||||
|
||||
procedure t_jit_builder.popfq;
|
||||
var
|
||||
ji:t_jit_instruction;
|
||||
begin
|
||||
ji:=default_jit_instruction;
|
||||
|
||||
ji.EmitByte($9D);
|
||||
|
||||
_add(ji);
|
||||
end;
|
||||
|
||||
procedure t_jit_builder._pmov(Op0,Op1:Byte;reg:t_jit_reg;mem:t_jit_regs);
|
||||
var
|
||||
mreg:t_jit_reg;
|
||||
|
||||
modrm_info:t_modrm_info;
|
||||
|
||||
ji:t_jit_instruction;
|
||||
begin
|
||||
Assert(is_one_reg(reg));
|
||||
Assert(is_reg_size(reg,[os64,os128]));
|
||||
|
||||
Assert(is_reg_type(reg,[regMm,regXmm]));
|
||||
|
||||
Assert(reg.ARegValue[0].AScale<=1);
|
||||
|
||||
mreg:=Sums(mem);
|
||||
|
||||
Assert(is_reg_size(mreg,[os0,os32,os64]));
|
||||
Assert(is_reg_type(mreg,[regNone,regGeneral,regRip]));
|
||||
Assert(is_valid_scale(mreg));
|
||||
|
||||
ji:=default_jit_instruction;
|
||||
|
||||
modrm_info:=Default(t_modrm_info);
|
||||
|
||||
modrm_info.build_rm(reg,mreg);
|
||||
|
||||
ji.EmitSelector(mreg.ASegment);
|
||||
|
||||
if (mreg.ARegValue[0].ASize=os32) then
|
||||
begin
|
||||
ji.EmitByte($67); //Address-size override prefix (32)
|
||||
end;
|
||||
|
||||
if (reg.ARegValue[0].ASize=os128) then
|
||||
begin
|
||||
ji.EmitByte($66); //xmm prefix
|
||||
end;
|
||||
|
||||
modrm_info.emit_rex(ji,False);
|
||||
|
||||
ji.EmitByte(Op0);
|
||||
ji.EmitByte(Op1);
|
||||
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
_add(ji);
|
||||
end;
|
||||
|
||||
procedure t_jit_builder._vmov(Op0,Op1:Byte;reg:t_jit_reg;mem:t_jit_regs);
|
||||
var
|
||||
mreg:t_jit_reg;
|
||||
|
||||
|
|
@ -1899,7 +2177,7 @@ begin
|
|||
|
||||
modrm_info:=Default(t_modrm_info);
|
||||
|
||||
modrm_info.build(reg,mreg);
|
||||
modrm_info.build_rm(reg,mreg);
|
||||
|
||||
ji.EmitSelector(mreg.ASegment);
|
||||
|
||||
|
|
@ -1913,17 +2191,17 @@ begin
|
|||
ji.EmitByte($C4); //VEX3
|
||||
|
||||
ji.EmitRXBm(modrm_info.rexB,modrm_info.rexX,modrm_info.rexR,1);
|
||||
ji.EmitWvvv(False,0,Vex.Length,SimdOpcode);
|
||||
ji.EmitWvvv(False,0,Vex.Length,Op1);
|
||||
end else
|
||||
begin
|
||||
ji.EmitByte($C5); //VEX2
|
||||
|
||||
ji.EmitRvvv(modrm_info.rexR,0,Vex.Length,SimdOpcode);
|
||||
ji.EmitRvvv(modrm_info.rexR,0,Vex.Length,Op1);
|
||||
end;
|
||||
|
||||
ji.EmitByte(Op);
|
||||
ji.EmitByte(Op0);
|
||||
|
||||
modrm_info.emit(ji);
|
||||
modrm_info.emit_mrm(ji);
|
||||
|
||||
_add(ji);
|
||||
end;
|
||||
|
|
|
|||
|
|
@ -59,7 +59,8 @@ uses
|
|||
machdep,
|
||||
kern_dlsym,
|
||||
kern_authinfo,
|
||||
vfs_syscalls;
|
||||
vfs_syscalls,
|
||||
kern_jit2;
|
||||
|
||||
function exec_alloc_args(args:p_image_args):Integer;
|
||||
begin
|
||||
|
|
@ -244,7 +245,7 @@ begin
|
|||
}
|
||||
map:=@vmspace^.vm_map;
|
||||
|
||||
sv_minuser:=VM_MINUSER_ADDRESS;
|
||||
sv_minuser:=pmap_mem[0].start;
|
||||
sv_maxuser:=VM_MAXUSER_ADDRESS;
|
||||
|
||||
if (vm_map_min(map)=sv_minuser) and
|
||||
|
|
@ -999,6 +1000,12 @@ begin
|
|||
p_proc.libkernel___end_addr:=dynlibs_info.libkernel^.map_base + dynlibs_info.libkernel^.text_size;
|
||||
end;
|
||||
|
||||
kern_jit2.add_entry_point(dynlibs_info.libkernel^.entry_addr);
|
||||
kern_jit2.add_entry_point(dynlibs_info.libkernel^.init_proc_addr);
|
||||
kern_jit2.add_entry_point(dynlibs_info.libkernel^.fini_proc_addr);
|
||||
|
||||
kern_jit2.pick();
|
||||
|
||||
_dyn_not_exist:
|
||||
|
||||
obj:=TAILQ_FIRST(@dynlibs_info.obj_list);
|
||||
|
|
|
|||
|
|
@ -629,7 +629,7 @@ begin
|
|||
|
||||
movi(edx,copy_size);
|
||||
|
||||
call(@copyout_mov); //rdi,rsi,edx
|
||||
call(@copyin_mov); //rdi,rsi,edx
|
||||
|
||||
reta;
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -738,6 +738,10 @@
|
|||
<Filename Value="..\kern\kern_proc.pas"/>
|
||||
<IsPartOfProject Value="True"/>
|
||||
</Unit>
|
||||
<Unit>
|
||||
<Filename Value="kern_jit2.pas"/>
|
||||
<IsPartOfProject Value="True"/>
|
||||
</Unit>
|
||||
</Units>
|
||||
</ProjectOptions>
|
||||
<CompilerOptions>
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ const
|
|||
|
||||
SCE_KERNEL_GNMDRIVER =QWORD($00FE0000000);
|
||||
|
||||
VM_MINUSER_ADDRESS =QWORD($00200000000);
|
||||
VM_MINUSER_ADDRESS =QWORD($00200000000); //(original:$000000000000)
|
||||
VM_MAXUSER_ADDRESS =QWORD($10000000000); //(original:$800000000000)
|
||||
|
||||
VM_MIN_GPU_ADDRESS =QWORD($10000000000);
|
||||
|
|
|
|||
Loading…
Reference in New Issue