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SOP1?11

This commit is contained in:
Pavel 2022-12-23 14:22:08 +03:00
parent 5a5821e722
commit 2be22ac817
2 changed files with 95 additions and 15 deletions
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53
spirv/emit_post_op.pas
View File

@ -50,6 +50,7 @@ type
function OnBranchConditional1(node:PSpirvOp):Integer;
//
function OpBitCount1(node:PSpirvOp):Integer;
function OpBitReverse1(node:PSpirvOp):Integer;
//
function OnSelect1(node:PSpirvOp):Integer;
//
@ -106,6 +107,7 @@ begin
Op.OpBranchConditional:Result:=OnBranchConditional1(node);
Op.OpBitCount :Result:=OpBitCount1(node);
Op.OpBitReverse :Result:=OpBitReverse1(node);
else;
end;
@ -815,6 +817,51 @@ begin
end;
Function ReverseBits(src:QWORD;count:Byte):QWORD;
var
i:Byte;
begin
Result:=0;
Assert(count<>0);
dec(count);
For i:=0 to count do
begin
Result.Bits[i]:=src.Bits[count-i];
end;
end;
function TEmitPostOp.OpBitReverse1(node:PSpirvOp):Integer;
var
dst,src:PsrRegNode;
data:QWORD;
procedure _SetConst(dtype:TsrDataType;value:QWORD);
begin
dst^.pWriter:=ConstList.Fetch(dtype,value);
node^.mark_not_used;
node^.pDst:=nil;
Inc(Result);
end;
begin
Result:=0;
dst:=node^.pDst^.AsType(ntReg);
src:=RegDown(node^.ParamNode(0)^.AsReg);
if (dst=nil) or (src=nil) then Exit;
if src^.is_const then
begin
//need a const calc
data:=src^.AsConst^.GetData;
data:=ReverseBits(data,src^.dtype.BitSize);
_SetConst(dst^.dtype,data);
Exit;
end;
end;
function try_get_comp_bridge(var src:PsrRegNode):Integer; forward;
@ -1876,12 +1923,6 @@ begin
if (data[0]=data[1]) then
begin
if (index<>0) then
begin
Assert(false,'TODO');
end;
node^.mark_not_used;
node^.pDst:=nil;

57
spirv/emit_sop1.pas
View File

@ -7,6 +7,7 @@ interface
uses
sysutils,
ps4_pssl,
spirv,
srCFGLabel,
srFlow,
srType,
@ -29,7 +30,10 @@ type
procedure emit_S_SETPC_B64;
procedure emit_S_SWAPPC_B64;
procedure emit_S_AND_SAVEEXEC_B64;
procedure emit_S_WQM_B32;
procedure emit_S_WQM_B64;
procedure emit_S_BREV_B32;
procedure emit_S_BREV_B64;
end;
implementation
@ -74,6 +78,7 @@ Var
begin
dst:=get_sdst7(FSPI.SOP1.SDST);
src:=fetch_ssrc9(FSPI.SOP1.SSRC,dtUnknow);
MakeCopy(dst,src);
end;
@ -82,11 +87,9 @@ Var
dst:array[0..1] of PsrRegSlot;
src:array[0..1] of PsrRegNode;
begin
dst[0]:=get_sdst7(FSPI.SOP1.SDST+0);
dst[1]:=get_sdst7(FSPI.SOP1.SDST+1);
if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(false);
src[0]:=fetch_ssrc9(FSPI.SOP1.SSRC+0,dtUnknow);
src[1]:=fetch_ssrc9(FSPI.SOP1.SSRC+1,dtUnknow);
if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
MakeCopy(dst[0],src[0]);
MakeCopy(dst[1],src[1]);
@ -104,7 +107,6 @@ Var
src:PsrRegNode;
begin
dst:=get_sdst7(FSPI.SOP1.SDST);
src:=fetch_ssrc9(FSPI.SOP1.SSRC,dtUnknow);
OpNot(dst,src);
@ -119,11 +121,9 @@ Var
dst:array[0..1] of PsrRegSlot;
src:array[0..1] of PsrRegNode;
begin
dst[0]:=get_sdst7(FSPI.SOP1.SDST+0);
dst[1]:=get_sdst7(FSPI.SOP1.SDST+1);
if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(false);
src[0]:=fetch_ssrc9(FSPI.SOP1.SSRC+0,dtUnknow);
src[1]:=fetch_ssrc9(FSPI.SOP1.SSRC+1,dtUnknow);
if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
OpNot(dst[0],src[0]);
OpNot(dst[1],src[1]);
@ -208,6 +208,17 @@ begin
//SCC = (sdst != 0) SCC = ((exc[0] != 0) or ((exc[1] != 0))
end;
procedure TEmit_SOP1.emit_S_WQM_B32;
Var
dst:PsrRegSlot;
src:PsrRegNode;
begin
dst:=get_sdst7(FSPI.SOP1.SDST);
src:=fetch_ssrc9(FSPI.SOP1.SSRC,dtUnknow);
OpWQM32(dst,src);
end;
procedure TEmit_SOP1.emit_S_WQM_B64;
Var
dst:array[0..1] of PsrRegSlot;
@ -228,6 +239,30 @@ begin
OpWQM32(dst[1],src[1]);
end;
procedure TEmit_SOP1.emit_S_BREV_B32; //sdst[31:0] = ssrc[0:31]
Var
dst:PsrRegSlot;
src:PsrRegNode;
begin
dst:=get_sdst7(FSPI.SOP1.SDST);
src:=fetch_ssrc9(FSPI.SOP1.SSRC,dtUInt32);
Op1(Op.OpBitReverse,dtUInt32,dst,src);
end;
procedure TEmit_SOP1.emit_S_BREV_B64; //sdst[63:0] = ssrc[0:63]
Var
dst:array[0..1] of PsrRegSlot;
src:array[0..1] of PsrRegNode;
begin
if not get_sdst7_pair(FSPI.SOP1.SDST,@dst) then Assert(false);
if not fetch_ssrc9_pair(FSPI.SOP1.SSRC,@src,dtUnknow) then Assert(false);
Op1(Op.OpBitReverse,dtUInt32,dst[0],src[1]); //0 -> 1
Op1(Op.OpBitReverse,dtUInt32,dst[1],src[0]); //1 -> 0
end;
procedure TEmit_SOP1.emit_SOP1;
begin
@ -238,8 +273,12 @@ begin
S_NOT_B32 : emit_S_NOT_B32;
S_NOT_B64 : emit_S_NOT_B64;
S_WQM_B32 : emit_S_WQM_B32;
S_WQM_B64 : emit_S_WQM_B64;
S_BREV_B32 : emit_S_BREV_B32;
S_BREV_B64 : emit_S_BREV_B64;
S_GETPC_B64 : emit_S_GETPC_B64;
S_SETPC_B64 : emit_S_SETPC_B64;
S_SWAPPC_B64 : emit_S_SWAPPC_B64;