diff --git a/sys/jit/kern_jit.pas b/sys/jit/kern_jit.pas
index 5e5065bb..569364ec 100644
--- a/sys/jit/kern_jit.pas
+++ b/sys/jit/kern_jit.pas
@@ -1568,6 +1568,8 @@ var
  link_next:t_jit_i_link;
 
  node,node_curr,node_next:p_jit_instruction;
+
+ i:Integer;
 begin
  if (cmDontScanRipRel in ctx.modes) then
  begin
@@ -1642,6 +1644,8 @@ begin
 
   dis.Disassemble(dm64,ptr,din);
 
+  apply_din_stat(din,(ptr-ctx.code));
+
   ctx.ptr_next:=ctx.ptr_curr+(ptr-ctx.code);
 
   case din.OpCode.Opcode of
@@ -1810,7 +1814,8 @@ begin
   link_next:=ctx.builder.get_curr_label.after;
   node_next:=link_next._node;
 
-  {
+  //////
+  i:=0;
   if (node_curr<>node_next) and
      (node_curr<>nil) then
   begin
@@ -1819,17 +1824,23 @@ begin
    while (node<>nil) do
    begin
 
+    i:=i+node^.ASize;
+
+    {
     if not test_disassemble(@node^.AData,node^.ASize) then
     begin
      print_asm:=True;
      Break;
     end;
+    }
 
 
     node:=TAILQ_NEXT(node,@node^.entry);
    end;
   end;
-  }
+
+  apply_jit_stat(i);
+  //////
 
   {
   if print_asm then
@@ -1986,6 +1997,7 @@ begin
 
  ctx.Free;
 
+ //print_din_stats;
 end;
 
 initialization
diff --git a/sys/jit/kern_jit_ops_sse.pas b/sys/jit/kern_jit_ops_sse.pas
index 54a7234d..e90c014e 100644
--- a/sys/jit/kern_jit_ops_sse.pas
+++ b/sys/jit/kern_jit_ops_sse.pas
@@ -785,6 +785,9 @@ begin
  jit_cbs[OPPnone,OPcvtps2 ,OPSx_dq]:=@op_reg_mem_wo;
  jit_cbs[OPPnone,OPcvtps2 ,OPSx_pi]:=@op_reg_mem_wo;
 
+ jit_cbs[OPPnone,OPcvtpi2 ,OPSx_pd]:=@op_reg_mem_wo;
+ jit_cbs[OPPnone,OPcvtpi2 ,OPSx_ps]:=@op_reg_mem_wo;
+
  jit_cbs[OPPnone,OPsqrt,OPSx_ps]:=@op_reg_mem_wo;
  jit_cbs[OPPnone,OPsqrt,OPSx_pd]:=@op_reg_mem_wo;
  jit_cbs[OPPnone,OPsqrt,OPSx_sd]:=@op_reg_mem_wo;
diff --git a/sys/jit/kern_jit_test.pas b/sys/jit/kern_jit_test.pas
index dd0be904..a5123bb0 100644
--- a/sys/jit/kern_jit_test.pas
+++ b/sys/jit/kern_jit_test.pas
@@ -5,14 +5,130 @@ unit kern_jit_test;
 
 interface
 
+uses
+ x86_fpdbgdisas;
+
 procedure print_test_jit_cbs(print_ops,print_status:Boolean);
 
+procedure apply_din_stat(din:TInstruction;code_size:Byte);
+procedure apply_jit_stat(code_size:Word);
+
+procedure print_din_stats;
+
 implementation
 
 uses
- x86_fpdbgdisas,
  kern_jit_ops;
 
+var
+ instr_sizes:array[0..16] of QWORD;
+ jit_sizes  :array[0..511] of QWORD;
+
+ rip_stat:QWORD;
+ one_stat:QWORD;
+ gen_stat:array[0..15] of QWORD;
+
+const
+ gen_str:array[0..15] of PChar=(
+  'rax',
+  'rcx',
+  'rdx',
+  'rbx',
+  'rsp',
+  'rbp',
+  'rsi',
+  'rdi',
+  'r8 ',
+  'r9 ',
+  'r10',
+  'r11',
+  'r12',
+  'r13',
+  'r14',
+  'r15'
+ );
+
+procedure print_din_stats;
+var
+ i,s:Integer;
+begin
+ Writeln('[Instruction sizes]');
+ For i:=1 to 16 do
+ begin
+  Writeln(' [',i,']:',instr_sizes[i]);
+ end;
+ //
+ Writeln('[Instruction usage]');
+ Writeln(' [rip]:',rip_stat);
+ Writeln(' [one]:',one_stat);
+
+ For i:=0 to 15 do
+ begin
+  Writeln(' [',gen_str[i],']:',gen_stat[i]);
+ end;
+
+ s:=0;
+ For i:=511 downto 0 do
+ begin
+  if (jit_sizes[i]<>0) then
+  begin
+   s:=i;
+   Break;
+  end;
+ end;
+
+ Writeln('[JIT sizes]');
+ For i:=0 to s do
+ begin
+  Writeln(' [',i,']:',jit_sizes[i]);
+ end;
+
+end;
+
+procedure apply_reg_stat(r:TRegValue);
+begin
+ case r.AType of
+  regRip     :Inc(rip_stat);
+  regOne     :Inc(one_stat);
+  regGeneral :
+   if (r.AIndex<=15) then
+   begin
+    Inc(gen_stat[r.AIndex]);
+   end;
+  regGeneralH:
+   if (r.AIndex<=3) then
+   begin
+    Inc(gen_stat[r.AIndex]);
+   end;
+  else;
+ end;
+end;
+
+procedure apply_din_stat(din:TInstruction;code_size:Byte);
+var
+ i:Integer;
+begin
+ if (code_size<>0) and (code_size<=16) then
+ begin
+  Inc(instr_sizes[code_size]);
+ end;
+ //
+ if (din.OperCnt<>0) then
+ For i:=1 to din.OperCnt do
+ begin
+  apply_reg_stat(din.Operand[i].RegValue[0]);
+  apply_reg_stat(din.Operand[i].RegValue[1]);
+ end;
+end;
+
+procedure apply_jit_stat(code_size:Word);
+begin
+ if (code_size<=511) then
+ begin
+  Inc(jit_sizes[code_size]);
+ end;
+end;
+
 type
  t_used_op=array[TOpcodePrefix,TOpCode,TOpCodeSuffix] of Boolean;