unit si_ci_vi_merged_enum;

{$mode objfpc}{$H+}

interface

Const
 // ArrayMode
 ARRAY_LINEAR_GENERAL                            =$00000000;
 ARRAY_LINEAR_ALIGNED                            =$00000001;
 ARRAY_1D_TILED_THIN1                            =$00000002;
 ARRAY_1D_TILED_THICK                            =$00000003;
 ARRAY_2D_TILED_THIN1                            =$00000004;
 ARRAY_PRT_TILED_THIN1                           =$00000005;
 ARRAY_PRT_2D_TILED_THIN1                        =$00000006;
 ARRAY_2D_TILED_THICK                            =$00000007;
 ARRAY_2D_TILED_XTHICK                           =$00000008;
 ARRAY_PRT_TILED_THICK                           =$00000009;
 ARRAY_PRT_2D_TILED_THICK                        =$0000000a;
 ARRAY_PRT_3D_TILED_THIN1                        =$0000000b;
 ARRAY_3D_TILED_THIN1                            =$0000000c;
 ARRAY_3D_TILED_THICK                            =$0000000d;
 ARRAY_3D_TILED_XTHICK                           =$0000000e;
 ARRAY_PRT_3D_TILED_THICK                        =$0000000f;
 // BUF_DATA_FORMAT
 BUF_DATA_FORMAT_INVALID                         =$00000000;
 BUF_DATA_FORMAT_8                               =$00000001;
 BUF_DATA_FORMAT_16                              =$00000002;
 BUF_DATA_FORMAT_8_8                             =$00000003;
 BUF_DATA_FORMAT_32                              =$00000004;
 BUF_DATA_FORMAT_16_16                           =$00000005;
 BUF_DATA_FORMAT_10_11_11                        =$00000006;
 BUF_DATA_FORMAT_11_11_10                        =$00000007;
 BUF_DATA_FORMAT_10_10_10_2                      =$00000008;
 BUF_DATA_FORMAT_2_10_10_10                      =$00000009;
 BUF_DATA_FORMAT_8_8_8_8                         =$0000000a;
 BUF_DATA_FORMAT_32_32                           =$0000000b;
 BUF_DATA_FORMAT_16_16_16_16                     =$0000000c;
 BUF_DATA_FORMAT_32_32_32                        =$0000000d;
 BUF_DATA_FORMAT_32_32_32_32                     =$0000000e;
 BUF_DATA_FORMAT_RESERVED_15                     =$0000000f;
 // BUF_NUM_FORMAT
 BUF_NUM_FORMAT_UNORM                            =$00000000;
 BUF_NUM_FORMAT_SNORM                            =$00000001;
 BUF_NUM_FORMAT_USCALED                          =$00000002;
 BUF_NUM_FORMAT_SSCALED                          =$00000003;
 BUF_NUM_FORMAT_UINT                             =$00000004;
 BUF_NUM_FORMAT_SINT                             =$00000005;
 BUF_NUM_FORMAT_RESERVED_6                       =$00000006;
 BUF_NUM_FORMAT_FLOAT                            =$00000007;
 // BankHeight
 ADDR_SURF_BANK_HEIGHT_1                         =$00000000;
 ADDR_SURF_BANK_HEIGHT_2                         =$00000001;
 ADDR_SURF_BANK_HEIGHT_4                         =$00000002;
 ADDR_SURF_BANK_HEIGHT_8                         =$00000003;
 // BankInterleaveSize
 ADDR_CONFIG_BANK_INTERLEAVE_1                   =$00000000;
 ADDR_CONFIG_BANK_INTERLEAVE_2                   =$00000001;
 ADDR_CONFIG_BANK_INTERLEAVE_4                   =$00000002;
 ADDR_CONFIG_BANK_INTERLEAVE_8                   =$00000003;
 // BankSwapBytes
 CONFIG_128B_SWAPS                               =$00000000;
 CONFIG_256B_SWAPS                               =$00000001;
 CONFIG_512B_SWAPS                               =$00000002;
 CONFIG_1KB_SWAPS                                =$00000003;
 // BankTiling
 CONFIG_4_BANK                                   =$00000000;
 CONFIG_8_BANK                                   =$00000001;
 // BankWidth
 ADDR_SURF_BANK_WIDTH_1                          =$00000000;
 ADDR_SURF_BANK_WIDTH_2                          =$00000001;
 ADDR_SURF_BANK_WIDTH_4                          =$00000002;
 ADDR_SURF_BANK_WIDTH_8                          =$00000003;
 // BankWidthHeight
 ADDR_SURF_BANK_WH_1                             =$00000000;
 ADDR_SURF_BANK_WH_2                             =$00000001;
 ADDR_SURF_BANK_WH_4                             =$00000002;
 ADDR_SURF_BANK_WH_8                             =$00000003;
 // BlendOp
 BLEND_ZERO                                      =$00000000;
 BLEND_ONE                                       =$00000001;
 BLEND_SRC_COLOR                                 =$00000002;
 BLEND_ONE_MINUS_SRC_COLOR                       =$00000003;
 BLEND_SRC_ALPHA                                 =$00000004;
 BLEND_ONE_MINUS_SRC_ALPHA                       =$00000005;
 BLEND_DST_ALPHA                                 =$00000006;
 BLEND_ONE_MINUS_DST_ALPHA                       =$00000007;
 BLEND_DST_COLOR                                 =$00000008;
 BLEND_ONE_MINUS_DST_COLOR                       =$00000009;
 BLEND_SRC_ALPHA_SATURATE                        =$0000000a;
 BLEND_BOTH_SRC_ALPHA                            =$0000000b;
 BLEND_BOTH_INV_SRC_ALPHA                        =$0000000c;
 BLEND_CONSTANT_COLOR                            =$0000000d;
 BLEND_ONE_MINUS_CONSTANT_COLOR                  =$0000000e;
 BLEND_SRC1_COLOR                                =$0000000f;
 BLEND_INV_SRC1_COLOR                            =$00000010;
 BLEND_SRC1_ALPHA                                =$00000011;
 BLEND_INV_SRC1_ALPHA                            =$00000012;
 BLEND_CONSTANT_ALPHA                            =$00000013;
 BLEND_ONE_MINUS_CONSTANT_ALPHA                  =$00000014;
 // BlendOpt
 FORCE_OPT_AUTO                                  =$00000000;
 FORCE_OPT_DISABLE                               =$00000001;
 FORCE_OPT_ENABLE_IF_SRC_A_0                     =$00000002;
 FORCE_OPT_ENABLE_IF_SRC_RGB_0                   =$00000003;
 FORCE_OPT_ENABLE_IF_SRC_ARGB_0                  =$00000004;
 FORCE_OPT_ENABLE_IF_SRC_A_1                     =$00000005;
 FORCE_OPT_ENABLE_IF_SRC_RGB_1                   =$00000006;
 FORCE_OPT_ENABLE_IF_SRC_ARGB_1                  =$00000007;
 // CBMode
 CB_DISABLE                                      =$00000000;
 CB_NORMAL                                       =$00000001;
 CB_ELIMINATE_FAST_CLEAR                         =$00000002;
 CB_RESOLVE                                      =$00000003;
 CB_DECOMPRESS                                   =$00000004;
 CB_FMASK_DECOMPRESS                             =$00000005;
 CB_DCC_DECOMPRESS                               =$00000006;
 // CBPerfClearFilterSel
 CB_PERF_CLEAR_FILTER_SEL_NONCLEAR               =$00000000;
 CB_PERF_CLEAR_FILTER_SEL_CLEAR                  =$00000001;
 // CBPerfOpFilterSel
 CB_PERF_OP_FILTER_SEL_WRITE_ONLY                =$00000000;
 CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION         =$00000001;
 CB_PERF_OP_FILTER_SEL_RESOLVE                   =$00000002;
 CB_PERF_OP_FILTER_SEL_DECOMPRESS                =$00000003;
 CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS          =$00000004;
 CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR      =$00000005;
 // CBPerfSel
 CB_PERF_SEL_NONE                                =$00000000;
 CB_PERF_SEL_BUSY                                =$00000001;
 CB_PERF_SEL_CORE_SCLK_VLD                       =$00000002;
 CB_PERF_SEL_REG_SCLK0_VLD                       =$00000003;
 CB_PERF_SEL_REG_SCLK1_VLD                       =$00000004;
 CB_PERF_SEL_DRAWN_QUAD                          =$00000005;
 CB_PERF_SEL_DRAWN_PIXEL                         =$00000006;
 CB_PERF_SEL_DRAWN_QUAD_FRAGMENT                 =$00000007;
 CB_PERF_SEL_DRAWN_TILE                          =$00000008;
 CB_PERF_SEL_DB_CB_TILE_VALID_READY              =$00000009;
 CB_PERF_SEL_DB_CB_TILE_VALID_READYB             =$0000000a;
 CB_PERF_SEL_DB_CB_TILE_VALIDB_READY             =$0000000b;
 CB_PERF_SEL_DB_CB_TILE_VALIDB_READYB            =$0000000c;
 CB_PERF_SEL_CM_FC_TILE_VALID_READY              =$0000000d;
 CB_PERF_SEL_CM_FC_TILE_VALID_READYB             =$0000000e;
 CB_PERF_SEL_CM_FC_TILE_VALIDB_READY             =$0000000f;
 CB_PERF_SEL_CM_FC_TILE_VALIDB_READYB            =$00000010;
 CB_PERF_SEL_MERGE_TILE_ONLY_VALID_READY         =$00000011;
 CB_PERF_SEL_MERGE_TILE_ONLY_VALID_READYB        =$00000012;
 CB_PERF_SEL_DB_CB_LQUAD_VALID_READY             =$00000013;
 CB_PERF_SEL_DB_CB_LQUAD_VALID_READYB            =$00000014;
 CB_PERF_SEL_DB_CB_LQUAD_VALIDB_READY            =$00000015;
 CB_PERF_SEL_DB_CB_LQUAD_VALIDB_READYB           =$00000016;
 CB_PERF_SEL_LQUAD_NO_TILE                       =$00000017;
 CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_32_R         =$00000018;
 CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_32_AR        =$00000019;
 CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_32_GR        =$0000001a;
 CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_32_ABGR      =$0000001b;
 CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_FP16_ABGR    =$0000001c;
 CB_PERF_SEL_LQUAD_FORMAT_IS_EXPORT_SIGNED16_ABGR=$0000001d;
 CB_PERF_SEL_QUAD_KILLED_BY_EXTRA_PIXEL_EXPORT   =$0000001f;
 CB_PERF_SEL_QUAD_KILLED_BY_COLOR_INVALID        =$00000020;
 CB_PERF_SEL_QUAD_KILLED_BY_NULL_SAMPLE_MASK     =$00000022;
 CB_PERF_SEL_QUAD_KILLED_BY_DISCARD_PIXEL        =$00000023;
 CB_PERF_SEL_FC_CLEAR_QUAD_VALID_READY           =$00000024;
 CB_PERF_SEL_FC_CLEAR_QUAD_VALID_READYB          =$00000025;
 CB_PERF_SEL_FC_CLEAR_QUAD_VALIDB_READY          =$00000026;
 CB_PERF_SEL_FC_CLEAR_QUAD_VALIDB_READYB         =$00000027;
 CB_PERF_SEL_FOP_IN_VALID_READY                  =$00000028;
 CB_PERF_SEL_FOP_IN_VALID_READYB                 =$00000029;
 CB_PERF_SEL_FOP_IN_VALIDB_READY                 =$0000002a;
 CB_PERF_SEL_FOP_IN_VALIDB_READYB                =$0000002b;
 CB_PERF_SEL_FC_CC_QUADFRAG_VALID_READY          =$0000002c;
 CB_PERF_SEL_FC_CC_QUADFRAG_VALID_READYB         =$0000002d;
 CB_PERF_SEL_FC_CC_QUADFRAG_VALIDB_READY         =$0000002e;
 CB_PERF_SEL_FC_CC_QUADFRAG_VALIDB_READYB        =$0000002f;
 CB_PERF_SEL_CC_IB_SR_FRAG_VALID_READY           =$00000030;
 CB_PERF_SEL_CC_IB_SR_FRAG_VALID_READYB          =$00000031;
 CB_PERF_SEL_CC_IB_SR_FRAG_VALIDB_READY          =$00000032;
 CB_PERF_SEL_CC_IB_SR_FRAG_VALIDB_READYB         =$00000033;
 CB_PERF_SEL_CC_IB_TB_FRAG_VALID_READY           =$00000034;
 CB_PERF_SEL_CC_IB_TB_FRAG_VALID_READYB          =$00000035;
 CB_PERF_SEL_CC_IB_TB_FRAG_VALIDB_READY          =$00000036;
 CB_PERF_SEL_CC_IB_TB_FRAG_VALIDB_READYB         =$00000037;
 CB_PERF_SEL_CC_RB_BC_EVENFRAG_VALID_READY       =$00000038;
 CB_PERF_SEL_CC_RB_BC_EVENFRAG_VALID_READYB      =$00000039;
 CB_PERF_SEL_CC_RB_BC_EVENFRAG_VALIDB_READY      =$0000003a;
 CB_PERF_SEL_CC_RB_BC_EVENFRAG_VALIDB_READYB     =$0000003b;
 CB_PERF_SEL_CC_RB_BC_ODDFRAG_VALID_READY        =$0000003c;
 CB_PERF_SEL_CC_RB_BC_ODDFRAG_VALID_READYB       =$0000003d;
 CB_PERF_SEL_CC_RB_BC_ODDFRAG_VALIDB_READY       =$0000003e;
 CB_PERF_SEL_CC_RB_BC_ODDFRAG_VALIDB_READYB      =$0000003f;
 CB_PERF_SEL_CC_BC_CS_FRAG_VALID                 =$00000040;
 CB_PERF_SEL_CM_CACHE_HIT                        =$00000041;
 CB_PERF_SEL_CM_CACHE_TAG_MISS                   =$00000042;
 CB_PERF_SEL_CM_CACHE_SECTOR_MISS                =$00000043;
 CB_PERF_SEL_CM_CACHE_REEVICTION_STALL           =$00000044;
 CB_PERF_SEL_CM_CACHE_REPLACE_PENDING_EVICT_STALL=$00000046;
 CB_PERF_SEL_CM_CACHE_READ_OUTPUT_STALL          =$00000048;
 CB_PERF_SEL_CM_CACHE_WRITE_OUTPUT_STALL         =$00000049;
 CB_PERF_SEL_CM_CACHE_ACK_OUTPUT_STALL           =$0000004a;
 CB_PERF_SEL_CM_CACHE_STALL                      =$0000004b;
 CB_PERF_SEL_CM_CACHE_FLUSH                      =$0000004c;
 CB_PERF_SEL_CM_CACHE_TAGS_FLUSHED               =$0000004d;
 CB_PERF_SEL_CM_CACHE_SECTORS_FLUSHED            =$0000004e;
 CB_PERF_SEL_CM_CACHE_DIRTY_SECTORS_FLUSHED      =$0000004f;
 CB_PERF_SEL_FC_CACHE_HIT                        =$00000050;
 CB_PERF_SEL_FC_CACHE_TAG_MISS                   =$00000051;
 CB_PERF_SEL_FC_CACHE_SECTOR_MISS                =$00000052;
 CB_PERF_SEL_FC_CACHE_REEVICTION_STALL           =$00000053;
 CB_PERF_SEL_FC_CACHE_REPLACE_PENDING_EVICT_STALL=$00000055;
 CB_PERF_SEL_FC_CACHE_READ_OUTPUT_STALL          =$00000057;
 CB_PERF_SEL_FC_CACHE_WRITE_OUTPUT_STALL         =$00000058;
 CB_PERF_SEL_FC_CACHE_ACK_OUTPUT_STALL           =$00000059;
 CB_PERF_SEL_FC_CACHE_STALL                      =$0000005a;
 CB_PERF_SEL_FC_CACHE_FLUSH                      =$0000005b;
 CB_PERF_SEL_FC_CACHE_TAGS_FLUSHED               =$0000005c;
 CB_PERF_SEL_FC_CACHE_SECTORS_FLUSHED            =$0000005d;
 CB_PERF_SEL_FC_CACHE_DIRTY_SECTORS_FLUSHED      =$0000005e;
 CB_PERF_SEL_CC_CACHE_HIT                        =$0000005f;
 CB_PERF_SEL_CC_CACHE_TAG_MISS                   =$00000060;
 CB_PERF_SEL_CC_CACHE_SECTOR_MISS                =$00000061;
 CB_PERF_SEL_CC_CACHE_REEVICTION_STALL           =$00000062;
 CB_PERF_SEL_CC_CACHE_REPLACE_PENDING_EVICT_STALL=$00000064;
 CB_PERF_SEL_CC_CACHE_READ_OUTPUT_STALL          =$00000066;
 CB_PERF_SEL_CC_CACHE_WRITE_OUTPUT_STALL         =$00000067;
 CB_PERF_SEL_CC_CACHE_ACK_OUTPUT_STALL           =$00000068;
 CB_PERF_SEL_CC_CACHE_STALL                      =$00000069;
 CB_PERF_SEL_CC_CACHE_FLUSH                      =$0000006a;
 CB_PERF_SEL_CC_CACHE_TAGS_FLUSHED               =$0000006b;
 CB_PERF_SEL_CC_CACHE_SECTORS_FLUSHED            =$0000006c;
 CB_PERF_SEL_CC_CACHE_DIRTY_SECTORS_FLUSHED      =$0000006d;
 CB_PERF_SEL_CC_CACHE_WA_TO_RMW_CONVERSION       =$0000006e;
 CB_PERF_SEL_CC_CACHE_READS_SAVED_DUE_TO_DCC     =$0000006f;
 CB_PERF_SEL_CB_TAP_WRREQ_VALID_READY            =$00000070;
 CB_PERF_SEL_CB_TAP_WRREQ_VALID_READYB           =$00000071;
 CB_PERF_SEL_CB_TAP_WRREQ_VALIDB_READY           =$00000072;
 CB_PERF_SEL_CB_TAP_WRREQ_VALIDB_READYB          =$00000073;
 CB_PERF_SEL_CM_MC_WRITE_REQUEST                 =$00000074;
 CB_PERF_SEL_FC_MC_WRITE_REQUEST                 =$00000075;
 CB_PERF_SEL_CC_MC_WRITE_REQUEST                 =$00000076;
 CB_PERF_SEL_CM_MC_WRITE_REQUESTS_IN_FLIGHT      =$00000077;
 CB_PERF_SEL_FC_MC_WRITE_REQUESTS_IN_FLIGHT      =$00000078;
 CB_PERF_SEL_CC_MC_WRITE_REQUESTS_IN_FLIGHT      =$00000079;
 CB_PERF_SEL_CB_TAP_RDREQ_VALID_READY            =$0000007a;
 CB_PERF_SEL_CB_TAP_RDREQ_VALID_READYB           =$0000007b;
 CB_PERF_SEL_CB_TAP_RDREQ_VALIDB_READY           =$0000007c;
 CB_PERF_SEL_CB_TAP_RDREQ_VALIDB_READYB          =$0000007d;
 CB_PERF_SEL_CM_MC_READ_REQUEST                  =$0000007e;
 CB_PERF_SEL_FC_MC_READ_REQUEST                  =$0000007f;
 CB_PERF_SEL_CC_MC_READ_REQUEST                  =$00000080;
 CB_PERF_SEL_CM_MC_READ_REQUESTS_IN_FLIGHT       =$00000081;
 CB_PERF_SEL_FC_MC_READ_REQUESTS_IN_FLIGHT       =$00000082;
 CB_PERF_SEL_CC_MC_READ_REQUESTS_IN_FLIGHT       =$00000083;
 CB_PERF_SEL_CM_TQ_FULL                          =$00000084;
 CB_PERF_SEL_CM_TQ_FIFO_TILE_RESIDENCY_STALL     =$00000085;
 CB_PERF_SEL_FC_QUAD_RDLAT_FIFO_FULL             =$00000086;
 CB_PERF_SEL_FC_TILE_RDLAT_FIFO_FULL             =$00000087;
 CB_PERF_SEL_FC_RDLAT_FIFO_QUAD_RESIDENCY_STALL  =$00000088;
 CB_PERF_SEL_FOP_FMASK_RAW_STALL                 =$00000089;
 CB_PERF_SEL_FOP_FMASK_BYPASS_STALL              =$0000008a;
 CB_PERF_SEL_CC_SF_FULL                          =$0000008b;
 CB_PERF_SEL_CC_RB_FULL                          =$0000008c;
 CB_PERF_SEL_CC_EVENFIFO_QUAD_RESIDENCY_STALL    =$0000008d;
 CB_PERF_SEL_CC_ODDFIFO_QUAD_RESIDENCY_STALL     =$0000008e;
 CB_PERF_SEL_BLENDER_RAW_HAZARD_STALL            =$0000008f;
 CB_PERF_SEL_EVENT                               =$00000090;
 CB_PERF_SEL_EVENT_CACHE_FLUSH_TS                =$00000091;
 CB_PERF_SEL_EVENT_CONTEXT_DONE                  =$00000092;
 CB_PERF_SEL_EVENT_CACHE_FLUSH                   =$00000093;
 CB_PERF_SEL_EVENT_CACHE_FLUSH_AND_INV_TS_EVENT  =$00000094;
 CB_PERF_SEL_EVENT_CACHE_FLUSH_AND_INV_EVENT     =$00000095;
 CB_PERF_SEL_EVENT_FLUSH_AND_INV_CB_DATA_TS      =$00000096;
 CB_PERF_SEL_EVENT_FLUSH_AND_INV_CB_META         =$00000097;
 CB_PERF_SEL_CC_SURFACE_SYNC                     =$00000098;
 CB_PERF_SEL_CMASK_READ_DATA_0xC                 =$00000099;
 CB_PERF_SEL_CMASK_READ_DATA_0xD                 =$0000009a;
 CB_PERF_SEL_CMASK_READ_DATA_0xE                 =$0000009b;
 CB_PERF_SEL_CMASK_READ_DATA_0xF                 =$0000009c;
 CB_PERF_SEL_CMASK_WRITE_DATA_0xC                =$0000009d;
 CB_PERF_SEL_CMASK_WRITE_DATA_0xD                =$0000009e;
 CB_PERF_SEL_CMASK_WRITE_DATA_0xE                =$0000009f;
 CB_PERF_SEL_CMASK_WRITE_DATA_0xF                =$000000a0;
 CB_PERF_SEL_TWO_PROBE_QUAD_FRAGMENT             =$000000a1;
 CB_PERF_SEL_EXPORT_32_ABGR_QUAD_FRAGMENT        =$000000a2;
 CB_PERF_SEL_DUAL_SOURCE_COLOR_QUAD_FRAGMENT     =$000000a3;
 CB_PERF_SEL_QUAD_HAS_1_FRAGMENT_BEFORE_UPDATE   =$000000a4;
 CB_PERF_SEL_QUAD_HAS_2_FRAGMENTS_BEFORE_UPDATE  =$000000a5;
 CB_PERF_SEL_QUAD_HAS_3_FRAGMENTS_BEFORE_UPDATE  =$000000a6;
 CB_PERF_SEL_QUAD_HAS_4_FRAGMENTS_BEFORE_UPDATE  =$000000a7;
 CB_PERF_SEL_QUAD_HAS_5_FRAGMENTS_BEFORE_UPDATE  =$000000a8;
 CB_PERF_SEL_QUAD_HAS_6_FRAGMENTS_BEFORE_UPDATE  =$000000a9;
 CB_PERF_SEL_QUAD_HAS_7_FRAGMENTS_BEFORE_UPDATE  =$000000aa;
 CB_PERF_SEL_QUAD_HAS_8_FRAGMENTS_BEFORE_UPDATE  =$000000ab;
 CB_PERF_SEL_QUAD_HAS_1_FRAGMENT_AFTER_UPDATE    =$000000ac;
 CB_PERF_SEL_QUAD_HAS_2_FRAGMENTS_AFTER_UPDATE   =$000000ad;
 CB_PERF_SEL_QUAD_HAS_3_FRAGMENTS_AFTER_UPDATE   =$000000ae;
 CB_PERF_SEL_QUAD_HAS_4_FRAGMENTS_AFTER_UPDATE   =$000000af;
 CB_PERF_SEL_QUAD_HAS_5_FRAGMENTS_AFTER_UPDATE   =$000000b0;
 CB_PERF_SEL_QUAD_HAS_6_FRAGMENTS_AFTER_UPDATE   =$000000b1;
 CB_PERF_SEL_QUAD_HAS_7_FRAGMENTS_AFTER_UPDATE   =$000000b2;
 CB_PERF_SEL_QUAD_HAS_8_FRAGMENTS_AFTER_UPDATE   =$000000b3;
 CB_PERF_SEL_QUAD_ADDED_1_FRAGMENT               =$000000b4;
 CB_PERF_SEL_QUAD_ADDED_2_FRAGMENTS              =$000000b5;
 CB_PERF_SEL_QUAD_ADDED_3_FRAGMENTS              =$000000b6;
 CB_PERF_SEL_QUAD_ADDED_4_FRAGMENTS              =$000000b7;
 CB_PERF_SEL_QUAD_ADDED_5_FRAGMENTS              =$000000b8;
 CB_PERF_SEL_QUAD_ADDED_6_FRAGMENTS              =$000000b9;
 CB_PERF_SEL_QUAD_ADDED_7_FRAGMENTS              =$000000ba;
 CB_PERF_SEL_QUAD_REMOVED_1_FRAGMENT             =$000000bb;
 CB_PERF_SEL_QUAD_REMOVED_2_FRAGMENTS            =$000000bc;
 CB_PERF_SEL_QUAD_REMOVED_3_FRAGMENTS            =$000000bd;
 CB_PERF_SEL_QUAD_REMOVED_4_FRAGMENTS            =$000000be;
 CB_PERF_SEL_QUAD_REMOVED_5_FRAGMENTS            =$000000bf;
 CB_PERF_SEL_QUAD_REMOVED_6_FRAGMENTS            =$000000c0;
 CB_PERF_SEL_QUAD_REMOVED_7_FRAGMENTS            =$000000c1;
 CB_PERF_SEL_QUAD_READS_FRAGMENT_0               =$000000c2;
 CB_PERF_SEL_QUAD_READS_FRAGMENT_1               =$000000c3;
 CB_PERF_SEL_QUAD_READS_FRAGMENT_2               =$000000c4;
 CB_PERF_SEL_QUAD_READS_FRAGMENT_3               =$000000c5;
 CB_PERF_SEL_QUAD_READS_FRAGMENT_4               =$000000c6;
 CB_PERF_SEL_QUAD_READS_FRAGMENT_5               =$000000c7;
 CB_PERF_SEL_QUAD_READS_FRAGMENT_6               =$000000c8;
 CB_PERF_SEL_QUAD_READS_FRAGMENT_7               =$000000c9;
 CB_PERF_SEL_QUAD_WRITES_FRAGMENT_0              =$000000ca;
 CB_PERF_SEL_QUAD_WRITES_FRAGMENT_1              =$000000cb;
 CB_PERF_SEL_QUAD_WRITES_FRAGMENT_2              =$000000cc;
 CB_PERF_SEL_QUAD_WRITES_FRAGMENT_3              =$000000cd;
 CB_PERF_SEL_QUAD_WRITES_FRAGMENT_4              =$000000ce;
 CB_PERF_SEL_QUAD_WRITES_FRAGMENT_5              =$000000cf;
 CB_PERF_SEL_QUAD_WRITES_FRAGMENT_6              =$000000d0;
 CB_PERF_SEL_QUAD_WRITES_FRAGMENT_7              =$000000d1;
 CB_PERF_SEL_QUAD_BLEND_OPT_DONT_READ_DST        =$000000d2;
 CB_PERF_SEL_QUAD_BLEND_OPT_BLEND_BYPASS         =$000000d3;
 CB_PERF_SEL_QUAD_BLEND_OPT_DISCARD_PIXELS       =$000000d4;
 CB_PERF_SEL_QUAD_COULD_HAVE_BEEN_DISCARDED      =$000000d7;
 CB_PERF_SEL_BLEND_OPT_PIXELS_RESULT_EQ_DEST     =$000000d8;
 CB_PERF_SEL_DRAWN_BUSY                          =$000000d9;
 CB_PERF_SEL_TILE_TO_CMR_REGION_BUSY             =$000000da;
 CB_PERF_SEL_CMR_TO_FCR_REGION_BUSY              =$000000db;
 CB_PERF_SEL_FCR_TO_CCR_REGION_BUSY              =$000000dc;
 CB_PERF_SEL_CCR_TO_CCW_REGION_BUSY              =$000000dd;
 CB_PERF_SEL_FC_SEQUENCER_CLEAR                  =$000000df;
 CB_PERF_SEL_FC_SEQUENCER_ELIMINATE_FAST_CLEAR   =$000000e0;
 CB_PERF_SEL_FC_SEQUENCER_FMASK_DECOMPRESS       =$000000e1;
 CB_PERF_SEL_FC_KEYID_RDLAT_FIFO_FULL            =$000000e3;
 CB_PERF_SEL_FC_DOC_IS_STALLED                   =$000000e4;
 CB_PERF_SEL_FC_DOC_MRTS_NOT_COMBINED            =$000000e5;
 CB_PERF_SEL_FC_DOC_MRTS_COMBINED                =$000000e6;
 CB_PERF_SEL_FC_DOC_QTILE_CAM_MISS               =$000000e7;
 CB_PERF_SEL_FC_DOC_QTILE_CAM_HIT                =$000000e8;
 CB_PERF_SEL_FC_DOC_CLINE_CAM_MISS               =$000000e9;
 CB_PERF_SEL_FC_DOC_CLINE_CAM_HIT                =$000000ea;
 CB_PERF_SEL_FC_DOC_QUAD_PTR_FIFO_IS_FULL        =$000000eb;
 CB_PERF_SEL_FC_DOC_OVERWROTE_1_SECTOR           =$000000ec;
 CB_PERF_SEL_FC_DOC_OVERWROTE_2_SECTORS          =$000000ed;
 CB_PERF_SEL_FC_DOC_OVERWROTE_3_SECTORS          =$000000ee;
 CB_PERF_SEL_FC_DOC_OVERWROTE_4_SECTORS          =$000000ef;
 CB_PERF_SEL_FC_DOC_TOTAL_OVERWRITTEN_SECTORS    =$000000f0;
 CB_PERF_SEL_FC_DCC_CACHE_HIT                    =$000000f1;
 CB_PERF_SEL_FC_DCC_CACHE_TAG_MISS               =$000000f2;
 CB_PERF_SEL_FC_DCC_CACHE_SECTOR_MISS            =$000000f3;
 CB_PERF_SEL_FC_DCC_CACHE_REEVICTION_STALL       =$000000f4;
 CB_PERF_SEL_FC_DCC_CACHE_READ_OUTPUT_STALL      =$000000f8;
 CB_PERF_SEL_FC_DCC_CACHE_WRITE_OUTPUT_STALL     =$000000f9;
 CB_PERF_SEL_FC_DCC_CACHE_ACK_OUTPUT_STALL       =$000000fa;
 CB_PERF_SEL_FC_DCC_CACHE_STALL                  =$000000fb;
 CB_PERF_SEL_FC_DCC_CACHE_FLUSH                  =$000000fc;
 CB_PERF_SEL_FC_DCC_CACHE_TAGS_FLUSHED           =$000000fd;
 CB_PERF_SEL_FC_DCC_CACHE_SECTORS_FLUSHED        =$000000fe;
 CB_PERF_SEL_FC_DCC_CACHE_DIRTY_SECTORS_FLUSHED  =$000000ff;
 CB_PERF_SEL_CC_DCC_BEYOND_TILE_SPLIT            =$00000100;
 CB_PERF_SEL_FC_MC_DCC_WRITE_REQUEST             =$00000101;
 CB_PERF_SEL_FC_MC_DCC_WRITE_REQUESTS_IN_FLIGHT  =$00000102;
 CB_PERF_SEL_FC_MC_DCC_READ_REQUEST              =$00000103;
 CB_PERF_SEL_FC_MC_DCC_READ_REQUESTS_IN_FLIGHT   =$00000104;
 CB_PERF_SEL_CC_DCC_RDREQ_STALL                  =$00000105;
 CB_PERF_SEL_CC_DCC_DECOMPRESS_TIDS_IN           =$00000106;
 CB_PERF_SEL_CC_DCC_DECOMPRESS_TIDS_OUT          =$00000107;
 CB_PERF_SEL_CC_DCC_COMPRESS_TIDS_IN             =$00000108;
 CB_PERF_SEL_CC_DCC_COMPRESS_TIDS_OUT            =$00000109;
 CB_PERF_SEL_FC_DCC_KEY_VALUE__CLEAR             =$0000010a;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__4_BLOCKS__2TO1    =$0000010b;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_4TO1      =$0000011a;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_4TO2      =$0000011f;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__2BLOCKS_4TO3      =$00000124;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__INV0 =$0000015c;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__INV1 =$0000015d;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__INV0 =$00000163;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO2__INV1 =$00000164;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__INV0__1BLOCK_2TO1 =$0000016b;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__INV1__1BLOCK_2TO1 =$0000016c;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__INV0__1BLOCK_2TO2 =$00000172;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__INV1__1BLOCK_2TO2 =$00000173;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO1       =$00000174;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO2       =$00000175;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO3       =$00000176;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO4       =$00000177;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO5       =$00000178;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO6       =$00000179;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_8TO7       =$0000017a;
 CB_PERF_SEL_CC_DCC_KEY_VALUE__UNCOMPRESSED      =$0000017b;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_2TO1          =$0000017c;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_4TO1          =$0000017d;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_4TO2          =$0000017e;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_4TO3          =$0000017f;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO1          =$00000180;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO2          =$00000181;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO3          =$00000182;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO4          =$00000183;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_6TO5          =$00000184;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO1          =$00000185;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO2          =$00000186;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO3          =$00000187;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO4          =$00000188;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO5          =$00000189;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO6          =$0000018a;
 CB_PERF_SEL_CC_DCC_COMPRESS_RATIO_8TO7          =$0000018b;
 // CHUB_TC_RET_CREDITS_ENUM
 CHUB_TC_RET_CREDITS                             =$00000020;
 // CLKGATE_BASE_MODE
 MULT_8                                          =$00000000;
 MULT_16                                         =$00000001;
 // CLKGATE_SM_MODE
 ON_SEQ                                          =$00000000;
 OFF_SEQ                                         =$00000001;
 PROG_SEQ                                        =$00000002;
 READ_SEQ                                        =$00000003;
 SM_MODE_RESERVED                                =$00000004;
 // CPC_PERFCOUNT_SEL
 CPC_PERF_SEL_ALWAYS_COUNT                       =$00000000;
 CPC_PERF_SEL_RCIU_STALL_WAIT_ON_FREE            =$00000001;
 CPC_PERF_SEL_RCIU_STALL_PRIV_VIOLATION          =$00000002;
 CPC_PERF_SEL_MIU_STALL_ON_RDREQ_FREE            =$00000003;
 CPC_PERF_SEL_MIU_STALL_ON_WRREQ_FREE            =$00000004;
 CPC_PERF_SEL_TCIU_STALL_WAIT_ON_FREE            =$00000005;
 CPC_PERF_SEL_ME1_STALL_WAIT_ON_RCIU_READY       =$00000006;
 CPC_PERF_SEL_ME1_STALL_WAIT_ON_RCIU_READY_PERF  =$00000007;
 CPC_PERF_SEL_ME1_STALL_WAIT_ON_RCIU_READ        =$00000008;
 CPC_PERF_SEL_ME1_STALL_WAIT_ON_MIU_READ         =$00000009;
 CPC_PERF_SEL_ME1_STALL_WAIT_ON_MIU_WRITE        =$0000000a;
 CPC_PERF_SEL_ME1_STALL_ON_DATA_FROM_ROQ         =$0000000b;
 CPC_PERF_SEL_ME1_STALL_ON_DATA_FROM_ROQ_PERF    =$0000000c;
 CPC_PERF_SEL_ME1_BUSY_FOR_PACKET_DECODE         =$0000000d;
 CPC_PERF_SEL_ME2_STALL_WAIT_ON_RCIU_READY       =$0000000e;
 CPC_PERF_SEL_ME2_STALL_WAIT_ON_RCIU_READY_PERF  =$0000000f;
 CPC_PERF_SEL_ME2_STALL_WAIT_ON_RCIU_READ        =$00000010;
 CPC_PERF_SEL_ME2_STALL_WAIT_ON_MIU_READ         =$00000011;
 CPC_PERF_SEL_ME2_STALL_WAIT_ON_MIU_WRITE        =$00000012;
 CPC_PERF_SEL_ME2_STALL_ON_DATA_FROM_ROQ         =$00000013;
 CPC_PERF_SEL_ME2_STALL_ON_DATA_FROM_ROQ_PERF    =$00000014;
 CPC_PERF_SEL_ME2_BUSY_FOR_PACKET_DECODE         =$00000015;
 CPC_PERF_SEL_ATCL2IU_STALL_WAIT_ON_FREE         =$00000016;
 CPC_PERF_SEL_ATCL2IU_STALL_WAIT_ON_TAGS         =$00000017;
 CPC_PERF_SEL_ATCL1_STALL_ON_TRANSLATION         =$00000018;
 // CPF_PERFCOUNT_SEL
 CPF_PERF_SEL_ALWAYS_COUNT                       =$00000000;
 CPF_PERF_SEL_MIU_STALLED_WAITING_RDREQ_FREE     =$00000001;
 CPF_PERF_SEL_TCIU_STALLED_WAITING_ON_FREE       =$00000002;
 CPF_PERF_SEL_TCIU_STALLED_WAITING_ON_TAGS       =$00000003;
 CPF_PERF_SEL_CSF_BUSY_FOR_FETCHING_RING         =$00000004;
 CPF_PERF_SEL_CSF_BUSY_FOR_FETCHING_IB1          =$00000005;
 CPF_PERF_SEL_CSF_BUSY_FOR_FETCHING_IB2          =$00000006;
 CPF_PERF_SEL_CSF_BUSY_FOR_FECTHINC_STATE        =$00000007;
 CPF_PERF_SEL_MIU_BUSY_FOR_OUTSTANDING_TAGS      =$00000008;
 CPF_PERF_SEL_CSF_RTS_MIU_NOT_RTR                =$00000009;
 CPF_PERF_SEL_CSF_STATE_FIFO_NOT_RTR             =$0000000a;
 CPF_PERF_SEL_CSF_FETCHING_CMD_BUFFERS           =$0000000b;
 CPF_PERF_SEL_GRBM_DWORDS_SENT                   =$0000000c;
 CPF_PERF_SEL_DYNAMIC_CLOCK_VALID                =$0000000d;
 CPF_PERF_SEL_REGISTER_CLOCK_VALID               =$0000000e;
 CPF_PERF_SEL_MIU_WRITE_REQUEST_SEND             =$0000000f;
 CPF_PERF_SEL_MIU_READ_REQUEST_SEND              =$00000010;
 CPF_PERF_SEL_ATCL2IU_STALL_WAIT_ON_FREE         =$00000011;
 CPF_PERF_SEL_ATCL2IU_STALL_WAIT_ON_TAGS         =$00000012;
 CPF_PERF_SEL_ATCL1_STALL_ON_TRANSLATION         =$00000013;
 // CPG_PERFCOUNT_SEL
 CPG_PERF_SEL_ALWAYS_COUNT                       =$00000000;
 CPG_PERF_SEL_RBIU_FIFO_FULL                     =$00000001;
 CPG_PERF_SEL_CSF_RTS_BUT_MIU_NOT_RTR            =$00000002;
 CPG_PERF_SEL_CSF_ST_BASE_SIZE_FIFO_FULL         =$00000003;
 CPG_PERF_SEL_CP_GRBM_DWORDS_SENT                =$00000004;
 CPG_PERF_SEL_ME_PARSER_BUSY                     =$00000005;
 CPG_PERF_SEL_COUNT_TYPE0_PACKETS                =$00000006;
 CPG_PERF_SEL_COUNT_TYPE3_PACKETS                =$00000007;
 CPG_PERF_SEL_CSF_FETCHING_CMD_BUFFERS           =$00000008;
 CPG_PERF_SEL_CP_GRBM_OUT_OF_CREDITS             =$00000009;
 CPG_PERF_SEL_CP_PFP_GRBM_OUT_OF_CREDITS         =$0000000a;
 CPG_PERF_SEL_CP_GDS_GRBM_OUT_OF_CREDITS         =$0000000b;
 CPG_PERF_SEL_RCIU_STALLED_ON_ME_READ            =$0000000c;
 CPG_PERF_SEL_RCIU_STALLED_ON_DMA_READ           =$0000000d;
 CPG_PERF_SEL_SSU_STALLED_ON_ACTIVE_CNTX         =$0000000e;
 CPG_PERF_SEL_SSU_STALLED_ON_CLEAN_SIGNALS       =$0000000f;
 CPG_PERF_SEL_QU_STALLED_ON_EOP_DONE_PULSE       =$00000010;
 CPG_PERF_SEL_QU_STALLED_ON_EOP_DONE_WR_CONFIRM  =$00000011;
 CPG_PERF_SEL_PFP_STALLED_ON_CSF_READY           =$00000012;
 CPG_PERF_SEL_PFP_STALLED_ON_MEQ_READY           =$00000013;
 CPG_PERF_SEL_PFP_STALLED_ON_RCIU_READY          =$00000014;
 CPG_PERF_SEL_PFP_STALLED_FOR_DATA_FROM_ROQ      =$00000015;
 CPG_PERF_SEL_ME_STALLED_FOR_DATA_FROM_PFP       =$00000016;
 CPG_PERF_SEL_ME_STALLED_FOR_DATA_FROM_STQ       =$00000017;
 CPG_PERF_SEL_ME_STALLED_ON_NO_AVAIL_GFX_CNTX    =$00000018;
 CPG_PERF_SEL_ME_STALLED_WRITING_TO_RCIU         =$00000019;
 CPG_PERF_SEL_ME_STALLED_WRITING_CONSTANTS       =$0000001a;
 CPG_PERF_SEL_ME_STALLED_ON_PARTIAL_FLUSH        =$0000001b;
 CPG_PERF_SEL_ME_WAIT_ON_CE_COUNTER              =$0000001c;
 CPG_PERF_SEL_ME_WAIT_ON_AVAIL_BUFFER            =$0000001d;
 CPG_PERF_SEL_SEMAPHORE_BUSY_POLLING_FOR_PASS    =$0000001e;
 CPG_PERF_SEL_LOAD_STALLED_ON_SET_COHERENCY      =$0000001f;
 CPG_PERF_SEL_DYNAMIC_CLK_VALID                  =$00000020;
 CPG_PERF_SEL_REGISTER_CLK_VALID                 =$00000021;
 CPG_PERF_SEL_MIU_WRITE_REQUEST_SENT             =$00000022;
 CPG_PERF_SEL_MIU_READ_REQUEST_SENT              =$00000023;
 CPG_PERF_SEL_CE_STALL_RAM_DUMP                  =$00000024;
 CPG_PERF_SEL_CE_STALL_RAM_WRITE                 =$00000025;
 CPG_PERF_SEL_CE_STALL_ON_INC_FIFO               =$00000026;
 CPG_PERF_SEL_CE_STALL_ON_WR_RAM_FIFO            =$00000027;
 CPG_PERF_SEL_CE_STALL_ON_DATA_FROM_MIU          =$00000028;
 CPG_PERF_SEL_CE_STALL_ON_DATA_FROM_ROQ          =$00000029;
 CPG_PERF_SEL_CE_STALL_ON_CE_BUFFER_FLAG         =$0000002a;
 CPG_PERF_SEL_CE_STALL_ON_DE_COUNTER             =$0000002b;
 CPG_PERF_SEL_TCIU_STALL_WAIT_ON_FREE            =$0000002c;
 CPG_PERF_SEL_TCIU_STALL_WAIT_ON_TAGS            =$0000002d;
 CPG_PERF_SEL_ATCL2IU_STALL_WAIT_ON_FREE         =$0000002e;
 CPG_PERF_SEL_ATCL2IU_STALL_WAIT_ON_TAGS         =$0000002f;
 CPG_PERF_SEL_ATCL1_STALL_ON_TRANSLATION         =$00000030;
 // CP_ALPHA_TAG_RAM_SEL
 CPG_TAG_RAM                                     =$00000000;
 CPC_TAG_RAM                                     =$00000001;
 CPF_TAG_RAM                                     =$00000002;
 RSV_TAG_RAM                                     =$00000003;
 // CP_ME_ID
 ME_ID0                                          =$00000000;
 ME_ID1                                          =$00000001;
 ME_ID2                                          =$00000002;
 ME_ID3                                          =$00000003;
 // CP_PERFMON_ENABLE_MODE
 CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT             =$00000000;
 CP_PERFMON_ENABLE_MODE_RESERVED_1               =$00000001;
 CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE       =$00000002;
 CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE      =$00000003;
 // CP_PERFMON_STATE
 CP_PERFMON_STATE_DISABLE_AND_RESET              =$00000000;
 CP_PERFMON_STATE_START_COUNTING                 =$00000001;
 CP_PERFMON_STATE_STOP_COUNTING                  =$00000002;
 CP_PERFMON_STATE_RESERVED_3                     =$00000003;
 CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM      =$00000004;
 CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM         =$00000005;
 // CP_PIPE_ID
 PIPE_ID0                                        =$00000000;
 PIPE_ID1                                        =$00000001;
 PIPE_ID2                                        =$00000002;
 PIPE_ID3                                        =$00000003;
 // CP_RING_ID
 RINGID0                                         =$00000000;
 RINGID1                                         =$00000001;
 RINGID2                                         =$00000002;
 RINGID3                                         =$00000003;
 // CSDATA_TYPE
 CSDATA_TYPE_TG                                  =$00000000;
 CSDATA_TYPE_STATE                               =$00000001;
 CSDATA_TYPE_EVENT                               =$00000002;
 CSDATA_TYPE_PRIVATE                             =$00000003;
 // CmaskCode
 CMASK_CLR00_F0                                  =$00000000;
 CMASK_CLR00_F1                                  =$00000001;
 CMASK_CLR00_F2                                  =$00000002;
 CMASK_CLR00_FX                                  =$00000003;
 CMASK_CLR01_F0                                  =$00000004;
 CMASK_CLR01_F1                                  =$00000005;
 CMASK_CLR01_F2                                  =$00000006;
 CMASK_CLR01_FX                                  =$00000007;
 CMASK_CLR10_F0                                  =$00000008;
 CMASK_CLR10_F1                                  =$00000009;
 CMASK_CLR10_F2                                  =$0000000a;
 CMASK_CLR10_FX                                  =$0000000b;
 CMASK_CLR11_F0                                  =$0000000c;
 CMASK_CLR11_F1                                  =$0000000d;
 CMASK_CLR11_F2                                  =$0000000e;
 CMASK_CLR11_FX                                  =$0000000f;
 // CmaskMode
 CMASK_CLEAR_NONE                                =$00000000;
 CMASK_CLEAR_ONE                                 =$00000001;
 CMASK_CLEAR_ALL                                 =$00000002;
 CMASK_ANY_EXPANDED                              =$00000003;
 CMASK_ALPHA0_FRAG1                              =$00000004;
 CMASK_ALPHA0_FRAG2                              =$00000005;
 CMASK_ALPHA0_FRAG4                              =$00000006;
 CMASK_ALPHA0_FRAGS                              =$00000007;
 CMASK_ALPHA1_FRAG1                              =$00000008;
 CMASK_ALPHA1_FRAG2                              =$00000009;
 CMASK_ALPHA1_FRAG4                              =$0000000a;
 CMASK_ALPHA1_FRAGS                              =$0000000b;
 CMASK_ALPHAX_FRAG1                              =$0000000c;
 CMASK_ALPHAX_FRAG2                              =$0000000d;
 CMASK_ALPHAX_FRAG4                              =$0000000e;
 CMASK_ALPHAX_FRAGS                              =$0000000f;
 // ColorArray
 ARRAY_2D_ALT_COLOR                              =$00000000;
 ARRAY_2D_COLOR                                  =$00000001;
 ARRAY_3D_SLICE_COLOR                            =$00000003;
 // ColorFormat
 COLOR_INVALID                                   =$00000000;
 COLOR_8                                         =$00000001;
 COLOR_16                                        =$00000002;
 COLOR_8_8                                       =$00000003;
 COLOR_32                                        =$00000004;
 COLOR_16_16                                     =$00000005;
 COLOR_10_11_11                                  =$00000006;
 COLOR_11_11_10                                  =$00000007;
 COLOR_10_10_10_2                                =$00000008;
 COLOR_2_10_10_10                                =$00000009;
 COLOR_8_8_8_8                                   =$0000000a;
 COLOR_32_32                                     =$0000000b;
 COLOR_16_16_16_16                               =$0000000c;
 COLOR_RESERVED_13                               =$0000000d;
 COLOR_32_32_32_32                               =$0000000e;
 COLOR_RESERVED_15                               =$0000000f;
 COLOR_5_6_5                                     =$00000010;
 COLOR_1_5_5_5                                   =$00000011;
 COLOR_5_5_5_1                                   =$00000012;
 COLOR_4_4_4_4                                   =$00000013;
 COLOR_8_24                                      =$00000014;
 COLOR_24_8                                      =$00000015;
 COLOR_X24_8_32_FLOAT                            =$00000016;
 COLOR_RESERVED_23                               =$00000017;
 // CombFunc
 COMB_DST_PLUS_SRC                               =$00000000;
 COMB_SRC_MINUS_DST                              =$00000001;
 COMB_MIN_DST_SRC                                =$00000002;
 COMB_MAX_DST_SRC                                =$00000003;
 COMB_DST_MINUS_SRC                              =$00000004;
 // CompareFrag
 FRAG_NEVER                                      =$00000000;
 FRAG_LESS                                       =$00000001;
 FRAG_EQUAL                                      =$00000002;
 FRAG_LEQUAL                                     =$00000003;
 FRAG_GREATER                                    =$00000004;
 FRAG_NOTEQUAL                                   =$00000005;
 FRAG_GEQUAL                                     =$00000006;
 FRAG_ALWAYS                                     =$00000007;
 // CompareRef
 REF_NEVER                                       =$00000000;
 REF_LESS                                        =$00000001;
 REF_EQUAL                                       =$00000002;
 REF_LEQUAL                                      =$00000003;
 REF_GREATER                                     =$00000004;
 REF_NOTEQUAL                                    =$00000005;
 REF_GEQUAL                                      =$00000006;
 REF_ALWAYS                                      =$00000007;
 // ConservativeZExport
 EXPORT_ANY_Z                                    =$00000000;
 EXPORT_LESS_THAN_Z                              =$00000001;
 EXPORT_GREATER_THAN_Z                           =$00000002;
 EXPORT_RESERVED                                 =$00000003;
 // DbPSLControl
 PSLC_AUTO                                       =$00000000;
 PSLC_ON_HANG_ONLY                               =$00000001;
 PSLC_ASAP                                       =$00000002;
 PSLC_COUNTDOWN                                  =$00000003;
 // DebugBlockId
 DBG_CLIENT_BLKID_RESERVED                       =$00000000;
 DBG_BLOCK_ID_RESERVED                           =$00000000;
 DBG_CLIENT_BLKID_dbg                            =$00000001;
 DBG_BLOCK_ID_DBG                                =$00000001;
 DBG_CLIENT_BLKID_scf2                           =$00000002;
 DBG_BLOCK_ID_VMC                                =$00000002;
 DBG_CLIENT_BLKID_mcd5_0                         =$00000003;
 DBG_BLOCK_ID_PDMA                               =$00000003;
 DBG_CLIENT_BLKID_mcd5_1                         =$00000004;
 DBG_BLOCK_ID_CG                                 =$00000004;
 DBG_CLIENT_BLKID_mcd6_0                         =$00000005;
 DBG_BLOCK_ID_SRBM                               =$00000005;
 DBG_CLIENT_BLKID_mcd6_1                         =$00000006;
 DBG_BLOCK_ID_GRBM                               =$00000006;
 DBG_CLIENT_BLKID_mcd7_0                         =$00000007;
 DBG_BLOCK_ID_RLC                                =$00000007;
 DBG_CLIENT_BLKID_mcd7_1                         =$00000008;
 DBG_BLOCK_ID_CSC                                =$00000008;
 DBG_CLIENT_BLKID_vmc                            =$00000009;
 DBG_BLOCK_ID_SEM                                =$00000009;
 DBG_CLIENT_BLKID_sx30                           =$0000000a;
 DBG_BLOCK_ID_IH                                 =$0000000a;
 DBG_CLIENT_BLKID_mcd2_0                         =$0000000b;
 DBG_BLOCK_ID_SC                                 =$0000000b;
 DBG_CLIENT_BLKID_mcd2_1                         =$0000000c;
 DBG_BLOCK_ID_SQ                                 =$0000000c;
 DBG_CLIENT_BLKID_bci1                           =$0000000d;
 DBG_BLOCK_ID_AVP                                =$0000000d;
 DBG_CLIENT_BLKID_xdma_dbg_client_wrapper        =$0000000e;
 DBG_BLOCK_ID_GMCON                              =$0000000e;
 DBG_CLIENT_BLKID_mcc0                           =$0000000f;
 DBG_BLOCK_ID_SMU                                =$0000000f;
 DBG_CLIENT_BLKID_uvdf_0                         =$00000010;
 DBG_CLIENT_BLKID_uvdf_1                         =$00000011;
 DBG_CLIENT_BLKID_uvdf_2                         =$00000012;
 DBG_BLOCK_ID_SPIM                               =$00000012;
 DBG_CLIENT_BLKID_bci0                           =$00000013;
 DBG_BLOCK_ID_GDS                                =$00000013;
 DBG_CLIENT_BLKID_vcec0_0                        =$00000014;
 DBG_BLOCK_ID_SPIS                               =$00000014;
 DBG_CLIENT_BLKID_cb100                          =$00000015;
 DBG_BLOCK_ID_UNUSED0                            =$00000015;
 DBG_CLIENT_BLKID_cb001                          =$00000016;
 DBG_BLOCK_ID_PA0                                =$00000016;
 DBG_CLIENT_BLKID_cb002                          =$00000017;
 DBG_BLOCK_ID_PA1                                =$00000017;
 DBG_CLIENT_BLKID_cb003                          =$00000018;
 DBG_BLOCK_ID_CP0                                =$00000018;
 DBG_CLIENT_BLKID_mcd4_0                         =$00000019;
 DBG_BLOCK_ID_CP1                                =$00000019;
 DBG_CLIENT_BLKID_mcd4_1                         =$0000001a;
 DBG_BLOCK_ID_CP2                                =$0000001a;
 DBG_CLIENT_BLKID_tmonw00                        =$0000001b;
 DBG_BLOCK_ID_UNUSED1                            =$0000001b;
 DBG_CLIENT_BLKID_cb101                          =$0000001c;
 DBG_BLOCK_ID_UVDU                               =$0000001c;
 DBG_CLIENT_BLKID_cb102                          =$0000001d;
 DBG_BLOCK_ID_UVDM                               =$0000001d;
 DBG_CLIENT_BLKID_cb103                          =$0000001e;
 DBG_BLOCK_ID_VCE                                =$0000001e;
 DBG_CLIENT_BLKID_sx10                           =$0000001f;
 DBG_BLOCK_ID_UNUSED2                            =$0000001f;
 DBG_CLIENT_BLKID_cb301                          =$00000020;
 DBG_BLOCK_ID_VGT0                               =$00000020;
 DBG_CLIENT_BLKID_cb302                          =$00000021;
 DBG_BLOCK_ID_VGT1                               =$00000021;
 DBG_CLIENT_BLKID_cb303                          =$00000022;
 DBG_BLOCK_ID_IA                                 =$00000022;
 DBG_CLIENT_BLKID_tmonw01                        =$00000023;
 DBG_BLOCK_ID_UNUSED3                            =$00000023;
 DBG_CLIENT_BLKID_tmonw02                        =$00000024;
 DBG_BLOCK_ID_SCT0                               =$00000024;
 DBG_CLIENT_BLKID_vcea0_0                        =$00000025;
 DBG_BLOCK_ID_SCT1                               =$00000025;
 DBG_CLIENT_BLKID_vcea0_1                        =$00000026;
 DBG_BLOCK_ID_SPM0                               =$00000026;
 DBG_CLIENT_BLKID_vcea0_2                        =$00000027;
 DBG_BLOCK_ID_SPM1                               =$00000027;
 DBG_CLIENT_BLKID_vcea0_3                        =$00000028;
 DBG_BLOCK_ID_TCAA                               =$00000028;
 DBG_CLIENT_BLKID_scf1                           =$00000029;
 DBG_BLOCK_ID_TCAB                               =$00000029;
 DBG_CLIENT_BLKID_sx20                           =$0000002a;
 DBG_BLOCK_ID_TCCA                               =$0000002a;
 DBG_CLIENT_BLKID_spim1                          =$0000002b;
 DBG_BLOCK_ID_TCCB                               =$0000002b;
 DBG_CLIENT_BLKID_scb1                           =$0000002c;
 DBG_BLOCK_ID_MCC0                               =$0000002c;
 DBG_CLIENT_BLKID_pa10                           =$0000002d;
 DBG_BLOCK_ID_MCC1                               =$0000002d;
 DBG_CLIENT_BLKID_pa00                           =$0000002e;
 DBG_BLOCK_ID_MCC2                               =$0000002e;
 DBG_CLIENT_BLKID_gmcon                          =$0000002f;
 DBG_BLOCK_ID_MCC3                               =$0000002f;
 DBG_CLIENT_BLKID_mcb                            =$00000030;
 DBG_BLOCK_ID_SX0                                =$00000030;
 DBG_CLIENT_BLKID_vgt0                           =$00000031;
 DBG_BLOCK_ID_SX1                                =$00000031;
 DBG_CLIENT_BLKID_pc0                            =$00000032;
 DBG_BLOCK_ID_SX2                                =$00000032;
 DBG_CLIENT_BLKID_bci2                           =$00000033;
 DBG_BLOCK_ID_SX3                                =$00000033;
 DBG_CLIENT_BLKID_uvdb_0                         =$00000034;
 DBG_BLOCK_ID_UNUSED4                            =$00000034;
 DBG_CLIENT_BLKID_spim3                          =$00000035;
 DBG_BLOCK_ID_UNUSED5                            =$00000035;
 DBG_CLIENT_BLKID_scb3                           =$00000036;
 DBG_BLOCK_ID_UNUSED6                            =$00000036;
 DBG_CLIENT_BLKID_cpc_0                          =$00000037;
 DBG_BLOCK_ID_UNUSED7                            =$00000037;
 DBG_CLIENT_BLKID_cpc_1                          =$00000038;
 DBG_BLOCK_ID_PC0                                =$00000038;
 DBG_CLIENT_BLKID_uvdm_0                         =$00000039;
 DBG_BLOCK_ID_PC1                                =$00000039;
 DBG_CLIENT_BLKID_uvdm_1                         =$0000003a;
 DBG_BLOCK_ID_UNUSED8                            =$0000003a;
 DBG_CLIENT_BLKID_uvdm_2                         =$0000003b;
 DBG_BLOCK_ID_UNUSED9                            =$0000003b;
 DBG_CLIENT_BLKID_uvdm_3                         =$0000003c;
 DBG_BLOCK_ID_UNUSED10                           =$0000003c;
 DBG_CLIENT_BLKID_cb000                          =$0000003d;
 DBG_BLOCK_ID_UNUSED11                           =$0000003d;
 DBG_CLIENT_BLKID_spim0                          =$0000003e;
 DBG_BLOCK_ID_MCB                                =$0000003e;
 DBG_CLIENT_BLKID_scb0                           =$0000003f;
 DBG_BLOCK_ID_UNUSED12                           =$0000003f;
 DBG_CLIENT_BLKID_mcc2                           =$00000040;
 DBG_BLOCK_ID_SCB0                               =$00000040;
 DBG_CLIENT_BLKID_ds0                            =$00000041;
 DBG_BLOCK_ID_SCB1                               =$00000041;
 DBG_CLIENT_BLKID_srbm                           =$00000042;
 DBG_BLOCK_ID_UNUSED13                           =$00000042;
 DBG_CLIENT_BLKID_ih                             =$00000043;
 DBG_BLOCK_ID_UNUSED14                           =$00000043;
 DBG_CLIENT_BLKID_sem                            =$00000044;
 DBG_BLOCK_ID_SCF0                               =$00000044;
 DBG_CLIENT_BLKID_sdma_0                         =$00000045;
 DBG_BLOCK_ID_SCF1                               =$00000045;
 DBG_CLIENT_BLKID_sdma_1                         =$00000046;
 DBG_BLOCK_ID_UNUSED15                           =$00000046;
 DBG_CLIENT_BLKID_hdp                            =$00000047;
 DBG_BLOCK_ID_UNUSED16                           =$00000047;
 DBG_CLIENT_BLKID_acp_0                          =$00000048;
 DBG_BLOCK_ID_BCI0                               =$00000048;
 DBG_CLIENT_BLKID_acp_1                          =$00000049;
 DBG_BLOCK_ID_BCI1                               =$00000049;
 DBG_CLIENT_BLKID_cb200                          =$0000004a;
 DBG_BLOCK_ID_BCI2                               =$0000004a;
 DBG_CLIENT_BLKID_scf3                           =$0000004b;
 DBG_BLOCK_ID_BCI3                               =$0000004b;
 DBG_CLIENT_BLKID_bci3                           =$0000004c;
 DBG_BLOCK_ID_UNUSED17                           =$0000004c;
 DBG_CLIENT_BLKID_mcd0_0                         =$0000004d;
 DBG_BLOCK_ID_UNUSED18                           =$0000004d;
 DBG_CLIENT_BLKID_mcd0_1                         =$0000004e;
 DBG_BLOCK_ID_UNUSED19                           =$0000004e;
 DBG_CLIENT_BLKID_pa11                           =$0000004f;
 DBG_BLOCK_ID_UNUSED20                           =$0000004f;
 DBG_CLIENT_BLKID_pa01                           =$00000050;
 DBG_BLOCK_ID_CB00                               =$00000050;
 DBG_CLIENT_BLKID_cb201                          =$00000051;
 DBG_BLOCK_ID_CB01                               =$00000051;
 DBG_CLIENT_BLKID_cb202                          =$00000052;
 DBG_BLOCK_ID_CB02                               =$00000052;
 DBG_CLIENT_BLKID_cb203                          =$00000053;
 DBG_BLOCK_ID_CB03                               =$00000053;
 DBG_CLIENT_BLKID_spim2                          =$00000054;
 DBG_BLOCK_ID_CB04                               =$00000054;
 DBG_CLIENT_BLKID_scb2                           =$00000055;
 DBG_BLOCK_ID_UNUSED21                           =$00000055;
 DBG_CLIENT_BLKID_vgt2                           =$00000056;
 DBG_BLOCK_ID_UNUSED22                           =$00000056;
 DBG_CLIENT_BLKID_pc2                            =$00000057;
 DBG_BLOCK_ID_UNUSED23                           =$00000057;
 DBG_CLIENT_BLKID_smu_0                          =$00000058;
 DBG_BLOCK_ID_CB10                               =$00000058;
 DBG_CLIENT_BLKID_smu_1                          =$00000059;
 DBG_BLOCK_ID_CB11                               =$00000059;
 DBG_CLIENT_BLKID_smu_2                          =$0000005a;
 DBG_BLOCK_ID_CB12                               =$0000005a;
 DBG_CLIENT_BLKID_cb1                            =$0000005b;
 DBG_BLOCK_ID_CB13                               =$0000005b;
 DBG_CLIENT_BLKID_ia0                            =$0000005c;
 DBG_BLOCK_ID_CB14                               =$0000005c;
 DBG_CLIENT_BLKID_wd                             =$0000005d;
 DBG_BLOCK_ID_UNUSED24                           =$0000005d;
 DBG_CLIENT_BLKID_ia1                            =$0000005e;
 DBG_BLOCK_ID_UNUSED25                           =$0000005e;
 DBG_CLIENT_BLKID_scf0                           =$0000005f;
 DBG_BLOCK_ID_UNUSED26                           =$0000005f;
 DBG_CLIENT_BLKID_vgt1                           =$00000060;
 DBG_BLOCK_ID_TCP0                               =$00000060;
 DBG_CLIENT_BLKID_pc1                            =$00000061;
 DBG_BLOCK_ID_TCP1                               =$00000061;
 DBG_CLIENT_BLKID_cb0                            =$00000062;
 DBG_BLOCK_ID_TCP2                               =$00000062;
 DBG_CLIENT_BLKID_gdc_one_0                      =$00000063;
 DBG_BLOCK_ID_TCP3                               =$00000063;
 DBG_CLIENT_BLKID_gdc_one_1                      =$00000064;
 DBG_BLOCK_ID_TCP4                               =$00000064;
 DBG_CLIENT_BLKID_gdc_one_2                      =$00000065;
 DBG_BLOCK_ID_TCP5                               =$00000065;
 DBG_CLIENT_BLKID_gdc_one_3                      =$00000066;
 DBG_BLOCK_ID_TCP6                               =$00000066;
 DBG_CLIENT_BLKID_gdc_one_4                      =$00000067;
 DBG_BLOCK_ID_TCP7                               =$00000067;
 DBG_CLIENT_BLKID_gdc_one_5                      =$00000068;
 DBG_BLOCK_ID_TCP8                               =$00000068;
 DBG_CLIENT_BLKID_gdc_one_6                      =$00000069;
 DBG_BLOCK_ID_TCP9                               =$00000069;
 DBG_CLIENT_BLKID_gdc_one_7                      =$0000006a;
 DBG_BLOCK_ID_TCP10                              =$0000006a;
 DBG_CLIENT_BLKID_gdc_one_8                      =$0000006b;
 DBG_BLOCK_ID_TCP11                              =$0000006b;
 DBG_CLIENT_BLKID_gdc_one_9                      =$0000006c;
 DBG_BLOCK_ID_TCP12                              =$0000006c;
 DBG_CLIENT_BLKID_gdc_one_10                     =$0000006d;
 DBG_BLOCK_ID_TCP13                              =$0000006d;
 DBG_CLIENT_BLKID_gdc_one_11                     =$0000006e;
 DBG_BLOCK_ID_TCP14                              =$0000006e;
 DBG_CLIENT_BLKID_gdc_one_12                     =$0000006f;
 DBG_BLOCK_ID_TCP15                              =$0000006f;
 DBG_CLIENT_BLKID_gdc_one_13                     =$00000070;
 DBG_BLOCK_ID_TCP16                              =$00000070;
 DBG_CLIENT_BLKID_gdc_one_14                     =$00000071;
 DBG_BLOCK_ID_TCP17                              =$00000071;
 DBG_CLIENT_BLKID_gdc_one_15                     =$00000072;
 DBG_BLOCK_ID_TCP18                              =$00000072;
 DBG_CLIENT_BLKID_gdc_one_16                     =$00000073;
 DBG_BLOCK_ID_TCP19                              =$00000073;
 DBG_CLIENT_BLKID_gdc_one_17                     =$00000074;
 DBG_BLOCK_ID_TCP20                              =$00000074;
 DBG_CLIENT_BLKID_gdc_one_18                     =$00000075;
 DBG_BLOCK_ID_TCP21                              =$00000075;
 DBG_CLIENT_BLKID_gdc_one_19                     =$00000076;
 DBG_BLOCK_ID_TCP22                              =$00000076;
 DBG_CLIENT_BLKID_gdc_one_20                     =$00000077;
 DBG_BLOCK_ID_TCP23                              =$00000077;
 DBG_CLIENT_BLKID_gdc_one_21                     =$00000078;
 DBG_BLOCK_ID_TCP_RESERVED0                      =$00000078;
 DBG_CLIENT_BLKID_gdc_one_22                     =$00000079;
 DBG_BLOCK_ID_TCP_RESERVED1                      =$00000079;
 DBG_CLIENT_BLKID_gdc_one_23                     =$0000007a;
 DBG_BLOCK_ID_TCP_RESERVED2                      =$0000007a;
 DBG_CLIENT_BLKID_gdc_one_24                     =$0000007b;
 DBG_BLOCK_ID_TCP_RESERVED3                      =$0000007b;
 DBG_CLIENT_BLKID_gdc_one_25                     =$0000007c;
 DBG_BLOCK_ID_TCP_RESERVED4                      =$0000007c;
 DBG_CLIENT_BLKID_gdc_one_26                     =$0000007d;
 DBG_BLOCK_ID_TCP_RESERVED5                      =$0000007d;
 DBG_CLIENT_BLKID_gdc_one_27                     =$0000007e;
 DBG_BLOCK_ID_TCP_RESERVED6                      =$0000007e;
 DBG_CLIENT_BLKID_gdc_one_28                     =$0000007f;
 DBG_BLOCK_ID_TCP_RESERVED7                      =$0000007f;
 DBG_CLIENT_BLKID_gdc_one_29                     =$00000080;
 DBG_BLOCK_ID_DB00                               =$00000080;
 DBG_CLIENT_BLKID_gdc_one_30                     =$00000081;
 DBG_BLOCK_ID_DB01                               =$00000081;
 DBG_CLIENT_BLKID_gdc_one_31                     =$00000082;
 DBG_BLOCK_ID_DB02                               =$00000082;
 DBG_CLIENT_BLKID_gdc_one_32                     =$00000083;
 DBG_BLOCK_ID_DB03                               =$00000083;
 DBG_CLIENT_BLKID_gdc_one_33                     =$00000084;
 DBG_BLOCK_ID_DB04                               =$00000084;
 DBG_CLIENT_BLKID_gdc_one_34                     =$00000085;
 DBG_BLOCK_ID_UNUSED27                           =$00000085;
 DBG_CLIENT_BLKID_gdc_one_35                     =$00000086;
 DBG_BLOCK_ID_UNUSED28                           =$00000086;
 DBG_CLIENT_BLKID_vceb0_0                        =$00000087;
 DBG_BLOCK_ID_UNUSED29                           =$00000087;
 DBG_CLIENT_BLKID_vgt3                           =$00000088;
 DBG_BLOCK_ID_DB10                               =$00000088;
 DBG_CLIENT_BLKID_pc3                            =$00000089;
 DBG_BLOCK_ID_DB11                               =$00000089;
 DBG_CLIENT_BLKID_mcd3_0                         =$0000008a;
 DBG_BLOCK_ID_DB12                               =$0000008a;
 DBG_CLIENT_BLKID_mcd3_1                         =$0000008b;
 DBG_BLOCK_ID_DB13                               =$0000008b;
 DBG_CLIENT_BLKID_uvdu_0                         =$0000008c;
 DBG_BLOCK_ID_DB14                               =$0000008c;
 DBG_CLIENT_BLKID_uvdu_1                         =$0000008d;
 DBG_BLOCK_ID_UNUSED30                           =$0000008d;
 DBG_CLIENT_BLKID_uvdu_2                         =$0000008e;
 DBG_BLOCK_ID_UNUSED31                           =$0000008e;
 DBG_CLIENT_BLKID_uvdu_3                         =$0000008f;
 DBG_BLOCK_ID_UNUSED32                           =$0000008f;
 DBG_CLIENT_BLKID_uvdu_4                         =$00000090;
 DBG_BLOCK_ID_TCC0                               =$00000090;
 DBG_CLIENT_BLKID_uvdu_5                         =$00000091;
 DBG_BLOCK_ID_TCC1                               =$00000091;
 DBG_CLIENT_BLKID_uvdu_6                         =$00000092;
 DBG_BLOCK_ID_TCC2                               =$00000092;
 DBG_CLIENT_BLKID_cb300                          =$00000093;
 DBG_BLOCK_ID_TCC3                               =$00000093;
 DBG_CLIENT_BLKID_mcd1_0                         =$00000094;
 DBG_BLOCK_ID_TCC4                               =$00000094;
 DBG_CLIENT_BLKID_mcd1_1                         =$00000095;
 DBG_BLOCK_ID_TCC5                               =$00000095;
 DBG_CLIENT_BLKID_sx00                           =$00000096;
 DBG_BLOCK_ID_TCC6                               =$00000096;
 DBG_CLIENT_BLKID_uvdc_0                         =$00000097;
 DBG_BLOCK_ID_TCC7                               =$00000097;
 DBG_CLIENT_BLKID_uvdc_1                         =$00000098;
 DBG_BLOCK_ID_SPS00                              =$00000098;
 DBG_CLIENT_BLKID_mcc3                           =$00000099;
 DBG_BLOCK_ID_SPS01                              =$00000099;
 DBG_CLIENT_BLKID_mcc4                           =$0000009a;
 DBG_BLOCK_ID_SPS02                              =$0000009a;
 DBG_CLIENT_BLKID_mcc5                           =$0000009b;
 DBG_BLOCK_ID_SPS10                              =$0000009b;
 DBG_CLIENT_BLKID_mcc6                           =$0000009c;
 DBG_BLOCK_ID_SPS11                              =$0000009c;
 DBG_CLIENT_BLKID_mcc7                           =$0000009d;
 DBG_BLOCK_ID_SPS12                              =$0000009d;
 DBG_CLIENT_BLKID_cpg_0                          =$0000009e;
 DBG_BLOCK_ID_UNUSED33                           =$0000009e;
 DBG_CLIENT_BLKID_cpg_1                          =$0000009f;
 DBG_BLOCK_ID_UNUSED34                           =$0000009f;
 DBG_CLIENT_BLKID_gck                            =$000000a0;
 DBG_BLOCK_ID_TA00                               =$000000a0;
 DBG_CLIENT_BLKID_mcc1                           =$000000a1;
 DBG_BLOCK_ID_TA01                               =$000000a1;
 DBG_CLIENT_BLKID_cpf_0                          =$000000a2;
 DBG_BLOCK_ID_TA02                               =$000000a2;
 DBG_CLIENT_BLKID_cpf_1                          =$000000a3;
 DBG_BLOCK_ID_TA03                               =$000000a3;
 DBG_CLIENT_BLKID_rlc                            =$000000a4;
 DBG_BLOCK_ID_TA04                               =$000000a4;
 DBG_CLIENT_BLKID_grbm                           =$000000a5;
 DBG_BLOCK_ID_TA05                               =$000000a5;
 DBG_CLIENT_BLKID_sammsp                         =$000000a6;
 DBG_BLOCK_ID_TA06                               =$000000a6;
 DBG_CLIENT_BLKID_dci_pg                         =$000000a7;
 DBG_BLOCK_ID_TA07                               =$000000a7;
 DBG_CLIENT_BLKID_dci_0                          =$000000a8;
 DBG_BLOCK_ID_TA08                               =$000000a8;
 DBG_CLIENT_BLKID_dccg0_0                        =$000000a9;
 DBG_BLOCK_ID_TA09                               =$000000a9;
 DBG_CLIENT_BLKID_dccg0_1                        =$000000aa;
 DBG_BLOCK_ID_TA0A                               =$000000aa;
 DBG_CLIENT_BLKID_dcfe01_0                       =$000000ab;
 DBG_BLOCK_ID_TA0B                               =$000000ab;
 DBG_CLIENT_BLKID_dcfe02_0                       =$000000ac;
 DBG_BLOCK_ID_UNUSED35                           =$000000ac;
 DBG_CLIENT_BLKID_dcfe03_0                       =$000000ad;
 DBG_BLOCK_ID_UNUSED36                           =$000000ad;
 DBG_CLIENT_BLKID_dcfe04_0                       =$000000ae;
 DBG_BLOCK_ID_UNUSED37                           =$000000ae;
 DBG_CLIENT_BLKID_dcfe05_0                       =$000000af;
 DBG_BLOCK_ID_UNUSED38                           =$000000af;
 DBG_CLIENT_BLKID_dcfe06_0                       =$000000b0;
 DBG_BLOCK_ID_TA10                               =$000000b0;
 DBG_CLIENT_BLKID_mcq0_0                         =$000000b1;
 DBG_BLOCK_ID_TA11                               =$000000b1;
 DBG_CLIENT_BLKID_mcq0_1                         =$000000b2;
 DBG_BLOCK_ID_TA12                               =$000000b2;
 DBG_CLIENT_BLKID_mcq1_0                         =$000000b3;
 DBG_BLOCK_ID_TA13                               =$000000b3;
 DBG_CLIENT_BLKID_mcq1_1                         =$000000b4;
 DBG_BLOCK_ID_TA14                               =$000000b4;
 DBG_CLIENT_BLKID_mcq2_0                         =$000000b5;
 DBG_BLOCK_ID_TA15                               =$000000b5;
 DBG_CLIENT_BLKID_mcq2_1                         =$000000b6;
 DBG_BLOCK_ID_TA16                               =$000000b6;
 DBG_CLIENT_BLKID_mcq3_0                         =$000000b7;
 DBG_BLOCK_ID_TA17                               =$000000b7;
 DBG_CLIENT_BLKID_mcq3_1                         =$000000b8;
 DBG_BLOCK_ID_TA18                               =$000000b8;
 DBG_CLIENT_BLKID_mcq4_0                         =$000000b9;
 DBG_BLOCK_ID_TA19                               =$000000b9;
 DBG_CLIENT_BLKID_mcq4_1                         =$000000ba;
 DBG_BLOCK_ID_TA1A                               =$000000ba;
 DBG_CLIENT_BLKID_mcq5_0                         =$000000bb;
 DBG_BLOCK_ID_TA1B                               =$000000bb;
 DBG_CLIENT_BLKID_mcq5_1                         =$000000bc;
 DBG_BLOCK_ID_UNUSED39                           =$000000bc;
 DBG_CLIENT_BLKID_mcq6_0                         =$000000bd;
 DBG_BLOCK_ID_UNUSED40                           =$000000bd;
 DBG_CLIENT_BLKID_mcq6_1                         =$000000be;
 DBG_BLOCK_ID_UNUSED41                           =$000000be;
 DBG_CLIENT_BLKID_mcq7_0                         =$000000bf;
 DBG_BLOCK_ID_UNUSED42                           =$000000bf;
 DBG_CLIENT_BLKID_mcq7_1                         =$000000c0;
 DBG_BLOCK_ID_TD00                               =$000000c0;
 DBG_CLIENT_BLKID_uvdi_0                         =$000000c1;
 DBG_BLOCK_ID_TD01                               =$000000c1;
 DBG_CLIENT_BLKID_RESERVED_LAST                  =$000000c2;
 DBG_BLOCK_ID_TD02                               =$000000c2;
 DBG_BLOCK_ID_TD03                               =$000000c3;
 DBG_BLOCK_ID_TD04                               =$000000c4;
 DBG_BLOCK_ID_TD05                               =$000000c5;
 DBG_BLOCK_ID_TD06                               =$000000c6;
 DBG_BLOCK_ID_TD07                               =$000000c7;
 DBG_BLOCK_ID_TD08                               =$000000c8;
 DBG_BLOCK_ID_TD09                               =$000000c9;
 DBG_BLOCK_ID_TD0A                               =$000000ca;
 DBG_BLOCK_ID_TD0B                               =$000000cb;
 DBG_BLOCK_ID_UNUSED43                           =$000000cc;
 DBG_BLOCK_ID_UNUSED44                           =$000000cd;
 DBG_BLOCK_ID_UNUSED45                           =$000000ce;
 DBG_BLOCK_ID_UNUSED46                           =$000000cf;
 DBG_BLOCK_ID_TD10                               =$000000d0;
 DBG_BLOCK_ID_TD11                               =$000000d1;
 DBG_BLOCK_ID_TD12                               =$000000d2;
 DBG_BLOCK_ID_TD13                               =$000000d3;
 DBG_BLOCK_ID_TD14                               =$000000d4;
 DBG_BLOCK_ID_TD15                               =$000000d5;
 DBG_BLOCK_ID_TD16                               =$000000d6;
 DBG_BLOCK_ID_TD17                               =$000000d7;
 DBG_BLOCK_ID_TD18                               =$000000d8;
 DBG_BLOCK_ID_TD19                               =$000000d9;
 DBG_BLOCK_ID_TD1A                               =$000000da;
 DBG_BLOCK_ID_TD1B                               =$000000db;
 DBG_BLOCK_ID_UNUSED47                           =$000000dc;
 DBG_BLOCK_ID_UNUSED48                           =$000000dd;
 DBG_BLOCK_ID_UNUSED49                           =$000000de;
 DBG_BLOCK_ID_UNUSED50                           =$000000df;
 DBG_BLOCK_ID_MCD0                               =$000000e0;
 DBG_BLOCK_ID_MCD1                               =$000000e1;
 DBG_BLOCK_ID_MCD2                               =$000000e2;
 DBG_BLOCK_ID_MCD3                               =$000000e3;
 DBG_BLOCK_ID_MCD4                               =$000000e4;
 DBG_BLOCK_ID_MCD5                               =$000000e5;
 DBG_BLOCK_ID_UNUSED51                           =$000000e6;
 DBG_BLOCK_ID_UNUSED52                           =$000000e7;
 // DebugBlockId_BY16
 DBG_BLOCK_ID_RESERVED_BY16                      =$00000000;
 DBG_BLOCK_ID_VGT0_BY16                          =$00000002;
 DBG_BLOCK_ID_SX0_BY16                           =$00000003;
 DBG_BLOCK_ID_SCB0_BY16                          =$00000004;
 DBG_BLOCK_ID_CB00_BY16                          =$00000005;
 DBG_BLOCK_ID_TCP0_BY16                          =$00000006;
 DBG_BLOCK_ID_TCP16_BY16                         =$00000007;
 DBG_BLOCK_ID_DB00_BY16                          =$00000008;
 DBG_BLOCK_ID_TCC0_BY16                          =$00000009;
 DBG_BLOCK_ID_TA00_BY16                          =$0000000a;
 DBG_BLOCK_ID_TA10_BY16                          =$0000000b;
 DBG_BLOCK_ID_TD00_BY16                          =$0000000c;
 DBG_BLOCK_ID_TD10_BY16                          =$0000000d;
 DBG_BLOCK_ID_MCD0_BY16                          =$0000000e;
 // DebugBlockId_BY2
 DBG_BLOCK_ID_RESERVED_BY2                       =$00000000;
 DBG_BLOCK_ID_VMC_BY2                            =$00000001;
 DBG_BLOCK_ID_CG_BY2                             =$00000002;
 DBG_BLOCK_ID_GRBM_BY2                           =$00000003;
 DBG_BLOCK_ID_CSC_BY2                            =$00000004;
 DBG_BLOCK_ID_IH_BY2                             =$00000005;
 DBG_BLOCK_ID_SQ_BY2                             =$00000006;
 DBG_BLOCK_ID_GMCON_BY2                          =$00000007;
 DBG_BLOCK_ID_SPIM_BY2                           =$00000009;
 DBG_BLOCK_ID_SPIS_BY2                           =$0000000a;
 DBG_BLOCK_ID_PA0_BY2                            =$0000000b;
 DBG_BLOCK_ID_CP0_BY2                            =$0000000c;
 DBG_BLOCK_ID_CP2_BY2                            =$0000000d;
 DBG_BLOCK_ID_UVDU_BY2                           =$0000000e;
 DBG_BLOCK_ID_VCE_BY2                            =$0000000f;
 DBG_BLOCK_ID_VGT0_BY2                           =$00000010;
 DBG_BLOCK_ID_IA_BY2                             =$00000011;
 DBG_BLOCK_ID_SCT0_BY2                           =$00000012;
 DBG_BLOCK_ID_SPM0_BY2                           =$00000013;
 DBG_BLOCK_ID_TCAA_BY2                           =$00000014;
 DBG_BLOCK_ID_TCCA_BY2                           =$00000015;
 DBG_BLOCK_ID_MCC0_BY2                           =$00000016;
 DBG_BLOCK_ID_MCC2_BY2                           =$00000017;
 DBG_BLOCK_ID_SX0_BY2                            =$00000018;
 DBG_BLOCK_ID_SX2_BY2                            =$00000019;
 DBG_BLOCK_ID_UNUSED4_BY2                        =$0000001a;
 DBG_BLOCK_ID_UNUSED6_BY2                        =$0000001b;
 DBG_BLOCK_ID_PC0_BY2                            =$0000001c;
 DBG_BLOCK_ID_UNUSED8_BY2                        =$0000001d;
 DBG_BLOCK_ID_UNUSED10_BY2                       =$0000001e;
 DBG_BLOCK_ID_MCB_BY2                            =$0000001f;
 DBG_BLOCK_ID_SCB0_BY2                           =$00000020;
 DBG_BLOCK_ID_UNUSED13_BY2                       =$00000021;
 DBG_BLOCK_ID_SCF0_BY2                           =$00000022;
 DBG_BLOCK_ID_UNUSED15_BY2                       =$00000023;
 DBG_BLOCK_ID_BCI0_BY2                           =$00000024;
 DBG_BLOCK_ID_BCI2_BY2                           =$00000025;
 DBG_BLOCK_ID_UNUSED17_BY2                       =$00000026;
 DBG_BLOCK_ID_UNUSED19_BY2                       =$00000027;
 DBG_BLOCK_ID_CB00_BY2                           =$00000028;
 DBG_BLOCK_ID_CB02_BY2                           =$00000029;
 DBG_BLOCK_ID_CB04_BY2                           =$0000002a;
 DBG_BLOCK_ID_UNUSED22_BY2                       =$0000002b;
 DBG_BLOCK_ID_CB10_BY2                           =$0000002c;
 DBG_BLOCK_ID_CB12_BY2                           =$0000002d;
 DBG_BLOCK_ID_CB14_BY2                           =$0000002e;
 DBG_BLOCK_ID_UNUSED25_BY2                       =$0000002f;
 DBG_BLOCK_ID_TCP0_BY2                           =$00000030;
 DBG_BLOCK_ID_TCP2_BY2                           =$00000031;
 DBG_BLOCK_ID_TCP4_BY2                           =$00000032;
 DBG_BLOCK_ID_TCP6_BY2                           =$00000033;
 DBG_BLOCK_ID_TCP8_BY2                           =$00000034;
 DBG_BLOCK_ID_TCP10_BY2                          =$00000035;
 DBG_BLOCK_ID_TCP12_BY2                          =$00000036;
 DBG_BLOCK_ID_TCP14_BY2                          =$00000037;
 DBG_BLOCK_ID_TCP16_BY2                          =$00000038;
 DBG_BLOCK_ID_TCP18_BY2                          =$00000039;
 DBG_BLOCK_ID_TCP20_BY2                          =$0000003a;
 DBG_BLOCK_ID_TCP22_BY2                          =$0000003b;
 DBG_BLOCK_ID_TCP_RESERVED0_BY2                  =$0000003c;
 DBG_BLOCK_ID_TCP_RESERVED2_BY2                  =$0000003d;
 DBG_BLOCK_ID_TCP_RESERVED4_BY2                  =$0000003e;
 DBG_BLOCK_ID_TCP_RESERVED6_BY2                  =$0000003f;
 DBG_BLOCK_ID_DB00_BY2                           =$00000040;
 DBG_BLOCK_ID_DB02_BY2                           =$00000041;
 DBG_BLOCK_ID_DB04_BY2                           =$00000042;
 DBG_BLOCK_ID_UNUSED28_BY2                       =$00000043;
 DBG_BLOCK_ID_DB10_BY2                           =$00000044;
 DBG_BLOCK_ID_DB12_BY2                           =$00000045;
 DBG_BLOCK_ID_DB14_BY2                           =$00000046;
 DBG_BLOCK_ID_UNUSED31_BY2                       =$00000047;
 DBG_BLOCK_ID_TCC0_BY2                           =$00000048;
 DBG_BLOCK_ID_TCC2_BY2                           =$00000049;
 DBG_BLOCK_ID_TCC4_BY2                           =$0000004a;
 DBG_BLOCK_ID_TCC6_BY2                           =$0000004b;
 DBG_BLOCK_ID_SPS00_BY2                          =$0000004c;
 DBG_BLOCK_ID_SPS02_BY2                          =$0000004d;
 DBG_BLOCK_ID_SPS11_BY2                          =$0000004e;
 DBG_BLOCK_ID_UNUSED33_BY2                       =$0000004f;
 DBG_BLOCK_ID_TA00_BY2                           =$00000050;
 DBG_BLOCK_ID_TA02_BY2                           =$00000051;
 DBG_BLOCK_ID_TA04_BY2                           =$00000052;
 DBG_BLOCK_ID_TA06_BY2                           =$00000053;
 DBG_BLOCK_ID_TA08_BY2                           =$00000054;
 DBG_BLOCK_ID_TA0A_BY2                           =$00000055;
 DBG_BLOCK_ID_UNUSED35_BY2                       =$00000056;
 DBG_BLOCK_ID_UNUSED37_BY2                       =$00000057;
 DBG_BLOCK_ID_TA10_BY2                           =$00000058;
 DBG_BLOCK_ID_TA12_BY2                           =$00000059;
 DBG_BLOCK_ID_TA14_BY2                           =$0000005a;
 DBG_BLOCK_ID_TA16_BY2                           =$0000005b;
 DBG_BLOCK_ID_TA18_BY2                           =$0000005c;
 DBG_BLOCK_ID_TA1A_BY2                           =$0000005d;
 DBG_BLOCK_ID_UNUSED39_BY2                       =$0000005e;
 DBG_BLOCK_ID_UNUSED41_BY2                       =$0000005f;
 DBG_BLOCK_ID_TD00_BY2                           =$00000060;
 DBG_BLOCK_ID_TD02_BY2                           =$00000061;
 DBG_BLOCK_ID_TD04_BY2                           =$00000062;
 DBG_BLOCK_ID_TD06_BY2                           =$00000063;
 DBG_BLOCK_ID_TD08_BY2                           =$00000064;
 DBG_BLOCK_ID_TD0A_BY2                           =$00000065;
 DBG_BLOCK_ID_UNUSED43_BY2                       =$00000066;
 DBG_BLOCK_ID_UNUSED45_BY2                       =$00000067;
 DBG_BLOCK_ID_TD10_BY2                           =$00000068;
 DBG_BLOCK_ID_TD12_BY2                           =$00000069;
 DBG_BLOCK_ID_TD14_BY2                           =$0000006a;
 DBG_BLOCK_ID_TD16_BY2                           =$0000006b;
 DBG_BLOCK_ID_TD18_BY2                           =$0000006c;
 DBG_BLOCK_ID_TD1A_BY2                           =$0000006d;
 DBG_BLOCK_ID_UNUSED47_BY2                       =$0000006e;
 DBG_BLOCK_ID_UNUSED49_BY2                       =$0000006f;
 DBG_BLOCK_ID_MCD0_BY2                           =$00000070;
 DBG_BLOCK_ID_MCD2_BY2                           =$00000071;
 DBG_BLOCK_ID_MCD4_BY2                           =$00000072;
 DBG_BLOCK_ID_UNUSED51_BY2                       =$00000073;
 // DebugBlockId_BY4
 DBG_BLOCK_ID_RESERVED_BY4                       =$00000000;
 DBG_BLOCK_ID_CG_BY4                             =$00000001;
 DBG_BLOCK_ID_CSC_BY4                            =$00000002;
 DBG_BLOCK_ID_SQ_BY4                             =$00000003;
 DBG_BLOCK_ID_SPIS_BY4                           =$00000005;
 DBG_BLOCK_ID_CP0_BY4                            =$00000006;
 DBG_BLOCK_ID_UVDU_BY4                           =$00000007;
 DBG_BLOCK_ID_VGT0_BY4                           =$00000008;
 DBG_BLOCK_ID_SCT0_BY4                           =$00000009;
 DBG_BLOCK_ID_TCAA_BY4                           =$0000000a;
 DBG_BLOCK_ID_MCC0_BY4                           =$0000000b;
 DBG_BLOCK_ID_SX0_BY4                            =$0000000c;
 DBG_BLOCK_ID_UNUSED4_BY4                        =$0000000d;
 DBG_BLOCK_ID_PC0_BY4                            =$0000000e;
 DBG_BLOCK_ID_UNUSED10_BY4                       =$0000000f;
 DBG_BLOCK_ID_SCB0_BY4                           =$00000010;
 DBG_BLOCK_ID_SCF0_BY4                           =$00000011;
 DBG_BLOCK_ID_BCI0_BY4                           =$00000012;
 DBG_BLOCK_ID_UNUSED17_BY4                       =$00000013;
 DBG_BLOCK_ID_CB00_BY4                           =$00000014;
 DBG_BLOCK_ID_CB04_BY4                           =$00000015;
 DBG_BLOCK_ID_CB10_BY4                           =$00000016;
 DBG_BLOCK_ID_CB14_BY4                           =$00000017;
 DBG_BLOCK_ID_TCP0_BY4                           =$00000018;
 DBG_BLOCK_ID_TCP4_BY4                           =$00000019;
 DBG_BLOCK_ID_TCP8_BY4                           =$0000001a;
 DBG_BLOCK_ID_TCP12_BY4                          =$0000001b;
 DBG_BLOCK_ID_TCP16_BY4                          =$0000001c;
 DBG_BLOCK_ID_TCP20_BY4                          =$0000001d;
 DBG_BLOCK_ID_TCP_RESERVED0_BY4                  =$0000001e;
 DBG_BLOCK_ID_TCP_RESERVED4_BY4                  =$0000001f;
 DBG_BLOCK_ID_DB_BY4                             =$00000020;
 DBG_BLOCK_ID_DB04_BY4                           =$00000021;
 DBG_BLOCK_ID_DB10_BY4                           =$00000022;
 DBG_BLOCK_ID_DB14_BY4                           =$00000023;
 DBG_BLOCK_ID_TCC0_BY4                           =$00000024;
 DBG_BLOCK_ID_TCC4_BY4                           =$00000025;
 DBG_BLOCK_ID_SPS00_BY4                          =$00000026;
 DBG_BLOCK_ID_SPS11_BY4                          =$00000027;
 DBG_BLOCK_ID_TA00_BY4                           =$00000028;
 DBG_BLOCK_ID_TA04_BY4                           =$00000029;
 DBG_BLOCK_ID_TA08_BY4                           =$0000002a;
 DBG_BLOCK_ID_UNUSED35_BY4                       =$0000002b;
 DBG_BLOCK_ID_TA10_BY4                           =$0000002c;
 DBG_BLOCK_ID_TA14_BY4                           =$0000002d;
 DBG_BLOCK_ID_TA18_BY4                           =$0000002e;
 DBG_BLOCK_ID_UNUSED39_BY4                       =$0000002f;
 DBG_BLOCK_ID_TD00_BY4                           =$00000030;
 DBG_BLOCK_ID_TD04_BY4                           =$00000031;
 DBG_BLOCK_ID_TD08_BY4                           =$00000032;
 DBG_BLOCK_ID_UNUSED43_BY4                       =$00000033;
 DBG_BLOCK_ID_TD10_BY4                           =$00000034;
 DBG_BLOCK_ID_TD14_BY4                           =$00000035;
 DBG_BLOCK_ID_TD18_BY4                           =$00000036;
 DBG_BLOCK_ID_UNUSED47_BY4                       =$00000037;
 DBG_BLOCK_ID_MCD0_BY4                           =$00000038;
 DBG_BLOCK_ID_MCD4_BY4                           =$00000039;
 // DebugBlockId_BY8
 DBG_BLOCK_ID_RESERVED_BY8                       =$00000000;
 DBG_BLOCK_ID_CSC_BY8                            =$00000001;
 DBG_BLOCK_ID_CP0_BY8                            =$00000003;
 DBG_BLOCK_ID_VGT0_BY8                           =$00000004;
 DBG_BLOCK_ID_TCAA_BY8                           =$00000005;
 DBG_BLOCK_ID_SX0_BY8                            =$00000006;
 DBG_BLOCK_ID_PC0_BY8                            =$00000007;
 DBG_BLOCK_ID_SCB0_BY8                           =$00000008;
 DBG_BLOCK_ID_BCI0_BY8                           =$00000009;
 DBG_BLOCK_ID_CB00_BY8                           =$0000000a;
 DBG_BLOCK_ID_CB10_BY8                           =$0000000b;
 DBG_BLOCK_ID_TCP0_BY8                           =$0000000c;
 DBG_BLOCK_ID_TCP8_BY8                           =$0000000d;
 DBG_BLOCK_ID_TCP16_BY8                          =$0000000e;
 DBG_BLOCK_ID_TCP_RESERVED0_BY8                  =$0000000f;
 DBG_BLOCK_ID_DB00_BY8                           =$00000010;
 DBG_BLOCK_ID_DB10_BY8                           =$00000011;
 DBG_BLOCK_ID_TCC0_BY8                           =$00000012;
 DBG_BLOCK_ID_SPS00_BY8                          =$00000013;
 DBG_BLOCK_ID_TA00_BY8                           =$00000014;
 DBG_BLOCK_ID_TA08_BY8                           =$00000015;
 DBG_BLOCK_ID_TA10_BY8                           =$00000016;
 DBG_BLOCK_ID_TA18_BY8                           =$00000017;
 DBG_BLOCK_ID_TD00_BY8                           =$00000018;
 DBG_BLOCK_ID_TD08_BY8                           =$00000019;
 DBG_BLOCK_ID_TD10_BY8                           =$0000001a;
 DBG_BLOCK_ID_TD18_BY8                           =$0000001b;
 DBG_BLOCK_ID_MCD0_BY8                           =$0000001c;
 // DepthArray
 ARRAY_2D_ALT_DEPTH                              =$00000000;
 ARRAY_2D_DEPTH                                  =$00000001;
 // DepthFormat
 DEPTH_INVALID                                   =$00000000;
 DEPTH_16                                        =$00000001;
 DEPTH_X8_24                                     =$00000002;
 DEPTH_8_24                                      =$00000003;
 DEPTH_X8_24_FLOAT                               =$00000004;
 DEPTH_8_24_FLOAT                                =$00000005;
 DEPTH_32_FLOAT                                  =$00000006;
 DEPTH_X24_8_32_FLOAT                            =$00000007;
 // ENUM_SQ_EXPORT_RAT_INST
 SQ_EXPORT_RAT_INST_NOP                          =$00000000;
 SQ_EXPORT_RAT_INST_STORE_TYPED                  =$00000001;
 SQ_EXPORT_RAT_INST_STORE_RAW                    =$00000002;
 SQ_EXPORT_RAT_INST_STORE_RAW_FDENORM            =$00000003;
 SQ_EXPORT_RAT_INST_CMPXCHG_INT                  =$00000004;
 SQ_EXPORT_RAT_INST_CMPXCHG_FLT                  =$00000005;
 SQ_EXPORT_RAT_INST_CMPXCHG_FDENORM              =$00000006;
 SQ_EXPORT_RAT_INST_ADD                          =$00000007;
 SQ_EXPORT_RAT_INST_SUB                          =$00000008;
 SQ_EXPORT_RAT_INST_RSUB                         =$00000009;
 SQ_EXPORT_RAT_INST_MIN_INT                      =$0000000a;
 SQ_EXPORT_RAT_INST_MIN_UINT                     =$0000000b;
 SQ_EXPORT_RAT_INST_MAX_INT                      =$0000000c;
 SQ_EXPORT_RAT_INST_MAX_UINT                     =$0000000d;
 SQ_EXPORT_RAT_INST_AND                          =$0000000e;
 SQ_EXPORT_RAT_INST_OR                           =$0000000f;
 SQ_EXPORT_RAT_INST_XOR                          =$00000010;
 SQ_EXPORT_RAT_INST_MSKOR                        =$00000011;
 SQ_EXPORT_RAT_INST_INC_UINT                     =$00000012;
 SQ_EXPORT_RAT_INST_DEC_UINT                     =$00000013;
 SQ_EXPORT_RAT_INST_STORE_DWORD                  =$00000014;
 SQ_EXPORT_RAT_INST_STORE_SHORT                  =$00000015;
 SQ_EXPORT_RAT_INST_STORE_BYTE                   =$00000016;
 SQ_EXPORT_RAT_INST_NOP_RTN                      =$00000020;
 SQ_EXPORT_RAT_INST_XCHG_RTN                     =$00000022;
 SQ_EXPORT_RAT_INST_XCHG_FDENORM_RTN             =$00000023;
 SQ_EXPORT_RAT_INST_CMPXCHG_INT_RTN              =$00000024;
 SQ_EXPORT_RAT_INST_CMPXCHG_FLT_RTN              =$00000025;
 SQ_EXPORT_RAT_INST_CMPXCHG_FDENORM_RTN          =$00000026;
 SQ_EXPORT_RAT_INST_ADD_RTN                      =$00000027;
 SQ_EXPORT_RAT_INST_SUB_RTN                      =$00000028;
 SQ_EXPORT_RAT_INST_RSUB_RTN                     =$00000029;
 SQ_EXPORT_RAT_INST_MIN_INT_RTN                  =$0000002a;
 SQ_EXPORT_RAT_INST_MIN_UINT_RTN                 =$0000002b;
 SQ_EXPORT_RAT_INST_MAX_INT_RTN                  =$0000002c;
 SQ_EXPORT_RAT_INST_MAX_UINT_RTN                 =$0000002d;
 SQ_EXPORT_RAT_INST_AND_RTN                      =$0000002e;
 SQ_EXPORT_RAT_INST_OR_RTN                       =$0000002f;
 SQ_EXPORT_RAT_INST_XOR_RTN                      =$00000030;
 SQ_EXPORT_RAT_INST_MSKOR_RTN                    =$00000031;
 SQ_EXPORT_RAT_INST_INC_UINT_RTN                 =$00000032;
 SQ_EXPORT_RAT_INST_DEC_UINT_RTN                 =$00000033;
 // ForceControl
 FORCE_OFF                                       =$00000000;
 FORCE_ENABLE                                    =$00000001;
 FORCE_DISABLE                                   =$00000002;
 FORCE_RESERVED                                  =$00000003;
 // GB_EDC_DED_MODE
 GB_EDC_DED_MODE_LOG                             =$00000000;
 GB_EDC_DED_MODE_HALT                            =$00000001;
 GB_EDC_DED_MODE_INT_HALT                        =$00000002;
 // GRBM_PERF_SEL
 GRBM_PERF_SEL_COUNT                             =$00000000;
 GRBM_PERF_SEL_USER_DEFINED                      =$00000001;
 GRBM_PERF_SEL_GUI_ACTIVE                        =$00000002;
 GRBM_PERF_SEL_CP_BUSY                           =$00000003;
 GRBM_PERF_SEL_CP_COHER_BUSY                     =$00000004;
 GRBM_PERF_SEL_CP_DMA_BUSY                       =$00000005;
 GRBM_PERF_SEL_CB_BUSY                           =$00000006;
 GRBM_PERF_SEL_DB_BUSY                           =$00000007;
 GRBM_PERF_SEL_PA_BUSY                           =$00000008;
 GRBM_PERF_SEL_SC_BUSY                           =$00000009;
 GRBM_PERF_SEL_RESERVED_6                        =$0000000a;
 GRBM_PERF_SEL_SPI_BUSY                          =$0000000b;
 GRBM_PERF_SEL_SX_BUSY                           =$0000000c;
 GRBM_PERF_SEL_TA_BUSY                           =$0000000d;
 GRBM_PERF_SEL_CB_CLEAN                          =$0000000e;
 GRBM_PERF_SEL_DB_CLEAN                          =$0000000f;
 GRBM_PERF_SEL_RESERVED_5                        =$00000010;
 GRBM_PERF_SEL_VGT_BUSY                          =$00000011;
 GRBM_PERF_SEL_RESERVED_4                        =$00000012;
 GRBM_PERF_SEL_RESERVED_3                        =$00000013;
 GRBM_PERF_SEL_RESERVED_2                        =$00000014;
 GRBM_PERF_SEL_RESERVED_1                        =$00000015;
 GRBM_PERF_SEL_RESERVED_0                        =$00000016;
 GRBM_PERF_SEL_IA_BUSY                           =$00000017;
 GRBM_PERF_SEL_IA_NO_DMA_BUSY                    =$00000018;
 GRBM_PERF_SEL_GDS_BUSY                          =$00000019;
 GRBM_PERF_SEL_BCI_BUSY                          =$0000001a;
 GRBM_PERF_SEL_RLC_BUSY                          =$0000001b;
 GRBM_PERF_SEL_TC_BUSY                           =$0000001c;
 GRBM_PERF_SEL_CPG_BUSY                          =$0000001d;
 GRBM_PERF_SEL_CPC_BUSY                          =$0000001e;
 GRBM_PERF_SEL_CPF_BUSY                          =$0000001f;
 GRBM_PERF_SEL_WD_BUSY                           =$00000020;
 GRBM_PERF_SEL_WD_NO_DMA_BUSY                    =$00000021;
 // GRBM_SE0_PERF_SEL
 GRBM_SE0_PERF_SEL_COUNT                         =$00000000;
 GRBM_SE0_PERF_SEL_USER_DEFINED                  =$00000001;
 GRBM_SE0_PERF_SEL_CB_BUSY                       =$00000002;
 GRBM_SE0_PERF_SEL_DB_BUSY                       =$00000003;
 GRBM_SE0_PERF_SEL_SC_BUSY                       =$00000004;
 GRBM_SE0_PERF_SEL_RESERVED_1                    =$00000005;
 GRBM_SE0_PERF_SEL_SPI_BUSY                      =$00000006;
 GRBM_SE0_PERF_SEL_SX_BUSY                       =$00000007;
 GRBM_SE0_PERF_SEL_TA_BUSY                       =$00000008;
 GRBM_SE0_PERF_SEL_CB_CLEAN                      =$00000009;
 GRBM_SE0_PERF_SEL_DB_CLEAN                      =$0000000a;
 GRBM_SE0_PERF_SEL_RESERVED_0                    =$0000000b;
 GRBM_SE0_PERF_SEL_PA_BUSY                       =$0000000c;
 GRBM_SE0_PERF_SEL_VGT_BUSY                      =$0000000d;
 GRBM_SE0_PERF_SEL_BCI_BUSY                      =$0000000e;
 // GRBM_SE1_PERF_SEL
 GRBM_SE1_PERF_SEL_COUNT                         =$00000000;
 GRBM_SE1_PERF_SEL_USER_DEFINED                  =$00000001;
 GRBM_SE1_PERF_SEL_CB_BUSY                       =$00000002;
 GRBM_SE1_PERF_SEL_DB_BUSY                       =$00000003;
 GRBM_SE1_PERF_SEL_SC_BUSY                       =$00000004;
 GRBM_SE1_PERF_SEL_RESERVED_1                    =$00000005;
 GRBM_SE1_PERF_SEL_SPI_BUSY                      =$00000006;
 GRBM_SE1_PERF_SEL_SX_BUSY                       =$00000007;
 GRBM_SE1_PERF_SEL_TA_BUSY                       =$00000008;
 GRBM_SE1_PERF_SEL_CB_CLEAN                      =$00000009;
 GRBM_SE1_PERF_SEL_DB_CLEAN                      =$0000000a;
 GRBM_SE1_PERF_SEL_RESERVED_0                    =$0000000b;
 GRBM_SE1_PERF_SEL_PA_BUSY                       =$0000000c;
 GRBM_SE1_PERF_SEL_VGT_BUSY                      =$0000000d;
 GRBM_SE1_PERF_SEL_BCI_BUSY                      =$0000000e;
 // GRBM_SE2_PERF_SEL
 GRBM_SE2_PERF_SEL_COUNT                         =$00000000;
 GRBM_SE2_PERF_SEL_USER_DEFINED                  =$00000001;
 GRBM_SE2_PERF_SEL_CB_BUSY                       =$00000002;
 GRBM_SE2_PERF_SEL_DB_BUSY                       =$00000003;
 GRBM_SE2_PERF_SEL_SC_BUSY                       =$00000004;
 GRBM_SE2_PERF_SEL_RESERVED_1                    =$00000005;
 GRBM_SE2_PERF_SEL_SPI_BUSY                      =$00000006;
 GRBM_SE2_PERF_SEL_SX_BUSY                       =$00000007;
 GRBM_SE2_PERF_SEL_TA_BUSY                       =$00000008;
 GRBM_SE2_PERF_SEL_CB_CLEAN                      =$00000009;
 GRBM_SE2_PERF_SEL_DB_CLEAN                      =$0000000a;
 GRBM_SE2_PERF_SEL_RESERVED_0                    =$0000000b;
 GRBM_SE2_PERF_SEL_PA_BUSY                       =$0000000c;
 GRBM_SE2_PERF_SEL_VGT_BUSY                      =$0000000d;
 GRBM_SE2_PERF_SEL_BCI_BUSY                      =$0000000e;
 // GRBM_SE3_PERF_SEL
 GRBM_SE3_PERF_SEL_COUNT                         =$00000000;
 GRBM_SE3_PERF_SEL_USER_DEFINED                  =$00000001;
 GRBM_SE3_PERF_SEL_CB_BUSY                       =$00000002;
 GRBM_SE3_PERF_SEL_DB_BUSY                       =$00000003;
 GRBM_SE3_PERF_SEL_SC_BUSY                       =$00000004;
 GRBM_SE3_PERF_SEL_RESERVED_1                    =$00000005;
 GRBM_SE3_PERF_SEL_SPI_BUSY                      =$00000006;
 GRBM_SE3_PERF_SEL_SX_BUSY                       =$00000007;
 GRBM_SE3_PERF_SEL_TA_BUSY                       =$00000008;
 GRBM_SE3_PERF_SEL_CB_CLEAN                      =$00000009;
 GRBM_SE3_PERF_SEL_DB_CLEAN                      =$0000000a;
 GRBM_SE3_PERF_SEL_RESERVED_0                    =$0000000b;
 GRBM_SE3_PERF_SEL_PA_BUSY                       =$0000000c;
 GRBM_SE3_PERF_SEL_VGT_BUSY                      =$0000000d;
 GRBM_SE3_PERF_SEL_BCI_BUSY                      =$0000000e;
 // GroupInterleave
 CONFIG_256B_GROUP                               =$00000000;
 CONFIG_512B_GROUP                               =$00000001;
 // IA_PERFCOUNT_SELECT
 ia_perf_GRP_INPUT_EVENT_WINDOW_ACTIVE           =$00000000;
 ia_perf_dma_data_fifo_full                      =$00000001;
 ia_perf_RESERVED1                               =$00000002;
 ia_perf_RESERVED2                               =$00000003;
 ia_perf_RESERVED3                               =$00000004;
 ia_perf_RESERVED4                               =$00000005;
 ia_perf_RESERVED5                               =$00000006;
 ia_perf_MC_LAT_BIN_0                            =$00000007;
 ia_perf_MC_LAT_BIN_1                            =$00000008;
 ia_perf_MC_LAT_BIN_2                            =$00000009;
 ia_perf_MC_LAT_BIN_3                            =$0000000a;
 ia_perf_MC_LAT_BIN_4                            =$0000000b;
 ia_perf_MC_LAT_BIN_5                            =$0000000c;
 ia_perf_MC_LAT_BIN_6                            =$0000000d;
 ia_perf_MC_LAT_BIN_7                            =$0000000e;
 ia_perf_ia_busy                                 =$0000000f;
 ia_perf_ia_sclk_reg_vld_event                   =$00000010;
 ia_perf_RESERVED6                               =$00000011;
 ia_perf_ia_sclk_core_vld_event                  =$00000012;
 ia_perf_RESERVED7                               =$00000013;
 ia_perf_ia_dma_return                           =$00000014;
 ia_perf_ia_stalled                              =$00000015;
 ia_perf_shift_starved_pipe0_event               =$00000016;
 ia_perf_shift_starved_pipe1_event               =$00000017;
 // IH_CLIENT_ID
 DC_IH_SRC_ID_START                              =$00000001;
 DC_IH_SRC_ID_END                                =$0000001f;
 VGA_IH_SRC_ID_START                             =$00000020;
 VGA_IH_SRC_ID_END                               =$00000027;
 CAP_IH_SRC_ID_START                             =$00000028;
 CAP_IH_SRC_ID_END                               =$0000002f;
 VIP_IH_SRC_ID_START                             =$00000030;
 VIP_IH_SRC_ID_END                               =$0000003f;
 ROM_IH_SRC_ID_START                             =$00000040;
 ROM_IH_SRC_ID_END                               =$0000005d;
 BIF_IH_SRC_ID_START                             =$0000005e;
 SAM_IH_SRC_ID_START                             =$0000005f;
 SRBM_IH_SRC_ID_START                            =$00000060;
 SRBM_IH_SRC_ID_END                              =$00000067;
 UVD_IH_SRC_ID_START                             =$00000072;
 UVD_IH_SRC_ID_END                               =$00000085;
 VMC_IH_SRC_ID_START                             =$00000086;
 VMC_IH_SRC_ID_END                               =$0000008f;
 RLC_IH_SRC_ID_START                             =$00000090;
 RLC_IH_SRC_ID_END                               =$000000f3;
 PDMA_IH_SRC_ID_START                            =$000000f4;
 PDMA_IH_SRC_ID_END                              =$000000f7;
 CG_IH_SRC_ID_START                              =$000000f8;
 CG_IH_SRC_ID_END                                =$000000ff;
 // IH_PERF_SEL
 IH_PERF_SEL_CYCLE                               =$00000000;
 IH_PERF_SEL_IDLE                                =$00000001;
 IH_PERF_SEL_INPUT_IDLE                          =$00000002;
 IH_PERF_SEL_CLIENT0_IH_STALL                    =$00000003;
 IH_PERF_SEL_CLIENT1_IH_STALL                    =$00000004;
 IH_PERF_SEL_CLIENT2_IH_STALL                    =$00000005;
 IH_PERF_SEL_CLIENT3_IH_STALL                    =$00000006;
 IH_PERF_SEL_CLIENT4_IH_STALL                    =$00000007;
 IH_PERF_SEL_CLIENT5_IH_STALL                    =$00000008;
 IH_PERF_SEL_CLIENT6_IH_STALL                    =$00000009;
 IH_PERF_SEL_CLIENT7_IH_STALL                    =$0000000a;
 IH_PERF_SEL_RB_IDLE                             =$0000000b;
 IH_PERF_SEL_RB_FULL                             =$0000000c;
 IH_PERF_SEL_RB_OVERFLOW                         =$0000000d;
 IH_PERF_SEL_RB_WPTR_WRITEBACK                   =$0000000e;
 IH_PERF_SEL_RB_WPTR_WRAP                        =$0000000f;
 IH_PERF_SEL_RB_RPTR_WRAP                        =$00000010;
 IH_PERF_SEL_MC_WR_IDLE                          =$00000011;
 IH_PERF_SEL_MC_WR_COUNT                         =$00000012;
 IH_PERF_SEL_MC_WR_STALL                         =$00000013;
 IH_PERF_SEL_MC_WR_CLEAN_PENDING                 =$00000014;
 IH_PERF_SEL_MC_WR_CLEAN_STALL                   =$00000015;
 IH_PERF_SEL_BIF_RISING                          =$00000016;
 IH_PERF_SEL_BIF_FALLING                         =$00000017;
 IH_PERF_SEL_CLIENT8_IH_STALL                    =$00000018;
 IH_PERF_SEL_CLIENT9_IH_STALL                    =$00000019;
 IH_PERF_SEL_CLIENT10_IH_STALL                   =$0000001a;
 IH_PERF_SEL_CLIENT11_IH_STALL                   =$0000001b;
 IH_PERF_SEL_CLIENT12_IH_STALL                   =$0000001c;
 IH_PERF_SEL_CLIENT13_IH_STALL                   =$0000001d;
 IH_PERF_SEL_CLIENT14_IH_STALL                   =$0000001e;
 IH_PERF_SEL_CLIENT15_IH_STALL                   =$0000001f;
 IH_PERF_SEL_CLIENT16_IH_STALL                   =$00000020;
 IH_PERF_SEL_CLIENT17_IH_STALL                   =$00000021;
 IH_PERF_SEL_CLIENT18_IH_STALL                   =$00000022;
 IH_PERF_SEL_CLIENT19_IH_STALL                   =$00000023;
 IH_PERF_SEL_CLIENT20_IH_STALL                   =$00000024;
 IH_PERF_SEL_CLIENT21_IH_STALL                   =$00000025;
 IH_PERF_SEL_CLIENT22_IH_STALL                   =$00000026;
 IH_PERF_SEL_RB_FULL_VF0                         =$00000027;
 IH_PERF_SEL_RB_FULL_VF1                         =$00000028;
 IH_PERF_SEL_RB_FULL_VF2                         =$00000029;
 IH_PERF_SEL_RB_FULL_VF3                         =$0000002a;
 IH_PERF_SEL_RB_FULL_VF4                         =$0000002b;
 IH_PERF_SEL_RB_FULL_VF5                         =$0000002c;
 IH_PERF_SEL_RB_FULL_VF6                         =$0000002d;
 IH_PERF_SEL_RB_FULL_VF7                         =$0000002e;
 IH_PERF_SEL_RB_FULL_VF8                         =$0000002f;
 IH_PERF_SEL_RB_FULL_VF9                         =$00000030;
 IH_PERF_SEL_RB_FULL_VF10                        =$00000031;
 IH_PERF_SEL_RB_FULL_VF11                        =$00000032;
 IH_PERF_SEL_RB_FULL_VF12                        =$00000033;
 IH_PERF_SEL_RB_FULL_VF13                        =$00000034;
 IH_PERF_SEL_RB_FULL_VF14                        =$00000035;
 IH_PERF_SEL_RB_FULL_VF15                        =$00000036;
 IH_PERF_SEL_RB_OVERFLOW_VF0                     =$00000037;
 IH_PERF_SEL_RB_OVERFLOW_VF1                     =$00000038;
 IH_PERF_SEL_RB_OVERFLOW_VF2                     =$00000039;
 IH_PERF_SEL_RB_OVERFLOW_VF3                     =$0000003a;
 IH_PERF_SEL_RB_OVERFLOW_VF4                     =$0000003b;
 IH_PERF_SEL_RB_OVERFLOW_VF5                     =$0000003c;
 IH_PERF_SEL_RB_OVERFLOW_VF6                     =$0000003d;
 IH_PERF_SEL_RB_OVERFLOW_VF7                     =$0000003e;
 IH_PERF_SEL_RB_OVERFLOW_VF8                     =$0000003f;
 IH_PERF_SEL_RB_OVERFLOW_VF9                     =$00000040;
 IH_PERF_SEL_RB_OVERFLOW_VF10                    =$00000041;
 IH_PERF_SEL_RB_OVERFLOW_VF11                    =$00000042;
 IH_PERF_SEL_RB_OVERFLOW_VF12                    =$00000043;
 IH_PERF_SEL_RB_OVERFLOW_VF13                    =$00000044;
 IH_PERF_SEL_RB_OVERFLOW_VF14                    =$00000045;
 IH_PERF_SEL_RB_OVERFLOW_VF15                    =$00000046;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF0               =$00000047;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF1               =$00000048;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF2               =$00000049;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF3               =$0000004a;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF4               =$0000004b;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF5               =$0000004c;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF6               =$0000004d;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF7               =$0000004e;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF8               =$0000004f;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF9               =$00000050;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF10              =$00000051;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF11              =$00000052;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF12              =$00000053;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF13              =$00000054;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF14              =$00000055;
 IH_PERF_SEL_RB_WPTR_WRITEBACK_VF15              =$00000056;
 IH_PERF_SEL_RB_WPTR_WRAP_VF0                    =$00000057;
 IH_PERF_SEL_RB_WPTR_WRAP_VF1                    =$00000058;
 IH_PERF_SEL_RB_WPTR_WRAP_VF2                    =$00000059;
 IH_PERF_SEL_RB_WPTR_WRAP_VF3                    =$0000005a;
 IH_PERF_SEL_RB_WPTR_WRAP_VF4                    =$0000005b;
 IH_PERF_SEL_RB_WPTR_WRAP_VF5                    =$0000005c;
 IH_PERF_SEL_RB_WPTR_WRAP_VF6                    =$0000005d;
 IH_PERF_SEL_RB_WPTR_WRAP_VF7                    =$0000005e;
 IH_PERF_SEL_RB_WPTR_WRAP_VF8                    =$0000005f;
 IH_PERF_SEL_RB_WPTR_WRAP_VF9                    =$00000060;
 IH_PERF_SEL_RB_WPTR_WRAP_VF10                   =$00000061;
 IH_PERF_SEL_RB_WPTR_WRAP_VF11                   =$00000062;
 IH_PERF_SEL_RB_WPTR_WRAP_VF12                   =$00000063;
 IH_PERF_SEL_RB_WPTR_WRAP_VF13                   =$00000064;
 IH_PERF_SEL_RB_WPTR_WRAP_VF14                   =$00000065;
 IH_PERF_SEL_RB_WPTR_WRAP_VF15                   =$00000066;
 IH_PERF_SEL_RB_RPTR_WRAP_VF0                    =$00000067;
 IH_PERF_SEL_RB_RPTR_WRAP_VF1                    =$00000068;
 IH_PERF_SEL_RB_RPTR_WRAP_VF2                    =$00000069;
 IH_PERF_SEL_RB_RPTR_WRAP_VF3                    =$0000006a;
 IH_PERF_SEL_RB_RPTR_WRAP_VF4                    =$0000006b;
 IH_PERF_SEL_RB_RPTR_WRAP_VF5                    =$0000006c;
 IH_PERF_SEL_RB_RPTR_WRAP_VF6                    =$0000006d;
 IH_PERF_SEL_RB_RPTR_WRAP_VF7                    =$0000006e;
 IH_PERF_SEL_RB_RPTR_WRAP_VF8                    =$0000006f;
 IH_PERF_SEL_RB_RPTR_WRAP_VF9                    =$00000070;
 IH_PERF_SEL_RB_RPTR_WRAP_VF10                   =$00000071;
 IH_PERF_SEL_RB_RPTR_WRAP_VF11                   =$00000072;
 IH_PERF_SEL_RB_RPTR_WRAP_VF12                   =$00000073;
 IH_PERF_SEL_RB_RPTR_WRAP_VF13                   =$00000074;
 IH_PERF_SEL_RB_RPTR_WRAP_VF14                   =$00000075;
 IH_PERF_SEL_RB_RPTR_WRAP_VF15                   =$00000076;
 IH_PERF_SEL_BIF_RISING_VF0                      =$00000077;
 IH_PERF_SEL_BIF_RISING_VF1                      =$00000078;
 IH_PERF_SEL_BIF_RISING_VF2                      =$00000079;
 IH_PERF_SEL_BIF_RISING_VF3                      =$0000007a;
 IH_PERF_SEL_BIF_RISING_VF4                      =$0000007b;
 IH_PERF_SEL_BIF_RISING_VF5                      =$0000007c;
 IH_PERF_SEL_BIF_RISING_VF6                      =$0000007d;
 IH_PERF_SEL_BIF_RISING_VF7                      =$0000007e;
 IH_PERF_SEL_BIF_RISING_VF8                      =$0000007f;
 IH_PERF_SEL_BIF_RISING_VF9                      =$00000080;
 IH_PERF_SEL_BIF_RISING_VF10                     =$00000081;
 IH_PERF_SEL_BIF_RISING_VF11                     =$00000082;
 IH_PERF_SEL_BIF_RISING_VF12                     =$00000083;
 IH_PERF_SEL_BIF_RISING_VF13                     =$00000084;
 IH_PERF_SEL_BIF_RISING_VF14                     =$00000085;
 IH_PERF_SEL_BIF_RISING_VF15                     =$00000086;
 IH_PERF_SEL_BIF_FALLING_VF0                     =$00000087;
 IH_PERF_SEL_BIF_FALLING_VF1                     =$00000088;
 IH_PERF_SEL_BIF_FALLING_VF2                     =$00000089;
 IH_PERF_SEL_BIF_FALLING_VF3                     =$0000008a;
 IH_PERF_SEL_BIF_FALLING_VF4                     =$0000008b;
 IH_PERF_SEL_BIF_FALLING_VF5                     =$0000008c;
 IH_PERF_SEL_BIF_FALLING_VF6                     =$0000008d;
 IH_PERF_SEL_BIF_FALLING_VF7                     =$0000008e;
 IH_PERF_SEL_BIF_FALLING_VF8                     =$0000008f;
 IH_PERF_SEL_BIF_FALLING_VF9                     =$00000090;
 IH_PERF_SEL_BIF_FALLING_VF10                    =$00000091;
 IH_PERF_SEL_BIF_FALLING_VF11                    =$00000092;
 IH_PERF_SEL_BIF_FALLING_VF12                    =$00000093;
 IH_PERF_SEL_BIF_FALLING_VF13                    =$00000094;
 IH_PERF_SEL_BIF_FALLING_VF14                    =$00000095;
 IH_PERF_SEL_BIF_FALLING_VF15                    =$00000096;
 // IMG_DATA_FORMAT
 IMG_DATA_FORMAT_INVALID                         =$00000000;
 IMG_DATA_FORMAT_8                               =$00000001;
 IMG_DATA_FORMAT_16                              =$00000002;
 IMG_DATA_FORMAT_8_8                             =$00000003;
 IMG_DATA_FORMAT_32                              =$00000004;
 IMG_DATA_FORMAT_16_16                           =$00000005;
 IMG_DATA_FORMAT_10_11_11                        =$00000006;
 IMG_DATA_FORMAT_11_11_10                        =$00000007;
 IMG_DATA_FORMAT_10_10_10_2                      =$00000008;
 IMG_DATA_FORMAT_2_10_10_10                      =$00000009;
 IMG_DATA_FORMAT_8_8_8_8                         =$0000000a;
 IMG_DATA_FORMAT_32_32                           =$0000000b;
 IMG_DATA_FORMAT_16_16_16_16                     =$0000000c;
 IMG_DATA_FORMAT_32_32_32                        =$0000000d;
 IMG_DATA_FORMAT_32_32_32_32                     =$0000000e;
 IMG_DATA_FORMAT_RESERVED_15                     =$0000000f;
 IMG_DATA_FORMAT_5_6_5                           =$00000010;
 IMG_DATA_FORMAT_1_5_5_5                         =$00000011;
 IMG_DATA_FORMAT_5_5_5_1                         =$00000012;
 IMG_DATA_FORMAT_4_4_4_4                         =$00000013;
 IMG_DATA_FORMAT_8_24                            =$00000014;
 IMG_DATA_FORMAT_24_8                            =$00000015;
 IMG_DATA_FORMAT_X24_8_32                        =$00000016;
 IMG_DATA_FORMAT_RESERVED_23                     =$00000017;
 IMG_DATA_FORMAT_RESERVED_24                     =$00000018;
 IMG_DATA_FORMAT_ETC2_RGB                        =$00000018;
 IMG_DATA_FORMAT_RESERVED_25                     =$00000019;
 IMG_DATA_FORMAT_ETC2_RGBA                       =$00000019;
 IMG_DATA_FORMAT_RESERVED_26                     =$0000001a;
 IMG_DATA_FORMAT_ETC2_R                          =$0000001a;
 IMG_DATA_FORMAT_RESERVED_27                     =$0000001b;
 IMG_DATA_FORMAT_ETC2_RG                         =$0000001b;
 IMG_DATA_FORMAT_RESERVED_28                     =$0000001c;
 IMG_DATA_FORMAT_ETC2_RGBA1                      =$0000001c;
 IMG_DATA_FORMAT_RESERVED_29                     =$0000001d;
 IMG_DATA_FORMAT_RESERVED_30                     =$0000001e;
 IMG_DATA_FORMAT_RESERVED_31                     =$0000001f;
 IMG_DATA_FORMAT_GB_GR                           =$00000020;
 IMG_DATA_FORMAT_BG_RG                           =$00000021;
 IMG_DATA_FORMAT_5_9_9_9                         =$00000022;
 IMG_DATA_FORMAT_BC1                             =$00000023;
 IMG_DATA_FORMAT_BC2                             =$00000024;
 IMG_DATA_FORMAT_BC3                             =$00000025;
 IMG_DATA_FORMAT_BC4                             =$00000026;
 IMG_DATA_FORMAT_BC5                             =$00000027;
 IMG_DATA_FORMAT_BC6                             =$00000028;
 IMG_DATA_FORMAT_BC7                             =$00000029;
 IMG_DATA_FORMAT_RESERVED_42                     =$0000002a;
 IMG_DATA_FORMAT_RESERVED_43                     =$0000002b;
 IMG_DATA_FORMAT_FMASK8_S2_F1                    =$0000002c;
 IMG_DATA_FORMAT_FMASK8_S4_F1                    =$0000002d;
 IMG_DATA_FORMAT_FMASK8_S8_F1                    =$0000002e;
 IMG_DATA_FORMAT_FMASK8_S2_F2                    =$0000002f;
 IMG_DATA_FORMAT_FMASK8_S4_F2                    =$00000030;
 IMG_DATA_FORMAT_FMASK8_S4_F4                    =$00000031;
 IMG_DATA_FORMAT_FMASK16_S16_F1                  =$00000032;
 IMG_DATA_FORMAT_FMASK16_S8_F2                   =$00000033;
 IMG_DATA_FORMAT_FMASK32_S16_F2                  =$00000034;
 IMG_DATA_FORMAT_FMASK32_S8_F4                   =$00000035;
 IMG_DATA_FORMAT_FMASK32_S8_F8                   =$00000036;
 IMG_DATA_FORMAT_FMASK64_S16_F4                  =$00000037;
 IMG_DATA_FORMAT_FMASK64_S16_F8                  =$00000038;
 IMG_DATA_FORMAT_4_4                             =$00000039;
 IMG_DATA_FORMAT_6_5_5                           =$0000003a;
 IMG_DATA_FORMAT_1                               =$0000003b;
 IMG_DATA_FORMAT_1_REVERSED                      =$0000003c;
 IMG_DATA_FORMAT_32_AS_8                         =$0000003d;
 IMG_DATA_FORMAT_32_AS_8_8                       =$0000003e;
 IMG_DATA_FORMAT_32_AS_32_32_32_32               =$0000003f;
 // IMG_NUM_FORMAT
 IMG_NUM_FORMAT_UNORM                            =$00000000;
 IMG_NUM_FORMAT_SNORM                            =$00000001;
 IMG_NUM_FORMAT_USCALED                          =$00000002;
 IMG_NUM_FORMAT_SSCALED                          =$00000003;
 IMG_NUM_FORMAT_UINT                             =$00000004;
 IMG_NUM_FORMAT_SINT                             =$00000005;
 IMG_NUM_FORMAT_RESERVED_6                       =$00000006;
 IMG_NUM_FORMAT_FLOAT                            =$00000007;
 IMG_NUM_FORMAT_RESERVED_8                       =$00000008;
 IMG_NUM_FORMAT_SRGB                             =$00000009;
 IMG_NUM_FORMAT_RESERVED_10                      =$0000000a;
 IMG_NUM_FORMAT_RESERVED_11                      =$0000000b;
 IMG_NUM_FORMAT_RESERVED_12                      =$0000000c;
 IMG_NUM_FORMAT_RESERVED_13                      =$0000000d;
 IMG_NUM_FORMAT_RESERVED_14                      =$0000000e;
 IMG_NUM_FORMAT_RESERVED_15                      =$0000000f;
 // MacroTileAspect
 ADDR_SURF_MACRO_ASPECT_1                        =$00000000;
 ADDR_SURF_MACRO_ASPECT_2                        =$00000001;
 ADDR_SURF_MACRO_ASPECT_4                        =$00000002;
 ADDR_SURF_MACRO_ASPECT_8                        =$00000003;
 // MicroTileMode
 ADDR_SURF_DISPLAY_MICRO_TILING                  =$00000000;
 ADDR_SURF_THIN_MICRO_TILING                     =$00000001;
 ADDR_SURF_DEPTH_MICRO_TILING                    =$00000002;
 ADDR_SURF_ROTATED_MICRO_TILING                  =$00000003;
 ADDR_SURF_THICK_MICRO_TILING                    =$00000004;
 // MultiGPUTileSize
 ADDR_CONFIG_GPU_TILE_16                         =$00000000;
 ADDR_CONFIG_GPU_TILE_32                         =$00000001;
 ADDR_CONFIG_GPU_TILE_64                         =$00000002;
 ADDR_CONFIG_GPU_TILE_128                        =$00000003;
 // NonDispTilingOrder
 ADDR_SURF_MICRO_TILING_DISPLAY                  =$00000000;
 ADDR_SURF_MICRO_TILING_NON_DISPLAY              =$00000001;
 // NumBanks
 ADDR_SURF_2_BANK                                =$00000000;
 ADDR_SURF_4_BANK                                =$00000001;
 ADDR_SURF_8_BANK                                =$00000002;
 ADDR_SURF_16_BANK                               =$00000003;
 // NumGPUs
 ADDR_CONFIG_1_GPU                               =$00000000;
 ADDR_CONFIG_2_GPU                               =$00000001;
 ADDR_CONFIG_4_GPU                               =$00000002;
 // NumLowerPipes
 ADDR_CONFIG_1_LOWER_PIPES                       =$00000000;
 ADDR_CONFIG_2_LOWER_PIPES                       =$00000001;
 // NumPipes
 ADDR_CONFIG_1_PIPE                              =$00000000;
 ADDR_CONFIG_2_PIPE                              =$00000001;
 ADDR_CONFIG_4_PIPE                              =$00000002;
 ADDR_CONFIG_8_PIPE                              =$00000003;
 // NumShaderEngines
 ADDR_CONFIG_1_SHADER_ENGINE                     =$00000000;
 ADDR_CONFIG_2_SHADER_ENGINE                     =$00000001;
 // PERFMON_COUNTER_MODE
 PERFMON_COUNTER_MODE_ACCUM                      =$00000000;
 PERFMON_COUNTER_MODE_ACTIVE_CYCLES              =$00000001;
 PERFMON_COUNTER_MODE_MAX                        =$00000002;
 PERFMON_COUNTER_MODE_DIRTY                      =$00000003;
 PERFMON_COUNTER_MODE_SAMPLE                     =$00000004;
 PERFMON_COUNTER_MODE_CYCLES_SINCE_FIRST_EVENT   =$00000005;
 PERFMON_COUNTER_MODE_CYCLES_SINCE_LAST_EVENT    =$00000006;
 PERFMON_COUNTER_MODE_CYCLES_GE_HI               =$00000007;
 PERFMON_COUNTER_MODE_CYCLES_EQ_HI               =$00000008;
 PERFMON_COUNTER_MODE_INACTIVE_CYCLES            =$00000009;
 PERFMON_COUNTER_MODE_RESERVED                   =$0000000f;
 // PERFMON_SPM_MODE
 PERFMON_SPM_MODE_OFF                            =$00000000;
 PERFMON_SPM_MODE_16BIT_CLAMP                    =$00000001;
 PERFMON_SPM_MODE_16BIT_NO_CLAMP                 =$00000002;
 PERFMON_SPM_MODE_32BIT_CLAMP                    =$00000003;
 PERFMON_SPM_MODE_32BIT_NO_CLAMP                 =$00000004;
 PERFMON_SPM_MODE_RESERVED_5                     =$00000005;
 PERFMON_SPM_MODE_RESERVED_6                     =$00000006;
 PERFMON_SPM_MODE_RESERVED_7                     =$00000007;
 PERFMON_SPM_MODE_TEST_MODE_0                    =$00000008;
 PERFMON_SPM_MODE_TEST_MODE_1                    =$00000009;
 PERFMON_SPM_MODE_TEST_MODE_2                    =$0000000a;
 // PerfCounter_Vals
 DB_PERF_SEL_SC_DB_tile_sends                    =$00000000;
 DB_PERF_SEL_SC_DB_tile_busy                     =$00000001;
 DB_PERF_SEL_SC_DB_tile_stalls                   =$00000002;
 DB_PERF_SEL_SC_DB_tile_events                   =$00000003;
 DB_PERF_SEL_SC_DB_tile_tiles                    =$00000004;
 DB_PERF_SEL_SC_DB_tile_covered                  =$00000005;
 DB_PERF_SEL_hiz_tc_read_starved                 =$00000006;
 DB_PERF_SEL_hiz_tc_write_stall                  =$00000007;
 DB_PERF_SEL_hiz_qtiles_culled                   =$00000008;
 DB_PERF_SEL_his_qtiles_culled                   =$00000009;
 DB_PERF_SEL_DB_SC_tile_sends                    =$0000000a;
 DB_PERF_SEL_DB_SC_tile_busy                     =$0000000b;
 DB_PERF_SEL_DB_SC_tile_stalls                   =$0000000c;
 DB_PERF_SEL_DB_SC_tile_df_stalls                =$0000000d;
 DB_PERF_SEL_DB_SC_tile_tiles                    =$0000000e;
 DB_PERF_SEL_DB_SC_tile_culled                   =$0000000f;
 DB_PERF_SEL_DB_SC_tile_hier_kill                =$00000010;
 DB_PERF_SEL_DB_SC_tile_fast_ops                 =$00000011;
 DB_PERF_SEL_DB_SC_tile_no_ops                   =$00000012;
 DB_PERF_SEL_DB_SC_tile_tile_rate                =$00000013;
 DB_PERF_SEL_DB_SC_tile_ssaa_kill                =$00000014;
 DB_PERF_SEL_DB_SC_tile_fast_z_ops               =$00000015;
 DB_PERF_SEL_DB_SC_tile_fast_stencil_ops         =$00000016;
 DB_PERF_SEL_SC_DB_quad_sends                    =$00000017;
 DB_PERF_SEL_SC_DB_quad_busy                     =$00000018;
 DB_PERF_SEL_SC_DB_quad_squads                   =$00000019;
 DB_PERF_SEL_SC_DB_quad_tiles                    =$0000001a;
 DB_PERF_SEL_SC_DB_quad_pixels                   =$0000001b;
 DB_PERF_SEL_SC_DB_quad_killed_tiles             =$0000001c;
 DB_PERF_SEL_DB_SC_quad_sends                    =$0000001d;
 DB_PERF_SEL_DB_SC_quad_busy                     =$0000001e;
 DB_PERF_SEL_DB_SC_quad_stalls                   =$0000001f;
 DB_PERF_SEL_DB_SC_quad_tiles                    =$00000020;
 DB_PERF_SEL_DB_SC_quad_lit_quad                 =$00000021;
 DB_PERF_SEL_DB_CB_tile_sends                    =$00000022;
 DB_PERF_SEL_DB_CB_tile_busy                     =$00000023;
 DB_PERF_SEL_DB_CB_tile_stalls                   =$00000024;
 DB_PERF_SEL_SX_DB_quad_sends                    =$00000025;
 DB_PERF_SEL_SX_DB_quad_busy                     =$00000026;
 DB_PERF_SEL_SX_DB_quad_stalls                   =$00000027;
 DB_PERF_SEL_SX_DB_quad_quads                    =$00000028;
 DB_PERF_SEL_SX_DB_quad_pixels                   =$00000029;
 DB_PERF_SEL_SX_DB_quad_exports                  =$0000002a;
 DB_PERF_SEL_SH_quads_outstanding_sum            =$0000002b;
 DB_PERF_SEL_DB_CB_lquad_sends                   =$0000002c;
 DB_PERF_SEL_DB_CB_lquad_busy                    =$0000002d;
 DB_PERF_SEL_DB_CB_lquad_stalls                  =$0000002e;
 DB_PERF_SEL_DB_CB_lquad_quads                   =$0000002f;
 DB_PERF_SEL_tile_rd_sends                       =$00000030;
 DB_PERF_SEL_mi_tile_rd_outstanding_sum          =$00000031;
 DB_PERF_SEL_quad_rd_sends                       =$00000032;
 DB_PERF_SEL_quad_rd_busy                        =$00000033;
 DB_PERF_SEL_quad_rd_mi_stall                    =$00000034;
 DB_PERF_SEL_quad_rd_rw_collision                =$00000035;
 DB_PERF_SEL_quad_rd_tag_stall                   =$00000036;
 DB_PERF_SEL_quad_rd_32byte_reqs                 =$00000037;
 DB_PERF_SEL_quad_rd_panic                       =$00000038;
 DB_PERF_SEL_mi_quad_rd_outstanding_sum          =$00000039;
 DB_PERF_SEL_quad_rdret_sends                    =$0000003a;
 DB_PERF_SEL_quad_rdret_busy                     =$0000003b;
 DB_PERF_SEL_tile_wr_sends                       =$0000003c;
 DB_PERF_SEL_tile_wr_acks                        =$0000003d;
 DB_PERF_SEL_mi_tile_wr_outstanding_sum          =$0000003e;
 DB_PERF_SEL_quad_wr_sends                       =$0000003f;
 DB_PERF_SEL_quad_wr_busy                        =$00000040;
 DB_PERF_SEL_quad_wr_mi_stall                    =$00000041;
 DB_PERF_SEL_quad_wr_coherency_stall             =$00000042;
 DB_PERF_SEL_quad_wr_acks                        =$00000043;
 DB_PERF_SEL_mi_quad_wr_outstanding_sum          =$00000044;
 DB_PERF_SEL_Tile_Cache_misses                   =$00000045;
 DB_PERF_SEL_Tile_Cache_hits                     =$00000046;
 DB_PERF_SEL_Tile_Cache_flushes                  =$00000047;
 DB_PERF_SEL_Tile_Cache_surface_stall            =$00000048;
 DB_PERF_SEL_Tile_Cache_starves                  =$00000049;
 DB_PERF_SEL_Tile_Cache_mem_return_starve        =$0000004a;
 DB_PERF_SEL_tcp_dispatcher_reads                =$0000004b;
 DB_PERF_SEL_tcp_prefetcher_reads                =$0000004c;
 DB_PERF_SEL_tcp_preloader_reads                 =$0000004d;
 DB_PERF_SEL_tcp_dispatcher_flushes              =$0000004e;
 DB_PERF_SEL_tcp_prefetcher_flushes              =$0000004f;
 DB_PERF_SEL_tcp_preloader_flushes               =$00000050;
 DB_PERF_SEL_Depth_Tile_Cache_sends              =$00000051;
 DB_PERF_SEL_Depth_Tile_Cache_busy               =$00000052;
 DB_PERF_SEL_Depth_Tile_Cache_starves            =$00000053;
 DB_PERF_SEL_Depth_Tile_Cache_dtile_locked       =$00000054;
 DB_PERF_SEL_Depth_Tile_Cache_alloc_stall        =$00000055;
 DB_PERF_SEL_Depth_Tile_Cache_misses             =$00000056;
 DB_PERF_SEL_Depth_Tile_Cache_hits               =$00000057;
 DB_PERF_SEL_Depth_Tile_Cache_flushes            =$00000058;
 DB_PERF_SEL_Depth_Tile_Cache_noop_tile          =$00000059;
 DB_PERF_SEL_Depth_Tile_Cache_detailed_noop      =$0000005a;
 DB_PERF_SEL_Depth_Tile_Cache_event              =$0000005b;
 DB_PERF_SEL_Depth_Tile_Cache_tile_frees         =$0000005c;
 DB_PERF_SEL_Depth_Tile_Cache_data_frees         =$0000005d;
 DB_PERF_SEL_Depth_Tile_Cache_mem_return_starve  =$0000005e;
 DB_PERF_SEL_Stencil_Cache_misses                =$0000005f;
 DB_PERF_SEL_Stencil_Cache_hits                  =$00000060;
 DB_PERF_SEL_Stencil_Cache_flushes               =$00000061;
 DB_PERF_SEL_Stencil_Cache_starves               =$00000062;
 DB_PERF_SEL_Stencil_Cache_frees                 =$00000063;
 DB_PERF_SEL_Z_Cache_separate_Z_misses           =$00000064;
 DB_PERF_SEL_Z_Cache_separate_Z_hits             =$00000065;
 DB_PERF_SEL_Z_Cache_separate_Z_flushes          =$00000066;
 DB_PERF_SEL_Z_Cache_separate_Z_starves          =$00000067;
 DB_PERF_SEL_Z_Cache_pmask_misses                =$00000068;
 DB_PERF_SEL_Z_Cache_pmask_hits                  =$00000069;
 DB_PERF_SEL_Z_Cache_pmask_flushes               =$0000006a;
 DB_PERF_SEL_Z_Cache_pmask_starves               =$0000006b;
 DB_PERF_SEL_Z_Cache_frees                       =$0000006c;
 DB_PERF_SEL_Plane_Cache_misses                  =$0000006d;
 DB_PERF_SEL_Plane_Cache_hits                    =$0000006e;
 DB_PERF_SEL_Plane_Cache_flushes                 =$0000006f;
 DB_PERF_SEL_Plane_Cache_starves                 =$00000070;
 DB_PERF_SEL_Plane_Cache_frees                   =$00000071;
 DB_PERF_SEL_flush_expanded_stencil              =$00000072;
 DB_PERF_SEL_flush_compressed_stencil            =$00000073;
 DB_PERF_SEL_flush_single_stencil                =$00000074;
 DB_PERF_SEL_planes_flushed                      =$00000075;
 DB_PERF_SEL_flush_1plane                        =$00000076;
 DB_PERF_SEL_flush_2plane                        =$00000077;
 DB_PERF_SEL_flush_3plane                        =$00000078;
 DB_PERF_SEL_flush_4plane                        =$00000079;
 DB_PERF_SEL_flush_5plane                        =$0000007a;
 DB_PERF_SEL_flush_6plane                        =$0000007b;
 DB_PERF_SEL_flush_7plane                        =$0000007c;
 DB_PERF_SEL_flush_8plane                        =$0000007d;
 DB_PERF_SEL_flush_9plane                        =$0000007e;
 DB_PERF_SEL_flush_10plane                       =$0000007f;
 DB_PERF_SEL_flush_11plane                       =$00000080;
 DB_PERF_SEL_flush_12plane                       =$00000081;
 DB_PERF_SEL_flush_13plane                       =$00000082;
 DB_PERF_SEL_flush_14plane                       =$00000083;
 DB_PERF_SEL_flush_15plane                       =$00000084;
 DB_PERF_SEL_flush_16plane                       =$00000085;
 DB_PERF_SEL_flush_expanded_z                    =$00000086;
 DB_PERF_SEL_earlyZ_waiting_for_postZ_done       =$00000087;
 DB_PERF_SEL_reZ_waiting_for_postZ_done          =$00000088;
 DB_PERF_SEL_dk_tile_sends                       =$00000089;
 DB_PERF_SEL_dk_tile_busy                        =$0000008a;
 DB_PERF_SEL_dk_tile_quad_starves                =$0000008b;
 DB_PERF_SEL_dk_tile_stalls                      =$0000008c;
 DB_PERF_SEL_dk_squad_sends                      =$0000008d;
 DB_PERF_SEL_dk_squad_busy                       =$0000008e;
 DB_PERF_SEL_dk_squad_stalls                     =$0000008f;
 DB_PERF_SEL_Op_Pipe_Busy                        =$00000090;
 DB_PERF_SEL_Op_Pipe_MC_Read_stall               =$00000091;
 DB_PERF_SEL_qc_busy                             =$00000092;
 DB_PERF_SEL_qc_xfc                              =$00000093;
 DB_PERF_SEL_qc_conflicts                        =$00000094;
 DB_PERF_SEL_qc_full_stall                       =$00000095;
 DB_PERF_SEL_qc_in_preZ_tile_stalls_postZ        =$00000096;
 DB_PERF_SEL_qc_in_postZ_tile_stalls_preZ        =$00000097;
 DB_PERF_SEL_tsc_insert_summarize_stall          =$00000098;
 DB_PERF_SEL_tl_busy                             =$00000099;
 DB_PERF_SEL_tl_dtc_read_starved                 =$0000009a;
 DB_PERF_SEL_tl_z_fetch_stall                    =$0000009b;
 DB_PERF_SEL_tl_stencil_stall                    =$0000009c;
 DB_PERF_SEL_tl_z_decompress_stall               =$0000009d;
 DB_PERF_SEL_tl_stencil_locked_stall             =$0000009e;
 DB_PERF_SEL_tl_events                           =$0000009f;
 DB_PERF_SEL_tl_summarize_squads                 =$000000a0;
 DB_PERF_SEL_tl_flush_expand_squads              =$000000a1;
 DB_PERF_SEL_tl_expand_squads                    =$000000a2;
 DB_PERF_SEL_tl_preZ_squads                      =$000000a3;
 DB_PERF_SEL_tl_postZ_squads                     =$000000a4;
 DB_PERF_SEL_tl_preZ_noop_squads                 =$000000a5;
 DB_PERF_SEL_tl_postZ_noop_squads                =$000000a6;
 DB_PERF_SEL_tl_tile_ops                         =$000000a7;
 DB_PERF_SEL_tl_in_xfc                           =$000000a8;
 DB_PERF_SEL_tl_in_single_stencil_expand_stall   =$000000a9;
 DB_PERF_SEL_tl_in_fast_z_stall                  =$000000aa;
 DB_PERF_SEL_tl_out_xfc                          =$000000ab;
 DB_PERF_SEL_tl_out_squads                       =$000000ac;
 DB_PERF_SEL_zf_plane_multicycle                 =$000000ad;
 DB_PERF_SEL_PostZ_Samples_passing_Z             =$000000ae;
 DB_PERF_SEL_PostZ_Samples_failing_Z             =$000000af;
 DB_PERF_SEL_PostZ_Samples_failing_S             =$000000b0;
 DB_PERF_SEL_PreZ_Samples_passing_Z              =$000000b1;
 DB_PERF_SEL_PreZ_Samples_failing_Z              =$000000b2;
 DB_PERF_SEL_PreZ_Samples_failing_S              =$000000b3;
 DB_PERF_SEL_ts_tc_update_stall                  =$000000b4;
 DB_PERF_SEL_sc_kick_start                       =$000000b5;
 DB_PERF_SEL_sc_kick_end                         =$000000b6;
 DB_PERF_SEL_clock_reg_active                    =$000000b7;
 DB_PERF_SEL_clock_main_active                   =$000000b8;
 DB_PERF_SEL_clock_mem_export_active             =$000000b9;
 DB_PERF_SEL_esr_ps_out_busy                     =$000000ba;
 DB_PERF_SEL_esr_ps_lqf_busy                     =$000000bb;
 DB_PERF_SEL_esr_ps_lqf_stall                    =$000000bc;
 DB_PERF_SEL_etr_out_send                        =$000000bd;
 DB_PERF_SEL_etr_out_busy                        =$000000be;
 DB_PERF_SEL_etr_out_ltile_probe_fifo_full_stall =$000000bf;
 DB_PERF_SEL_etr_out_cb_tile_stall               =$000000c0;
 DB_PERF_SEL_etr_out_esr_stall                   =$000000c1;
 DB_PERF_SEL_esr_ps_sqq_busy                     =$000000c2;
 DB_PERF_SEL_esr_ps_sqq_stall                    =$000000c3;
 DB_PERF_SEL_esr_eot_fwd_busy                    =$000000c4;
 DB_PERF_SEL_esr_eot_fwd_holding_squad           =$000000c5;
 DB_PERF_SEL_esr_eot_fwd_forward                 =$000000c6;
 DB_PERF_SEL_esr_sqq_zi_busy                     =$000000c7;
 DB_PERF_SEL_esr_sqq_zi_stall                    =$000000c8;
 DB_PERF_SEL_postzl_sq_pt_busy                   =$000000c9;
 DB_PERF_SEL_postzl_sq_pt_stall                  =$000000ca;
 DB_PERF_SEL_postzl_se_busy                      =$000000cb;
 DB_PERF_SEL_postzl_se_stall                     =$000000cc;
 DB_PERF_SEL_postzl_partial_launch               =$000000cd;
 DB_PERF_SEL_postzl_full_launch                  =$000000ce;
 DB_PERF_SEL_postzl_partial_waiting              =$000000cf;
 DB_PERF_SEL_postzl_tile_mem_stall               =$000000d0;
 DB_PERF_SEL_postzl_tile_init_stall              =$000000d1;
 DB_PEFF_SEL_prezl_tile_mem_stall                =$000000d2;
 DB_PERF_SEL_prezl_tile_init_stall               =$000000d3;
 DB_PERF_SEL_dtt_sm_clash_stall                  =$000000d4;
 DB_PERF_SEL_dtt_sm_slot_stall                   =$000000d5;
 DB_PERF_SEL_dtt_sm_miss_stall                   =$000000d6;
 DB_PERF_SEL_mi_rdreq_busy                       =$000000d7;
 DB_PERF_SEL_mi_rdreq_stall                      =$000000d8;
 DB_PERF_SEL_mi_wrreq_busy                       =$000000d9;
 DB_PERF_SEL_mi_wrreq_stall                      =$000000da;
 DB_PERF_SEL_recomp_tile_to_1zplane_no_fastop    =$000000db;
 DB_PERF_SEL_dkg_tile_rate_tile                  =$000000dc;
 DB_PERF_SEL_prezl_src_in_sends                  =$000000dd;
 DB_PERF_SEL_prezl_src_in_stall                  =$000000de;
 DB_PERF_SEL_prezl_src_in_squads                 =$000000df;
 DB_PERF_SEL_prezl_src_in_squads_unrolled        =$000000e0;
 DB_PERF_SEL_prezl_src_in_tile_rate              =$000000e1;
 DB_PERF_SEL_prezl_src_in_tile_rate_unrolled     =$000000e2;
 DB_PERF_SEL_prezl_src_out_stall                 =$000000e3;
 DB_PERF_SEL_postzl_src_in_sends                 =$000000e4;
 DB_PERF_SEL_postzl_src_in_stall                 =$000000e5;
 DB_PERF_SEL_postzl_src_in_squads                =$000000e6;
 DB_PERF_SEL_postzl_src_in_squads_unrolled       =$000000e7;
 DB_PERF_SEL_postzl_src_in_tile_rate             =$000000e8;
 DB_PERF_SEL_postzl_src_in_tile_rate_unrolled    =$000000e9;
 DB_PERF_SEL_postzl_src_out_stall                =$000000ea;
 DB_PERF_SEL_esr_ps_src_in_sends                 =$000000eb;
 DB_PERF_SEL_esr_ps_src_in_stall                 =$000000ec;
 DB_PERF_SEL_esr_ps_src_in_squads                =$000000ed;
 DB_PERF_SEL_esr_ps_src_in_squads_unrolled       =$000000ee;
 DB_PERF_SEL_esr_ps_src_in_tile_rate             =$000000ef;
 DB_PERF_SEL_esr_ps_src_in_tile_rate_unrolled    =$000000f0;
 DB_PERF_SEL_esr_ps_src_out_stall                =$000000f2;
 DB_PERF_SEL_depth_bounds_qtiles_culled          =$000000f3;
 DB_PERF_SEL_PreZ_Samples_failing_DB             =$000000f4;
 DB_PERF_SEL_PostZ_Samples_failing_DB            =$000000f5;
 DB_PERF_SEL_flush_compressed                    =$000000f6;
 DB_PERF_SEL_flush_plane_le4                     =$000000f7;
 DB_PERF_SEL_tiles_z_fully_summarized            =$000000f8;
 DB_PERF_SEL_tiles_stencil_fully_summarized      =$000000f9;
 DB_PERF_SEL_tiles_z_clear_on_expclear           =$000000fa;
 DB_PERF_SEL_tiles_s_clear_on_expclear           =$000000fb;
 DB_PERF_SEL_tiles_decomp_on_expclear            =$000000fc;
 DB_PERF_SEL_tiles_compressed_to_decompressed    =$000000fd;
 DB_PERF_SEL_Op_Pipe_Prez_Busy                   =$000000fe;
 DB_PERF_SEL_Op_Pipe_Postz_Busy                  =$000000ff;
 DB_PERF_SEL_di_dt_stall                         =$00000100;
 // PipeConfig
 ADDR_SURF_P2                                    =$00000000;
 ADDR_SURF_P2_RESERVED0                          =$00000001;
 ADDR_SURF_P2_RESERVED1                          =$00000002;
 ADDR_SURF_P2_RESERVED2                          =$00000003;
 ADDR_SURF_P4_8x16                               =$00000004;
 ADDR_SURF_P4_16x16                              =$00000005;
 ADDR_SURF_P4_16x32                              =$00000006;
 ADDR_SURF_P4_32x32                              =$00000007;
 ADDR_SURF_P8_16x16_8x16                         =$00000008;
 ADDR_SURF_P8_16x32_8x16                         =$00000009;
 ADDR_SURF_P8_32x32_8x16                         =$0000000a;
 ADDR_SURF_P8_16x32_16x16                        =$0000000b;
 ADDR_SURF_P8_32x32_16x16                        =$0000000c;
 ADDR_SURF_P8_32x32_16x32                        =$0000000d;
 ADDR_SURF_P8_32x64_32x32                        =$0000000e;
 ADDR_SURF_P8_RESERVED0                          =$0000000f;
 ADDR_SURF_P16_32x32_8x16                        =$00000010;
 ADDR_SURF_P16_32x32_16x16                       =$00000011;
 // PipeInterleaveSize
 ADDR_CONFIG_PIPE_INTERLEAVE_256B                =$00000000;
 ADDR_CONFIG_PIPE_INTERLEAVE_512B                =$00000001;
 // PipeTiling
 CONFIG_1_PIPE                                   =$00000000;
 CONFIG_2_PIPE                                   =$00000001;
 CONFIG_4_PIPE                                   =$00000002;
 CONFIG_8_PIPE                                   =$00000003;
 // PixelPipeCounterId
 PIXEL_PIPE_OCCLUSION_COUNT_0                    =$00000000;
 PIXEL_PIPE_OCCLUSION_COUNT_1                    =$00000001;
 PIXEL_PIPE_OCCLUSION_COUNT_2                    =$00000002;
 PIXEL_PIPE_OCCLUSION_COUNT_3                    =$00000003;
 PIXEL_PIPE_SCREEN_MIN_EXTENTS_0                 =$00000004;
 PIXEL_PIPE_SCREEN_MAX_EXTENTS_0                 =$00000005;
 PIXEL_PIPE_SCREEN_MIN_EXTENTS_1                 =$00000006;
 PIXEL_PIPE_SCREEN_MAX_EXTENTS_1                 =$00000007;
 // PixelPipeStride
 PIXEL_PIPE_STRIDE_32_BITS                       =$00000000;
 PIXEL_PIPE_STRIDE_64_BITS                       =$00000001;
 PIXEL_PIPE_STRIDE_128_BITS                      =$00000002;
 PIXEL_PIPE_STRIDE_256_BITS                      =$00000003;
 // PkrMap
 RASTER_CONFIG_PKR_MAP_0                         =$00000000;
 RASTER_CONFIG_PKR_MAP_1                         =$00000001;
 RASTER_CONFIG_PKR_MAP_2                         =$00000002;
 RASTER_CONFIG_PKR_MAP_3                         =$00000003;
 // PkrXsel
 RASTER_CONFIG_PKR_XSEL_0                        =$00000000;
 RASTER_CONFIG_PKR_XSEL_1                        =$00000001;
 RASTER_CONFIG_PKR_XSEL_2                        =$00000002;
 RASTER_CONFIG_PKR_XSEL_3                        =$00000003;
 // PkrXsel2
 RASTER_CONFIG_PKR_XSEL2_0                       =$00000000;
 RASTER_CONFIG_PKR_XSEL2_1                       =$00000001;
 RASTER_CONFIG_PKR_XSEL2_2                       =$00000002;
 RASTER_CONFIG_PKR_XSEL2_3                       =$00000003;
 // PkrYsel
 RASTER_CONFIG_PKR_YSEL_0                        =$00000000;
 RASTER_CONFIG_PKR_YSEL_1                        =$00000001;
 RASTER_CONFIG_PKR_YSEL_2                        =$00000002;
 RASTER_CONFIG_PKR_YSEL_3                        =$00000003;
 // QuadExportFormat
 EXPORT_UNUSED                                   =$00000000;
 EXPORT_32_R                                     =$00000001;
 EXPORT_32_GR                                    =$00000002;
 EXPORT_32_AR                                    =$00000003;
 EXPORT_FP16_ABGR                                =$00000004;
 EXPORT_UNSIGNED16_ABGR                          =$00000005;
 EXPORT_SIGNED16_ABGR                            =$00000006;
 EXPORT_32_ABGR                                  =$00000007;
 // QuadExportFormatOld
 EXPORT_4P_32BPC_ABGR                            =$00000000;
 EXPORT_4P_16BPC_ABGR                            =$00000001;
 EXPORT_4P_32BPC_GR                              =$00000002;
 EXPORT_4P_32BPC_AR                              =$00000003;
 EXPORT_2P_32BPC_ABGR                            =$00000004;
 EXPORT_8P_32BPC_R                               =$00000005;
 // RbMap
 RASTER_CONFIG_RB_MAP_0                          =$00000000;
 RASTER_CONFIG_RB_MAP_1                          =$00000001;
 RASTER_CONFIG_RB_MAP_2                          =$00000002;
 RASTER_CONFIG_RB_MAP_3                          =$00000003;
 // RbXsel
 RASTER_CONFIG_RB_XSEL_0                         =$00000000;
 RASTER_CONFIG_RB_XSEL_1                         =$00000001;
 // RbXsel2
 RASTER_CONFIG_RB_XSEL2_0                        =$00000000;
 RASTER_CONFIG_RB_XSEL2_1                        =$00000001;
 RASTER_CONFIG_RB_XSEL2_2                        =$00000002;
 RASTER_CONFIG_RB_XSEL2_3                        =$00000003;
 // RbYsel
 RASTER_CONFIG_RB_YSEL_0                         =$00000000;
 RASTER_CONFIG_RB_YSEL_1                         =$00000001;
 // ReadSize
 READ_256_BITS                                   =$00000000;
 READ_512_BITS                                   =$00000001;
 // RingCounterControl
 COUNTER_RING_SPLIT                              =$00000000;
 COUNTER_RING_0                                  =$00000001;
 COUNTER_RING_1                                  =$00000002;
 // RoundMode
 ROUND_BY_HALF                                   =$00000000;
 ROUND_TRUNCATE                                  =$00000001;
 // RowSize
 ADDR_CONFIG_1KB_ROW                             =$00000000;
 ADDR_CONFIG_2KB_ROW                             =$00000001;
 ADDR_CONFIG_4KB_ROW                             =$00000002;
 // RowTiling
 CONFIG_1KB_ROW                                  =$00000000;
 CONFIG_2KB_ROW                                  =$00000001;
 CONFIG_4KB_ROW                                  =$00000002;
 CONFIG_8KB_ROW                                  =$00000003;
 CONFIG_1KB_ROW_OPT                              =$00000004;
 CONFIG_2KB_ROW_OPT                              =$00000005;
 CONFIG_4KB_ROW_OPT                              =$00000006;
 CONFIG_8KB_ROW_OPT                              =$00000007;
 // SC_PERFCNT_SEL
 SC_SRPS_WINDOW_VALID                            =$00000000;
 SC_PSSW_WINDOW_VALID                            =$00000001;
 SC_TPQZ_WINDOW_VALID                            =$00000002;
 SC_QZQP_WINDOW_VALID                            =$00000003;
 SC_TRPK_WINDOW_VALID                            =$00000004;
 SC_SRPS_WINDOW_VALID_BUSY                       =$00000005;
 SC_PSSW_WINDOW_VALID_BUSY                       =$00000006;
 SC_TPQZ_WINDOW_VALID_BUSY                       =$00000007;
 SC_QZQP_WINDOW_VALID_BUSY                       =$00000008;
 SC_TRPK_WINDOW_VALID_BUSY                       =$00000009;
 SC_STARVED_BY_PA                                =$0000000a;
 SC_STALLED_BY_PRIMFIFO                          =$0000000b;
 SC_STALLED_BY_DB_TILE                           =$0000000c;
 SC_STARVED_BY_DB_TILE                           =$0000000d;
 SC_STALLED_BY_TILEORDERFIFO                     =$0000000e;
 SC_STALLED_BY_TILEFIFO                          =$0000000f;
 SC_STALLED_BY_DB_QUAD                           =$00000010;
 SC_STARVED_BY_DB_QUAD                           =$00000011;
 SC_STALLED_BY_QUADFIFO                          =$00000012;
 SC_STALLED_BY_BCI                               =$00000013;
 SC_STALLED_BY_SPI                               =$00000014;
 SC_SCISSOR_DISCARD                              =$00000015;
 SC_BB_DISCARD                                   =$00000016;
 SC_SUPERTILE_COUNT                              =$00000017;
 SC_SUPERTILE_PER_PRIM_H0                        =$00000018;
 SC_SUPERTILE_PER_PRIM_H1                        =$00000019;
 SC_SUPERTILE_PER_PRIM_H2                        =$0000001a;
 SC_SUPERTILE_PER_PRIM_H3                        =$0000001b;
 SC_SUPERTILE_PER_PRIM_H4                        =$0000001c;
 SC_SUPERTILE_PER_PRIM_H5                        =$0000001d;
 SC_SUPERTILE_PER_PRIM_H6                        =$0000001e;
 SC_SUPERTILE_PER_PRIM_H7                        =$0000001f;
 SC_SUPERTILE_PER_PRIM_H8                        =$00000020;
 SC_SUPERTILE_PER_PRIM_H9                        =$00000021;
 SC_SUPERTILE_PER_PRIM_H10                       =$00000022;
 SC_SUPERTILE_PER_PRIM_H11                       =$00000023;
 SC_SUPERTILE_PER_PRIM_H12                       =$00000024;
 SC_SUPERTILE_PER_PRIM_H13                       =$00000025;
 SC_SUPERTILE_PER_PRIM_H14                       =$00000026;
 SC_SUPERTILE_PER_PRIM_H15                       =$00000027;
 SC_SUPERTILE_PER_PRIM_H16                       =$00000028;
 SC_TILE_PER_PRIM_H0                             =$00000029;
 SC_TILE_PER_PRIM_H1                             =$0000002a;
 SC_TILE_PER_PRIM_H2                             =$0000002b;
 SC_TILE_PER_PRIM_H3                             =$0000002c;
 SC_TILE_PER_PRIM_H4                             =$0000002d;
 SC_TILE_PER_PRIM_H5                             =$0000002e;
 SC_TILE_PER_PRIM_H6                             =$0000002f;
 SC_TILE_PER_PRIM_H7                             =$00000030;
 SC_TILE_PER_PRIM_H8                             =$00000031;
 SC_TILE_PER_PRIM_H9                             =$00000032;
 SC_TILE_PER_PRIM_H10                            =$00000033;
 SC_TILE_PER_PRIM_H11                            =$00000034;
 SC_TILE_PER_PRIM_H12                            =$00000035;
 SC_TILE_PER_PRIM_H13                            =$00000036;
 SC_TILE_PER_PRIM_H14                            =$00000037;
 SC_TILE_PER_PRIM_H15                            =$00000038;
 SC_TILE_PER_PRIM_H16                            =$00000039;
 SC_TILE_PER_SUPERTILE_H0                        =$0000003a;
 SC_TILE_PER_SUPERTILE_H1                        =$0000003b;
 SC_TILE_PER_SUPERTILE_H2                        =$0000003c;
 SC_TILE_PER_SUPERTILE_H3                        =$0000003d;
 SC_TILE_PER_SUPERTILE_H4                        =$0000003e;
 SC_TILE_PER_SUPERTILE_H5                        =$0000003f;
 SC_TILE_PER_SUPERTILE_H6                        =$00000040;
 SC_TILE_PER_SUPERTILE_H7                        =$00000041;
 SC_TILE_PER_SUPERTILE_H8                        =$00000042;
 SC_TILE_PER_SUPERTILE_H9                        =$00000043;
 SC_TILE_PER_SUPERTILE_H10                       =$00000044;
 SC_TILE_PER_SUPERTILE_H11                       =$00000045;
 SC_TILE_PER_SUPERTILE_H12                       =$00000046;
 SC_TILE_PER_SUPERTILE_H13                       =$00000047;
 SC_TILE_PER_SUPERTILE_H14                       =$00000048;
 SC_TILE_PER_SUPERTILE_H15                       =$00000049;
 SC_TILE_PER_SUPERTILE_H16                       =$0000004a;
 SC_TILE_PICKED_H1                               =$0000004b;
 SC_TILE_PICKED_H2                               =$0000004c;
 SC_TILE_PICKED_H3                               =$0000004d;
 SC_TILE_PICKED_H4                               =$0000004e;
 SC_QZ0_MULTI_GPU_TILE_DISCARD                   =$0000004f;
 SC_QZ1_MULTI_GPU_TILE_DISCARD                   =$00000050;
 SC_QZ2_MULTI_GPU_TILE_DISCARD                   =$00000051;
 SC_QZ3_MULTI_GPU_TILE_DISCARD                   =$00000052;
 SC_QZ0_TILE_COUNT                               =$00000053;
 SC_QZ1_TILE_COUNT                               =$00000054;
 SC_QZ2_TILE_COUNT                               =$00000055;
 SC_QZ3_TILE_COUNT                               =$00000056;
 SC_QZ0_TILE_COVERED_COUNT                       =$00000057;
 SC_QZ1_TILE_COVERED_COUNT                       =$00000058;
 SC_QZ2_TILE_COVERED_COUNT                       =$00000059;
 SC_QZ3_TILE_COVERED_COUNT                       =$0000005a;
 SC_QZ0_TILE_NOT_COVERED_COUNT                   =$0000005b;
 SC_QZ1_TILE_NOT_COVERED_COUNT                   =$0000005c;
 SC_QZ2_TILE_NOT_COVERED_COUNT                   =$0000005d;
 SC_QZ3_TILE_NOT_COVERED_COUNT                   =$0000005e;
 SC_QZ0_QUAD_PER_TILE_H0                         =$0000005f;
 SC_QZ0_QUAD_PER_TILE_H1                         =$00000060;
 SC_QZ0_QUAD_PER_TILE_H2                         =$00000061;
 SC_QZ0_QUAD_PER_TILE_H3                         =$00000062;
 SC_QZ0_QUAD_PER_TILE_H4                         =$00000063;
 SC_QZ0_QUAD_PER_TILE_H5                         =$00000064;
 SC_QZ0_QUAD_PER_TILE_H6                         =$00000065;
 SC_QZ0_QUAD_PER_TILE_H7                         =$00000066;
 SC_QZ0_QUAD_PER_TILE_H8                         =$00000067;
 SC_QZ0_QUAD_PER_TILE_H9                         =$00000068;
 SC_QZ0_QUAD_PER_TILE_H10                        =$00000069;
 SC_QZ0_QUAD_PER_TILE_H11                        =$0000006a;
 SC_QZ0_QUAD_PER_TILE_H12                        =$0000006b;
 SC_QZ0_QUAD_PER_TILE_H13                        =$0000006c;
 SC_QZ0_QUAD_PER_TILE_H14                        =$0000006d;
 SC_QZ0_QUAD_PER_TILE_H15                        =$0000006e;
 SC_QZ0_QUAD_PER_TILE_H16                        =$0000006f;
 SC_QZ1_QUAD_PER_TILE_H0                         =$00000070;
 SC_QZ1_QUAD_PER_TILE_H1                         =$00000071;
 SC_QZ1_QUAD_PER_TILE_H2                         =$00000072;
 SC_QZ1_QUAD_PER_TILE_H3                         =$00000073;
 SC_QZ1_QUAD_PER_TILE_H4                         =$00000074;
 SC_QZ1_QUAD_PER_TILE_H5                         =$00000075;
 SC_QZ1_QUAD_PER_TILE_H6                         =$00000076;
 SC_QZ1_QUAD_PER_TILE_H7                         =$00000077;
 SC_QZ1_QUAD_PER_TILE_H8                         =$00000078;
 SC_QZ1_QUAD_PER_TILE_H9                         =$00000079;
 SC_QZ1_QUAD_PER_TILE_H10                        =$0000007a;
 SC_QZ1_QUAD_PER_TILE_H11                        =$0000007b;
 SC_QZ1_QUAD_PER_TILE_H12                        =$0000007c;
 SC_QZ1_QUAD_PER_TILE_H13                        =$0000007d;
 SC_QZ1_QUAD_PER_TILE_H14                        =$0000007e;
 SC_QZ1_QUAD_PER_TILE_H15                        =$0000007f;
 SC_QZ1_QUAD_PER_TILE_H16                        =$00000080;
 SC_QZ2_QUAD_PER_TILE_H0                         =$00000081;
 SC_QZ2_QUAD_PER_TILE_H1                         =$00000082;
 SC_QZ2_QUAD_PER_TILE_H2                         =$00000083;
 SC_QZ2_QUAD_PER_TILE_H3                         =$00000084;
 SC_QZ2_QUAD_PER_TILE_H4                         =$00000085;
 SC_QZ2_QUAD_PER_TILE_H5                         =$00000086;
 SC_QZ2_QUAD_PER_TILE_H6                         =$00000087;
 SC_QZ2_QUAD_PER_TILE_H7                         =$00000088;
 SC_QZ2_QUAD_PER_TILE_H8                         =$00000089;
 SC_QZ2_QUAD_PER_TILE_H9                         =$0000008a;
 SC_QZ2_QUAD_PER_TILE_H10                        =$0000008b;
 SC_QZ2_QUAD_PER_TILE_H11                        =$0000008c;
 SC_QZ2_QUAD_PER_TILE_H12                        =$0000008d;
 SC_QZ2_QUAD_PER_TILE_H13                        =$0000008e;
 SC_QZ2_QUAD_PER_TILE_H14                        =$0000008f;
 SC_QZ2_QUAD_PER_TILE_H15                        =$00000090;
 SC_QZ2_QUAD_PER_TILE_H16                        =$00000091;
 SC_QZ3_QUAD_PER_TILE_H0                         =$00000092;
 SC_QZ3_QUAD_PER_TILE_H1                         =$00000093;
 SC_QZ3_QUAD_PER_TILE_H2                         =$00000094;
 SC_QZ3_QUAD_PER_TILE_H3                         =$00000095;
 SC_QZ3_QUAD_PER_TILE_H4                         =$00000096;
 SC_QZ3_QUAD_PER_TILE_H5                         =$00000097;
 SC_QZ3_QUAD_PER_TILE_H6                         =$00000098;
 SC_QZ3_QUAD_PER_TILE_H7                         =$00000099;
 SC_QZ3_QUAD_PER_TILE_H8                         =$0000009a;
 SC_QZ3_QUAD_PER_TILE_H9                         =$0000009b;
 SC_QZ3_QUAD_PER_TILE_H10                        =$0000009c;
 SC_QZ3_QUAD_PER_TILE_H11                        =$0000009d;
 SC_QZ3_QUAD_PER_TILE_H12                        =$0000009e;
 SC_QZ3_QUAD_PER_TILE_H13                        =$0000009f;
 SC_QZ3_QUAD_PER_TILE_H14                        =$000000a0;
 SC_QZ3_QUAD_PER_TILE_H15                        =$000000a1;
 SC_QZ3_QUAD_PER_TILE_H16                        =$000000a2;
 SC_QZ0_QUAD_COUNT                               =$000000a3;
 SC_QZ1_QUAD_COUNT                               =$000000a4;
 SC_QZ2_QUAD_COUNT                               =$000000a5;
 SC_QZ3_QUAD_COUNT                               =$000000a6;
 SC_P0_HIZ_TILE_COUNT                            =$000000a7;
 SC_P1_HIZ_TILE_COUNT                            =$000000a8;
 SC_P2_HIZ_TILE_COUNT                            =$000000a9;
 SC_P3_HIZ_TILE_COUNT                            =$000000aa;
 SC_P0_HIZ_QUAD_PER_TILE_H0                      =$000000ab;
 SC_P0_HIZ_QUAD_PER_TILE_H1                      =$000000ac;
 SC_P0_HIZ_QUAD_PER_TILE_H2                      =$000000ad;
 SC_P0_HIZ_QUAD_PER_TILE_H3                      =$000000ae;
 SC_P0_HIZ_QUAD_PER_TILE_H4                      =$000000af;
 SC_P0_HIZ_QUAD_PER_TILE_H5                      =$000000b0;
 SC_P0_HIZ_QUAD_PER_TILE_H6                      =$000000b1;
 SC_P0_HIZ_QUAD_PER_TILE_H7                      =$000000b2;
 SC_P0_HIZ_QUAD_PER_TILE_H8                      =$000000b3;
 SC_P0_HIZ_QUAD_PER_TILE_H9                      =$000000b4;
 SC_P0_HIZ_QUAD_PER_TILE_H10                     =$000000b5;
 SC_P0_HIZ_QUAD_PER_TILE_H11                     =$000000b6;
 SC_P0_HIZ_QUAD_PER_TILE_H12                     =$000000b7;
 SC_P0_HIZ_QUAD_PER_TILE_H13                     =$000000b8;
 SC_P0_HIZ_QUAD_PER_TILE_H14                     =$000000b9;
 SC_P0_HIZ_QUAD_PER_TILE_H15                     =$000000ba;
 SC_P0_HIZ_QUAD_PER_TILE_H16                     =$000000bb;
 SC_P1_HIZ_QUAD_PER_TILE_H0                      =$000000bc;
 SC_P1_HIZ_QUAD_PER_TILE_H1                      =$000000bd;
 SC_P1_HIZ_QUAD_PER_TILE_H2                      =$000000be;
 SC_P1_HIZ_QUAD_PER_TILE_H3                      =$000000bf;
 SC_P1_HIZ_QUAD_PER_TILE_H4                      =$000000c0;
 SC_P1_HIZ_QUAD_PER_TILE_H5                      =$000000c1;
 SC_P1_HIZ_QUAD_PER_TILE_H6                      =$000000c2;
 SC_P1_HIZ_QUAD_PER_TILE_H7                      =$000000c3;
 SC_P1_HIZ_QUAD_PER_TILE_H8                      =$000000c4;
 SC_P1_HIZ_QUAD_PER_TILE_H9                      =$000000c5;
 SC_P1_HIZ_QUAD_PER_TILE_H10                     =$000000c6;
 SC_P1_HIZ_QUAD_PER_TILE_H11                     =$000000c7;
 SC_P1_HIZ_QUAD_PER_TILE_H12                     =$000000c8;
 SC_P1_HIZ_QUAD_PER_TILE_H13                     =$000000c9;
 SC_P1_HIZ_QUAD_PER_TILE_H14                     =$000000ca;
 SC_P1_HIZ_QUAD_PER_TILE_H15                     =$000000cb;
 SC_P1_HIZ_QUAD_PER_TILE_H16                     =$000000cc;
 SC_P2_HIZ_QUAD_PER_TILE_H0                      =$000000cd;
 SC_P2_HIZ_QUAD_PER_TILE_H1                      =$000000ce;
 SC_P2_HIZ_QUAD_PER_TILE_H2                      =$000000cf;
 SC_P2_HIZ_QUAD_PER_TILE_H3                      =$000000d0;
 SC_P2_HIZ_QUAD_PER_TILE_H4                      =$000000d1;
 SC_P2_HIZ_QUAD_PER_TILE_H5                      =$000000d2;
 SC_P2_HIZ_QUAD_PER_TILE_H6                      =$000000d3;
 SC_P2_HIZ_QUAD_PER_TILE_H7                      =$000000d4;
 SC_P2_HIZ_QUAD_PER_TILE_H8                      =$000000d5;
 SC_P2_HIZ_QUAD_PER_TILE_H9                      =$000000d6;
 SC_P2_HIZ_QUAD_PER_TILE_H10                     =$000000d7;
 SC_P2_HIZ_QUAD_PER_TILE_H11                     =$000000d8;
 SC_P2_HIZ_QUAD_PER_TILE_H12                     =$000000d9;
 SC_P2_HIZ_QUAD_PER_TILE_H13                     =$000000da;
 SC_P2_HIZ_QUAD_PER_TILE_H14                     =$000000db;
 SC_P2_HIZ_QUAD_PER_TILE_H15                     =$000000dc;
 SC_P2_HIZ_QUAD_PER_TILE_H16                     =$000000dd;
 SC_P3_HIZ_QUAD_PER_TILE_H0                      =$000000de;
 SC_P3_HIZ_QUAD_PER_TILE_H1                      =$000000df;
 SC_P3_HIZ_QUAD_PER_TILE_H2                      =$000000e0;
 SC_P3_HIZ_QUAD_PER_TILE_H3                      =$000000e1;
 SC_P3_HIZ_QUAD_PER_TILE_H4                      =$000000e2;
 SC_P3_HIZ_QUAD_PER_TILE_H5                      =$000000e3;
 SC_P3_HIZ_QUAD_PER_TILE_H6                      =$000000e4;
 SC_P3_HIZ_QUAD_PER_TILE_H7                      =$000000e5;
 SC_P3_HIZ_QUAD_PER_TILE_H8                      =$000000e6;
 SC_P3_HIZ_QUAD_PER_TILE_H9                      =$000000e7;
 SC_P3_HIZ_QUAD_PER_TILE_H10                     =$000000e8;
 SC_P3_HIZ_QUAD_PER_TILE_H11                     =$000000e9;
 SC_P3_HIZ_QUAD_PER_TILE_H12                     =$000000ea;
 SC_P3_HIZ_QUAD_PER_TILE_H13                     =$000000eb;
 SC_P3_HIZ_QUAD_PER_TILE_H14                     =$000000ec;
 SC_P3_HIZ_QUAD_PER_TILE_H15                     =$000000ed;
 SC_P3_HIZ_QUAD_PER_TILE_H16                     =$000000ee;
 SC_P0_HIZ_QUAD_COUNT                            =$000000ef;
 SC_P1_HIZ_QUAD_COUNT                            =$000000f0;
 SC_P2_HIZ_QUAD_COUNT                            =$000000f1;
 SC_P3_HIZ_QUAD_COUNT                            =$000000f2;
 SC_P0_DETAIL_QUAD_COUNT                         =$000000f3;
 SC_P1_DETAIL_QUAD_COUNT                         =$000000f4;
 SC_P2_DETAIL_QUAD_COUNT                         =$000000f5;
 SC_P3_DETAIL_QUAD_COUNT                         =$000000f6;
 SC_P0_DETAIL_QUAD_WITH_1_PIX                    =$000000f7;
 SC_P0_DETAIL_QUAD_WITH_2_PIX                    =$000000f8;
 SC_P0_DETAIL_QUAD_WITH_3_PIX                    =$000000f9;
 SC_P0_DETAIL_QUAD_WITH_4_PIX                    =$000000fa;
 SC_P1_DETAIL_QUAD_WITH_1_PIX                    =$000000fb;
 SC_P1_DETAIL_QUAD_WITH_2_PIX                    =$000000fc;
 SC_P1_DETAIL_QUAD_WITH_3_PIX                    =$000000fd;
 SC_P1_DETAIL_QUAD_WITH_4_PIX                    =$000000fe;
 SC_P2_DETAIL_QUAD_WITH_1_PIX                    =$000000ff;
 SC_P2_DETAIL_QUAD_WITH_2_PIX                    =$00000100;
 SC_P2_DETAIL_QUAD_WITH_3_PIX                    =$00000101;
 SC_P2_DETAIL_QUAD_WITH_4_PIX                    =$00000102;
 SC_P3_DETAIL_QUAD_WITH_1_PIX                    =$00000103;
 SC_P3_DETAIL_QUAD_WITH_2_PIX                    =$00000104;
 SC_P3_DETAIL_QUAD_WITH_3_PIX                    =$00000105;
 SC_P3_DETAIL_QUAD_WITH_4_PIX                    =$00000106;
 SC_EARLYZ_QUAD_COUNT                            =$00000107;
 SC_EARLYZ_QUAD_WITH_1_PIX                       =$00000108;
 SC_EARLYZ_QUAD_WITH_2_PIX                       =$00000109;
 SC_EARLYZ_QUAD_WITH_3_PIX                       =$0000010a;
 SC_EARLYZ_QUAD_WITH_4_PIX                       =$0000010b;
 SC_PKR_QUAD_PER_ROW_H1                          =$0000010c;
 SC_PKR_QUAD_PER_ROW_H2                          =$0000010d;
 SC_PKR_QUAD_PER_ROW_H3                          =$0000010e;
 SC_PKR_QUAD_PER_ROW_H4                          =$0000010f;
 SC_PKR_END_OF_VECTOR                            =$00000110;
 SC_PKR_CONTROL_XFER                             =$00000111;
 SC_PKR_DBHANG_FORCE_EOV                         =$00000112;
 SC_REG_SCLK_BUSY                                =$00000113;
 SC_GRP0_DYN_SCLK_BUSY                           =$00000114;
 SC_GRP1_DYN_SCLK_BUSY                           =$00000115;
 SC_GRP2_DYN_SCLK_BUSY                           =$00000116;
 SC_GRP3_DYN_SCLK_BUSY                           =$00000117;
 SC_GRP4_DYN_SCLK_BUSY                           =$00000118;
 SC_PA0_SC_DATA_FIFO_RD                          =$00000119;
 SC_PA0_SC_DATA_FIFO_WE                          =$0000011a;
 SC_PA1_SC_DATA_FIFO_RD                          =$0000011b;
 SC_PA1_SC_DATA_FIFO_WE                          =$0000011c;
 SC_PS_ARB_XFC_ALL_EVENT_OR_PRIM_CYCLES          =$0000011d;
 SC_PS_ARB_XFC_ONLY_PRIM_CYCLES                  =$0000011e;
 SC_PS_ARB_XFC_ONLY_ONE_INC_PER_PRIM             =$0000011f;
 SC_PS_ARB_STALLED_FROM_BELOW                    =$00000120;
 SC_PS_ARB_STARVED_FROM_ABOVE                    =$00000121;
 SC_PS_ARB_SC_BUSY                               =$00000122;
 SC_PS_ARB_PA_SC_BUSY                            =$00000123;
 SC_PA2_SC_DATA_FIFO_RD                          =$00000124;
 SC_PA2_SC_DATA_FIFO_WE                          =$00000125;
 SC_PA3_SC_DATA_FIFO_RD                          =$00000126;
 SC_PA3_SC_DATA_FIFO_WE                          =$00000127;
 SC_PA_SC_DEALLOC_0_0_WE                         =$00000128;
 SC_PA_SC_DEALLOC_0_1_WE                         =$00000129;
 SC_PA_SC_DEALLOC_1_0_WE                         =$0000012a;
 SC_PA_SC_DEALLOC_1_1_WE                         =$0000012b;
 SC_PA_SC_DEALLOC_2_0_WE                         =$0000012c;
 SC_PA_SC_DEALLOC_2_1_WE                         =$0000012d;
 SC_PA_SC_DEALLOC_3_0_WE                         =$0000012e;
 SC_PA_SC_DEALLOC_3_1_WE                         =$0000012f;
 SC_PA0_SC_EOP_WE                                =$00000130;
 SC_PA0_SC_EOPG_WE                               =$00000131;
 SC_PA0_SC_EVENT_WE                              =$00000132;
 SC_PA1_SC_EOP_WE                                =$00000133;
 SC_PA1_SC_EOPG_WE                               =$00000134;
 SC_PA1_SC_EVENT_WE                              =$00000135;
 SC_PA2_SC_EOP_WE                                =$00000136;
 SC_PA2_SC_EOPG_WE                               =$00000137;
 SC_PA2_SC_EVENT_WE                              =$00000138;
 SC_PA3_SC_EOP_WE                                =$00000139;
 SC_PA3_SC_EOPG_WE                               =$0000013a;
 SC_PA3_SC_EVENT_WE                              =$0000013b;
 SC_PS_ARB_OOO_THRESHOLD_SWITCH_TO_DESIRED_FIFO  =$0000013c;
 SC_PS_ARB_OOO_FIFO_EMPTY_SWITCH                 =$0000013d;
 SC_PS_ARB_NULL_PRIM_BUBBLE_POP                  =$0000013e;
 SC_PS_ARB_EOP_POP_SYNC_POP                      =$0000013f;
 SC_PS_ARB_EVENT_SYNC_POP                        =$00000140;
 SC_SC_PS_ENG_MULTICYCLE_BUBBLE                  =$00000141;
 SC_PA0_SC_FPOV_WE                               =$00000142;
 SC_PA1_SC_FPOV_WE                               =$00000143;
 SC_PA2_SC_FPOV_WE                               =$00000144;
 SC_PA3_SC_FPOV_WE                               =$00000145;
 SC_PA0_SC_LPOV_WE                               =$00000146;
 SC_PA1_SC_LPOV_WE                               =$00000147;
 SC_PA2_SC_LPOV_WE                               =$00000148;
 SC_PA3_SC_LPOV_WE                               =$00000149;
 SC_SC_SPI_DEALLOC_0_0                           =$0000014a;
 SC_SC_SPI_DEALLOC_0_1                           =$0000014b;
 SC_SC_SPI_DEALLOC_0_2                           =$0000014c;
 SC_SC_SPI_DEALLOC_1_0                           =$0000014d;
 SC_SC_SPI_DEALLOC_1_1                           =$0000014e;
 SC_SC_SPI_DEALLOC_1_2                           =$0000014f;
 SC_SC_SPI_DEALLOC_2_0                           =$00000150;
 SC_SC_SPI_DEALLOC_2_1                           =$00000151;
 SC_SC_SPI_DEALLOC_2_2                           =$00000152;
 SC_SC_SPI_DEALLOC_3_0                           =$00000153;
 SC_SC_SPI_DEALLOC_3_1                           =$00000154;
 SC_SC_SPI_DEALLOC_3_2                           =$00000155;
 SC_SC_SPI_FPOV_0                                =$00000156;
 SC_SC_SPI_FPOV_1                                =$00000157;
 SC_SC_SPI_FPOV_2                                =$00000158;
 SC_SC_SPI_FPOV_3                                =$00000159;
 SC_SC_SPI_EVENT                                 =$0000015a;
 SC_PS_TS_EVENT_FIFO_PUSH                        =$0000015b;
 SC_PS_TS_EVENT_FIFO_POP                         =$0000015c;
 SC_PS_CTX_DONE_FIFO_PUSH                        =$0000015d;
 SC_PS_CTX_DONE_FIFO_POP                         =$0000015e;
 SC_MULTICYCLE_BUBBLE_FREEZE                     =$0000015f;
 SC_EOP_SYNC_WINDOW                              =$00000160;
 SC_PA0_SC_NULL_WE                               =$00000161;
 SC_PA0_SC_NULL_DEALLOC_WE                       =$00000162;
 SC_PA0_SC_DATA_FIFO_EOPG_RD                     =$00000163;
 SC_PA0_SC_DATA_FIFO_EOP_RD                      =$00000164;
 SC_PA0_SC_DEALLOC_0_RD                          =$00000165;
 SC_PA0_SC_DEALLOC_1_RD                          =$00000166;
 SC_PA1_SC_DATA_FIFO_EOPG_RD                     =$00000167;
 SC_PA1_SC_DATA_FIFO_EOP_RD                      =$00000168;
 SC_PA1_SC_DEALLOC_0_RD                          =$00000169;
 SC_PA1_SC_DEALLOC_1_RD                          =$0000016a;
 SC_PA1_SC_NULL_WE                               =$0000016b;
 SC_PA1_SC_NULL_DEALLOC_WE                       =$0000016c;
 SC_PA2_SC_DATA_FIFO_EOPG_RD                     =$0000016d;
 SC_PA2_SC_DATA_FIFO_EOP_RD                      =$0000016e;
 SC_PA2_SC_DEALLOC_0_RD                          =$0000016f;
 SC_PA2_SC_DEALLOC_1_RD                          =$00000170;
 SC_PA2_SC_NULL_WE                               =$00000171;
 SC_PA2_SC_NULL_DEALLOC_WE                       =$00000172;
 SC_PA3_SC_DATA_FIFO_EOPG_RD                     =$00000173;
 SC_PA3_SC_DATA_FIFO_EOP_RD                      =$00000174;
 SC_PA3_SC_DEALLOC_0_RD                          =$00000175;
 SC_PA3_SC_DEALLOC_1_RD                          =$00000176;
 SC_PA3_SC_NULL_WE                               =$00000177;
 SC_PA3_SC_NULL_DEALLOC_WE                       =$00000178;
 SC_PS_PA0_SC_FIFO_EMPTY                         =$00000179;
 SC_PS_PA0_SC_FIFO_FULL                          =$0000017a;
 SC_PA0_PS_DATA_SEND                             =$0000017b;
 SC_PS_PA1_SC_FIFO_EMPTY                         =$0000017c;
 SC_PS_PA1_SC_FIFO_FULL                          =$0000017d;
 SC_PA1_PS_DATA_SEND                             =$0000017e;
 SC_PS_PA2_SC_FIFO_EMPTY                         =$0000017f;
 SC_PS_PA2_SC_FIFO_FULL                          =$00000180;
 SC_PA2_PS_DATA_SEND                             =$00000181;
 SC_PS_PA3_SC_FIFO_EMPTY                         =$00000182;
 SC_PS_PA3_SC_FIFO_FULL                          =$00000183;
 SC_PA3_PS_DATA_SEND                             =$00000184;
 SC_BUSY_PROCESSING_MULTICYCLE_PRIM              =$00000185;
 SC_BUSY_CNT_NOT_ZERO                            =$00000186;
 SC_BM_BUSY                                      =$00000187;
 SC_BACKEND_BUSY                                 =$00000188;
 SC_SCF_SCB_INTERFACE_BUSY                       =$00000189;
 SC_SCB_BUSY                                     =$0000018a;
 SC_STARVED_BY_PA_WITH_UNSELECTED_PA_NOT_EMPTY   =$0000018b;
 SC_STARVED_BY_PA_WITH_UNSELECTED_PA_FULL        =$0000018c;
 // SDMA_PERF_SEL
 SDMA_PERF_SEL_CYCLE                             =$00000000;
 SDMA_PERF_SEL_IDLE                              =$00000001;
 SDMA_PERF_SEL_REG_IDLE                          =$00000002;
 SDMA_PERF_SEL_RB_EMPTY                          =$00000003;
 SDMA_PERF_SEL_RB_FULL                           =$00000004;
 SDMA_PERF_SEL_RB_WPTR_WRAP                      =$00000005;
 SDMA_PERF_SEL_RB_RPTR_WRAP                      =$00000006;
 SDMA_PERF_SEL_RB_WPTR_POLL_READ                 =$00000007;
 SDMA_PERF_SEL_RB_RPTR_WB                        =$00000008;
 SDMA_PERF_SEL_RB_CMD_IDLE                       =$00000009;
 SDMA_PERF_SEL_RB_CMD_FULL                       =$0000000a;
 SDMA_PERF_SEL_IB_CMD_IDLE                       =$0000000b;
 SDMA_PERF_SEL_IB_CMD_FULL                       =$0000000c;
 SDMA_PERF_SEL_EX_IDLE                           =$0000000d;
 SDMA_PERF_SEL_SRBM_REG_SEND                     =$0000000e;
 SDMA_PERF_SEL_EX_IDLE_POLL_TIMER_EXPIRE         =$0000000f;
 SDMA_PERF_SEL_MC_WR_IDLE                        =$00000010;
 SDMA_PERF_SEL_MC_WR_COUNT                       =$00000011;
 SDMA_PERF_SEL_MC_RD_IDLE                        =$00000012;
 SDMA_PERF_SEL_MC_RD_COUNT                       =$00000013;
 SDMA_PERF_SEL_MC_RD_RET_STALL                   =$00000014;
 SDMA_PERF_SEL_MC_RD_NO_POLL_IDLE                =$00000015;
 SDMA_PERF_SEL_SEM_IDLE                          =$00000018;
 SDMA_PERF_SEL_SEM_REQ_STALL                     =$00000019;
 SDMA_PERF_SEL_SEM_REQ_COUNT                     =$0000001a;
 SDMA_PERF_SEL_SEM_RESP_INCOMPLETE               =$0000001b;
 SDMA_PERF_SEL_SEM_RESP_FAIL                     =$0000001c;
 SDMA_PERF_SEL_SEM_RESP_PASS                     =$0000001d;
 SDMA_PERF_SEL_INT_IDLE                          =$0000001e;
 SDMA_PERF_SEL_INT_REQ_STALL                     =$0000001f;
 SDMA_PERF_SEL_INT_REQ_COUNT                     =$00000020;
 SDMA_PERF_SEL_INT_RESP_ACCEPTED                 =$00000021;
 SDMA_PERF_SEL_INT_RESP_RETRY                    =$00000022;
 SDMA_PERF_SEL_NUM_PACKET                        =$00000023;
 SDMA_PERF_SEL_CE_WREQ_IDLE                      =$00000025;
 SDMA_PERF_SEL_CE_WR_IDLE                        =$00000026;
 SDMA_PERF_SEL_CE_SPLIT_IDLE                     =$00000027;
 SDMA_PERF_SEL_CE_RREQ_IDLE                      =$00000028;
 SDMA_PERF_SEL_CE_OUT_IDLE                       =$00000029;
 SDMA_PERF_SEL_CE_IN_IDLE                        =$0000002a;
 SDMA_PERF_SEL_CE_DST_IDLE                       =$0000002b;
 SDMA_PERF_SEL_CE_AFIFO_FULL                     =$0000002e;
 SDMA_PERF_SEL_CE_INFO_FULL                      =$00000031;
 SDMA_PERF_SEL_CE_INFO1_FULL                     =$00000032;
 SDMA_PERF_SEL_CE_RD_STALL                       =$00000033;
 SDMA_PERF_SEL_CE_WR_STALL                       =$00000034;
 SDMA_PERF_SEL_GFX_SELECT                        =$00000035;
 SDMA_PERF_SEL_RLC0_SELECT                       =$00000036;
 SDMA_PERF_SEL_RLC1_SELECT                       =$00000037;
 SDMA_PERF_SEL_CTX_CHANGE                        =$00000038;
 SDMA_PERF_SEL_CTX_CHANGE_EXPIRED                =$00000039;
 SDMA_PERF_SEL_CTX_CHANGE_EXCEPTION              =$0000003a;
 SDMA_PERF_SEL_DOORBELL                          =$0000003b;
 SDMA_PERF_SEL_RD_BA_RTR                         =$0000003c;
 SDMA_PERF_SEL_WR_BA_RTR                         =$0000003d;
 // SH_MEM_ALIGNMENT_MODE
 SH_MEM_ALIGNMENT_MODE_DWORD                     =$00000000;
 SH_MEM_ALIGNMENT_MODE_DWORD_STRICT              =$00000001;
 SH_MEM_ALIGNMENT_MODE_STRICT                    =$00000002;
 SH_MEM_ALIGNMENT_MODE_UNALIGNED                 =$00000003;
 // SPI_FOG_MODE
 SPI_FOG_NONE                                    =$00000000;
 SPI_FOG_EXP                                     =$00000001;
 SPI_FOG_EXP2                                    =$00000002;
 SPI_FOG_LINEAR                                  =$00000003;
 // SPI_PERFCNT_SEL
 SPI_PERF_VS_WINDOW_VALID                        =$00000000;
 SPI_PERF_VS_BUSY                                =$00000001;
 SPI_PERF_VS_FIRST_WAVE                          =$00000002;
 SPI_PERF_VS_LAST_WAVE                           =$00000003;
 SPI_PERF_VS_LSHS_DEALLOC                        =$00000004;
 SPI_PERF_VS_PC_STALL                            =$00000005;
 SPI_PERF_VS_POS0_STALL                          =$00000006;
 SPI_PERF_VS_POS1_STALL                          =$00000007;
 SPI_PERF_VS_CRAWLER_STALL                       =$00000008;
 SPI_PERF_VS_EVENT_WAVE                          =$00000009;
 SPI_PERF_VS_WAVE                                =$0000000a;
 SPI_PERF_VS_PERS_UPD_FULL0                      =$0000000b;
 SPI_PERF_VS_PERS_UPD_FULL1                      =$0000000c;
 SPI_PERF_VS_LATE_ALLOC_FULL                     =$0000000d;
 SPI_PERF_VS_FIRST_SUBGRP                        =$0000000e;
 SPI_PERF_VS_LAST_SUBGRP                         =$0000000f;
 SPI_PERF_GS_WINDOW_VALID                        =$00000010;
 SPI_PERF_GS_BUSY                                =$00000011;
 SPI_PERF_GS_CRAWLER_STALL                       =$00000012;
 SPI_PERF_GS_EVENT_WAVE                          =$00000013;
 SPI_PERF_GS_WAVE                                =$00000014;
 SPI_PERF_GS_PERS_UPD_FULL0                      =$00000015;
 SPI_PERF_GS_PERS_UPD_FULL1                      =$00000016;
 SPI_PERF_GS_FIRST_SUBGRP                        =$00000017;
 SPI_PERF_GS_LAST_SUBGRP                         =$00000018;
 SPI_PERF_ES_WINDOW_VALID                        =$00000019;
 SPI_PERF_ES_BUSY                                =$0000001a;
 SPI_PERF_ES_CRAWLER_STALL                       =$0000001b;
 SPI_PERF_ES_FIRST_WAVE                          =$0000001c;
 SPI_PERF_ES_LAST_WAVE                           =$0000001d;
 SPI_PERF_ES_LSHS_DEALLOC                        =$0000001e;
 SPI_PERF_ES_EVENT_WAVE                          =$0000001f;
 SPI_PERF_ES_WAVE                                =$00000020;
 SPI_PERF_ES_PERS_UPD_FULL0                      =$00000021;
 SPI_PERF_ES_PERS_UPD_FULL1                      =$00000022;
 SPI_PERF_ES_FIRST_SUBGRP                        =$00000023;
 SPI_PERF_ES_LAST_SUBGRP                         =$00000024;
 SPI_PERF_HS_WINDOW_VALID                        =$00000025;
 SPI_PERF_HS_BUSY                                =$00000026;
 SPI_PERF_HS_CRAWLER_STALL                       =$00000027;
 SPI_PERF_HS_FIRST_WAVE                          =$00000028;
 SPI_PERF_HS_LAST_WAVE                           =$00000029;
 SPI_PERF_HS_LSHS_DEALLOC                        =$0000002a;
 SPI_PERF_HS_EVENT_WAVE                          =$0000002b;
 SPI_PERF_HS_WAVE                                =$0000002c;
 SPI_PERF_HS_PERS_UPD_FULL0                      =$0000002d;
 SPI_PERF_HS_PERS_UPD_FULL1                      =$0000002e;
 SPI_PERF_LS_WINDOW_VALID                        =$0000002f;
 SPI_PERF_LS_BUSY                                =$00000030;
 SPI_PERF_LS_CRAWLER_STALL                       =$00000031;
 SPI_PERF_LS_FIRST_WAVE                          =$00000032;
 SPI_PERF_LS_LAST_WAVE                           =$00000033;
 SPI_PERF_OFFCHIP_LDS_STALL_LS                   =$00000034;
 SPI_PERF_LS_EVENT_WAVE                          =$00000035;
 SPI_PERF_LS_WAVE                                =$00000036;
 SPI_PERF_LS_PERS_UPD_FULL0                      =$00000037;
 SPI_PERF_LS_PERS_UPD_FULL1                      =$00000038;
 SPI_PERF_CSG_WINDOW_VALID                       =$00000039;
 SPI_PERF_CSG_BUSY                               =$0000003a;
 SPI_PERF_CSG_NUM_THREADGROUPS                   =$0000003b;
 SPI_PERF_CSG_CRAWLER_STALL                      =$0000003c;
 SPI_PERF_CSG_EVENT_WAVE                         =$0000003d;
 SPI_PERF_CSG_WAVE                               =$0000003e;
 SPI_PERF_CSN_WINDOW_VALID                       =$0000003f;
 SPI_PERF_CSN_BUSY                               =$00000040;
 SPI_PERF_CSN_NUM_THREADGROUPS                   =$00000041;
 SPI_PERF_CSN_CRAWLER_STALL                      =$00000042;
 SPI_PERF_CSN_EVENT_WAVE                         =$00000043;
 SPI_PERF_CSN_WAVE                               =$00000044;
 SPI_PERF_PS_CTL_WINDOW_VALID                    =$00000045;
 SPI_PERF_PS_CTL_BUSY                            =$00000046;
 SPI_PERF_PS_CTL_ACTIVE                          =$00000047;
 SPI_PERF_PS_CTL_DEALLOC_BIN0                    =$00000048;
 SPI_PERF_PS_CTL_FPOS_BIN1_STALL                 =$00000049;
 SPI_PERF_PS_CTL_EVENT_WAVE                      =$0000004a;
 SPI_PERF_PS_CTL_WAVE                            =$0000004b;
 SPI_PERF_PS_CTL_OPT_WAVE                        =$0000004c;
 SPI_PERF_PS_CTL_PASS_BIN0                       =$0000004d;
 SPI_PERF_PS_CTL_PASS_BIN1                       =$0000004e;
 SPI_PERF_PS_CTL_FPOS_BIN2                       =$0000004f;
 SPI_PERF_PS_CTL_PRIM_BIN0                       =$00000050;
 SPI_PERF_PS_CTL_PRIM_BIN1                       =$00000051;
 SPI_PERF_PS_CTL_CNF_BIN2                        =$00000052;
 SPI_PERF_PS_CTL_CNF_BIN3                        =$00000053;
 SPI_PERF_PS_CTL_CRAWLER_STALL                   =$00000054;
 SPI_PERF_PS_CTL_LDS_RES_FULL                    =$00000055;
 SPI_PERF_PS_PERS_UPD_FULL0                      =$00000056;
 SPI_PERF_PS_PERS_UPD_FULL1                      =$00000057;
 SPI_PERF_PIX_ALLOC_PEND_CNT                     =$00000058;
 SPI_PERF_PIX_ALLOC_SCB_STALL                    =$00000059;
 SPI_PERF_PIX_ALLOC_DB0_STALL                    =$0000005a;
 SPI_PERF_PIX_ALLOC_DB1_STALL                    =$0000005b;
 SPI_PERF_PIX_ALLOC_DB2_STALL                    =$0000005c;
 SPI_PERF_PIX_ALLOC_DB3_STALL                    =$0000005d;
 SPI_PERF_LDS0_PC_VALID                          =$0000005e;
 SPI_PERF_LDS1_PC_VALID                          =$0000005f;
 SPI_PERF_RA_PIPE_REQ_BIN2                       =$00000060;
 SPI_PERF_RA_TASK_REQ_BIN3                       =$00000061;
 SPI_PERF_RA_WR_CTL_FULL                         =$00000062;
 SPI_PERF_RA_REQ_NO_ALLOC                        =$00000063;
 SPI_PERF_RA_REQ_NO_ALLOC_PS                     =$00000064;
 SPI_PERF_RA_REQ_NO_ALLOC_VS                     =$00000065;
 SPI_PERF_RA_REQ_NO_ALLOC_GS                     =$00000066;
 SPI_PERF_RA_REQ_NO_ALLOC_ES                     =$00000067;
 SPI_PERF_RA_REQ_NO_ALLOC_HS                     =$00000068;
 SPI_PERF_RA_REQ_NO_ALLOC_LS                     =$00000069;
 SPI_PERF_RA_REQ_NO_ALLOC_CSG                    =$0000006a;
 SPI_PERF_RA_REQ_NO_ALLOC_CSN                    =$0000006b;
 SPI_PERF_RA_RES_STALL_PS                        =$0000006c;
 SPI_PERF_RA_RES_STALL_VS                        =$0000006d;
 SPI_PERF_RA_RES_STALL_GS                        =$0000006e;
 SPI_PERF_RA_RES_STALL_ES                        =$0000006f;
 SPI_PERF_RA_RES_STALL_HS                        =$00000070;
 SPI_PERF_RA_RES_STALL_LS                        =$00000071;
 SPI_PERF_RA_RES_STALL_CSG                       =$00000072;
 SPI_PERF_RA_RES_STALL_CSN                       =$00000073;
 SPI_PERF_RA_TMP_STALL_PS                        =$00000074;
 SPI_PERF_RA_TMP_STALL_VS                        =$00000075;
 SPI_PERF_RA_TMP_STALL_GS                        =$00000076;
 SPI_PERF_RA_TMP_STALL_ES                        =$00000077;
 SPI_PERF_RA_TMP_STALL_HS                        =$00000078;
 SPI_PERF_RA_TMP_STALL_LS                        =$00000079;
 SPI_PERF_RA_TMP_STALL_CSG                       =$0000007a;
 SPI_PERF_RA_TMP_STALL_CSN                       =$0000007b;
 SPI_PERF_RA_WAVE_SIMD_FULL_PS                   =$0000007c;
 SPI_PERF_RA_WAVE_SIMD_FULL_VS                   =$0000007d;
 SPI_PERF_RA_WAVE_SIMD_FULL_GS                   =$0000007e;
 SPI_PERF_RA_WAVE_SIMD_FULL_ES                   =$0000007f;
 SPI_PERF_RA_WAVE_SIMD_FULL_HS                   =$00000080;
 SPI_PERF_RA_WAVE_SIMD_FULL_LS                   =$00000081;
 SPI_PERF_RA_WAVE_SIMD_FULL_CSG                  =$00000082;
 SPI_PERF_RA_WAVE_SIMD_FULL_CSN                  =$00000083;
 SPI_PERF_RA_VGPR_SIMD_FULL_PS                   =$00000084;
 SPI_PERF_RA_VGPR_SIMD_FULL_VS                   =$00000085;
 SPI_PERF_RA_VGPR_SIMD_FULL_GS                   =$00000086;
 SPI_PERF_RA_VGPR_SIMD_FULL_ES                   =$00000087;
 SPI_PERF_RA_VGPR_SIMD_FULL_HS                   =$00000088;
 SPI_PERF_RA_VGPR_SIMD_FULL_LS                   =$00000089;
 SPI_PERF_RA_VGPR_SIMD_FULL_CSG                  =$0000008a;
 SPI_PERF_RA_VGPR_SIMD_FULL_CSN                  =$0000008b;
 SPI_PERF_RA_SGPR_SIMD_FULL_PS                   =$0000008c;
 SPI_PERF_RA_SGPR_SIMD_FULL_VS                   =$0000008d;
 SPI_PERF_RA_SGPR_SIMD_FULL_GS                   =$0000008e;
 SPI_PERF_RA_SGPR_SIMD_FULL_ES                   =$0000008f;
 SPI_PERF_RA_SGPR_SIMD_FULL_HS                   =$00000090;
 SPI_PERF_RA_SGPR_SIMD_FULL_LS                   =$00000091;
 SPI_PERF_RA_SGPR_SIMD_FULL_CSG                  =$00000092;
 SPI_PERF_RA_SGPR_SIMD_FULL_CSN                  =$00000093;
 SPI_PERF_RA_LDS_CU_FULL_PS                      =$00000094;
 SPI_PERF_RA_LDS_CU_FULL_LS                      =$00000095;
 SPI_PERF_RA_LDS_CU_FULL_ES                      =$00000096;
 SPI_PERF_RA_LDS_CU_FULL_CSG                     =$00000097;
 SPI_PERF_RA_LDS_CU_FULL_CSN                     =$00000098;
 SPI_PERF_RA_BAR_CU_FULL_HS                      =$00000099;
 SPI_PERF_RA_BAR_CU_FULL_CSG                     =$0000009a;
 SPI_PERF_RA_BAR_CU_FULL_CSN                     =$0000009b;
 SPI_PERF_RA_BULKY_CU_FULL_CSG                   =$0000009c;
 SPI_PERF_RA_BULKY_CU_FULL_CSN                   =$0000009d;
 SPI_PERF_RA_TGLIM_CU_FULL_CSG                   =$0000009e;
 SPI_PERF_RA_TGLIM_CU_FULL_CSN                   =$0000009f;
 SPI_PERF_RA_WVLIM_STALL_PS                      =$000000a0;
 SPI_PERF_RA_WVLIM_STALL_VS                      =$000000a1;
 SPI_PERF_RA_WVLIM_STALL_GS                      =$000000a2;
 SPI_PERF_RA_WVLIM_STALL_ES                      =$000000a3;
 SPI_PERF_RA_WVLIM_STALL_HS                      =$000000a4;
 SPI_PERF_RA_WVLIM_STALL_LS                      =$000000a5;
 SPI_PERF_RA_WVLIM_STALL_CSG                     =$000000a6;
 SPI_PERF_RA_WVLIM_STALL_CSN                     =$000000a7;
 SPI_PERF_RA_PS_LOCK_NA                          =$000000a8;
 SPI_PERF_RA_VS_LOCK                             =$000000a9;
 SPI_PERF_RA_GS_LOCK                             =$000000aa;
 SPI_PERF_RA_ES_LOCK                             =$000000ab;
 SPI_PERF_RA_HS_LOCK                             =$000000ac;
 SPI_PERF_RA_LS_LOCK                             =$000000ad;
 SPI_PERF_RA_CSG_LOCK                            =$000000ae;
 SPI_PERF_RA_CSN_LOCK                            =$000000af;
 SPI_PERF_RA_RSV_UPD                             =$000000b0;
 SPI_PERF_EXP_ARB_COL_CNT                        =$000000b1;
 SPI_PERF_EXP_ARB_PAR_CNT                        =$000000b2;
 SPI_PERF_EXP_ARB_POS_CNT                        =$000000b3;
 SPI_PERF_EXP_ARB_GDS_CNT                        =$000000b4;
 SPI_PERF_CLKGATE_BUSY_STALL                     =$000000b5;
 SPI_PERF_CLKGATE_ACTIVE_STALL                   =$000000b6;
 SPI_PERF_CLKGATE_ALL_CLOCKS_ON                  =$000000b7;
 SPI_PERF_CLKGATE_CGTT_DYN_ON                    =$000000b8;
 SPI_PERF_CLKGATE_CGTT_REG_ON                    =$000000b9;
 SPI_PERF_NUM_VS_POS_EXPORTS                     =$000000ba;
 SPI_PERF_NUM_VS_PARAM_EXPORTS                   =$000000bb;
 SPI_PERF_NUM_PS_COL_EXPORTS                     =$000000bc;
 SPI_PERF_ES_GRP_FIFO_FULL                       =$000000bd;
 SPI_PERF_GS_GRP_FIFO_FULL                       =$000000be;
 SPI_PERF_HS_GRP_FIFO_FULL                       =$000000bf;
 SPI_PERF_LS_GRP_FIFO_FULL                       =$000000c0;
 SPI_PERF_VS_ALLOC_CNT                           =$000000c1;
 SPI_PERF_VS_LATE_ALLOC_ACCUM                    =$000000c2;
 SPI_PERF_PC_ALLOC_CNT                           =$000000c3;
 SPI_PERF_PC_ALLOC_ACCUM                         =$000000c4;
 // SPI_PNT_SPRITE_OVERRIDE
 SPI_PNT_SPRITE_SEL_0                            =$00000000;
 SPI_PNT_SPRITE_SEL_1                            =$00000001;
 SPI_PNT_SPRITE_SEL_S                            =$00000002;
 SPI_PNT_SPRITE_SEL_T                            =$00000003;
 SPI_PNT_SPRITE_SEL_NONE                         =$00000004;
 // SPI_SAMPLE_CNTL
 CENTROIDS_ONLY                                  =$00000000;
 CENTERS_ONLY                                    =$00000001;
 CENTROIDS_AND_CENTERS                           =$00000002;
 UNDEF                                           =$00000003;
 // SPI_SHADER_EX_FORMAT
 SPI_SHADER_ZERO                                 =$00000000;
 SPI_SHADER_32_R                                 =$00000001;
 SPI_SHADER_32_GR                                =$00000002;
 SPI_SHADER_32_AR                                =$00000003;
 SPI_SHADER_FP16_ABGR                            =$00000004;
 SPI_SHADER_UNORM16_ABGR                         =$00000005;
 SPI_SHADER_SNORM16_ABGR                         =$00000006;
 SPI_SHADER_UINT16_ABGR                          =$00000007;
 SPI_SHADER_SINT16_ABGR                          =$00000008;
 SPI_SHADER_32_ABGR                              =$00000009;
 // SPI_SHADER_FORMAT
 SPI_SHADER_NONE                                 =$00000000;
 SPI_SHADER_1COMP                                =$00000001;
 SPI_SHADER_2COMP                                =$00000002;
 SPI_SHADER_4COMPRESS                            =$00000003;
 SPI_SHADER_4COMP                                =$00000004;
 // SPM_PERFMON_STATE
 STRM_PERFMON_STATE_DISABLE_AND_RESET            =$00000000;
 STRM_PERFMON_STATE_START_COUNTING               =$00000001;
 STRM_PERFMON_STATE_STOP_COUNTING                =$00000002;
 STRM_PERFMON_STATE_RESERVED_3                   =$00000003;
 STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM    =$00000004;
 STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM       =$00000005;
 // SQC_DATA_CACHE_POLICIES
 SQC_DATA_CACHE_POLICY_HIT_LRU                   =$00000000;
 SQC_DATA_CACHE_POLICY_MISS_EVICT                =$00000001;
 // SQ_CAC_POWER_SEL
 SQ_CAC_POWER_VALU                               =$00000000;
 SQ_CAC_POWER_VALU0                              =$00000001;
 SQ_CAC_POWER_VALU1                              =$00000002;
 SQ_CAC_POWER_VALU2                              =$00000003;
 SQ_CAC_POWER_GPR_RD                             =$00000004;
 SQ_CAC_POWER_GPR_WR                             =$00000005;
 SQ_CAC_POWER_LDS_BUSY                           =$00000006;
 SQ_CAC_POWER_ALU_BUSY                           =$00000007;
 SQ_CAC_POWER_TEX_BUSY                           =$00000008;
 // SQ_DED_INFO_SOURCE
 SQ_DED_INFO_SOURCE_INVALID                      =$00000000;
 SQ_DED_INFO_SOURCE_INST                         =$00000001;
 SQ_DED_INFO_SOURCE_SGPR                         =$00000002;
 SQ_DED_INFO_SOURCE_VGPR                         =$00000003;
 SQ_DED_INFO_SOURCE_LDS                          =$00000004;
 SQ_DED_INFO_SOURCE_GDS                          =$00000005;
 SQ_DED_INFO_SOURCE_TA                           =$00000006;
 // SQ_IBUF_ST
 SQ_IBUF_IB_IDLE                                 =$00000000;
 SQ_IBUF_IB_INI_WAIT_GNT                         =$00000001;
 SQ_IBUF_IB_INI_WAIT_DRET                        =$00000002;
 SQ_IBUF_IB_LE_4DW                               =$00000003;
 SQ_IBUF_IB_WAIT_DRET                            =$00000004;
 SQ_IBUF_IB_EMPTY_WAIT_DRET                      =$00000005;
 SQ_IBUF_IB_DRET                                 =$00000006;
 SQ_IBUF_IB_EMPTY_WAIT_GNT                       =$00000007;
 // SQ_IMG_FILTER_TYPE
 SQ_IMG_FILTER_MODE_BLEND                        =$00000000;
 SQ_IMG_FILTER_MODE_MIN                          =$00000001;
 SQ_IMG_FILTER_MODE_MAX                          =$00000002;
 // SQ_IND_CMD_CMD
 SQ_IND_CMD_CMD_NULL                             =$00000000;
 SQ_IND_CMD_CMD_SETHALT                          =$00000001;
 SQ_IND_CMD_CMD_SAVECTX                          =$00000002;
 SQ_IND_CMD_CMD_KILL                             =$00000003;
 SQ_IND_CMD_CMD_DEBUG                            =$00000004;
 SQ_IND_CMD_CMD_TRAP                             =$00000005;
 SQ_IND_CMD_CMD_SET_SPI_PRIO                     =$00000006;
 // SQ_IND_CMD_MODE
 SQ_IND_CMD_MODE_SINGLE                          =$00000000;
 SQ_IND_CMD_MODE_BROADCAST                       =$00000001;
 SQ_IND_CMD_MODE_BROADCAST_QUEUE                 =$00000002;
 SQ_IND_CMD_MODE_BROADCAST_PIPE                  =$00000003;
 SQ_IND_CMD_MODE_BROADCAST_ME                    =$00000004;
 // SQ_INST_STR_ST
 SQ_INST_STR_IB_WAVE_NORML                       =$00000000;
 SQ_INST_STR_IB_WAVE2ID_NORMAL_INST_AV           =$00000001;
 SQ_INST_STR_IB_WAVE_INTERNAL_INST_AV            =$00000002;
 SQ_INST_STR_IB_WAVE_INST_SKIP_AV                =$00000003;
 SQ_INST_STR_IB_WAVE_SETVSKIP_ST0                =$00000004;
 SQ_INST_STR_IB_WAVE_SETVSKIP_ST1                =$00000005;
 SQ_INST_STR_IB_WAVE_NOP_SLEEP_WAIT              =$00000006;
 SQ_INST_STR_IB_WAVE_PC_FROM_SGPR_MSG_WAIT       =$00000007;
 // SQ_INTERRUPT_WORD_ENCODING
 SQ_INTERRUPT_WORD_ENCODING_AUTO                 =$00000000;
 SQ_INTERRUPT_WORD_ENCODING_INST                 =$00000001;
 SQ_INTERRUPT_WORD_ENCODING_ERROR                =$00000002;
 // SQ_PERF_SEL
 SQ_PERF_SEL_NONE                                =$00000000;
 SQ_PERF_SEL_ACCUM_PREV                          =$00000001;
 SQ_PERF_SEL_CYCLES                              =$00000002;
 SQ_PERF_SEL_BUSY_CYCLES                         =$00000003;
 SQ_PERF_SEL_WAVES                               =$00000004;
 SQ_PERF_SEL_LEVEL_WAVES                         =$00000005;
 SQ_PERF_SEL_WAVES_EQ_64                         =$00000006;
 SQ_PERF_SEL_WAVES_LT_64                         =$00000007;
 SQ_PERF_SEL_WAVES_LT_48                         =$00000008;
 SQ_PERF_SEL_WAVES_LT_32                         =$00000009;
 SQ_PERF_SEL_WAVES_LT_16                         =$0000000a;
 SQ_PERF_SEL_WAVES_CU                            =$0000000b;
 SQ_PERF_SEL_LEVEL_WAVES_CU                      =$0000000c;
 SQ_PERF_SEL_BUSY_CU_CYCLES                      =$0000000d;
 SQ_PERF_SEL_ITEMS                               =$0000000e;
 SQ_PERF_SEL_QUADS                               =$0000000f;
 SQ_PERF_SEL_EVENTS                              =$00000010;
 SQ_PERF_SEL_SURF_SYNCS                          =$00000011;
 SQ_PERF_SEL_TTRACE_REQS                         =$00000012;
 SQ_PERF_SEL_TTRACE_INFLIGHT_REQS                =$00000013;
 SQ_PERF_SEL_TTRACE_STALL                        =$00000014;
 SQ_PERF_SEL_MSG_CNTR                            =$00000015;
 SQ_PERF_SEL_MSG_PERF                            =$00000016;
 SQ_PERF_SEL_MSG_GSCNT                           =$00000017;
 SQ_PERF_SEL_MSG_INTERRUPT                       =$00000018;
 SQ_PERF_SEL_INSTS                               =$00000019;
 SQ_PERF_SEL_INSTS_VALU                          =$0000001a;
 SQ_PERF_SEL_INSTS_VMEM_WR                       =$0000001b;
 SQ_PERF_SEL_INSTS_VMEM_RD                       =$0000001c;
 SQ_PERF_SEL_INSTS_VMEM                          =$0000001d;
 SQ_PERF_SEL_INSTS_SALU                          =$0000001e;
 SQ_PERF_SEL_INSTS_SMEM                          =$0000001f;
 SQ_PERF_SEL_INSTS_FLAT                          =$00000020;
 SQ_PERF_SEL_INSTS_FLAT_LDS_ONLY                 =$00000021;
 SQ_PERF_SEL_INSTS_LDS                           =$00000022;
 SQ_PERF_SEL_INSTS_GDS                           =$00000023;
 SQ_PERF_SEL_INSTS_EXP                           =$00000024;
 SQ_PERF_SEL_INSTS_EXP_GDS                       =$00000025;
 SQ_PERF_SEL_INSTS_BRANCH                        =$00000026;
 SQ_PERF_SEL_INSTS_SENDMSG                       =$00000027;
 SQ_PERF_SEL_INSTS_VSKIPPED                      =$00000028;
 SQ_PERF_SEL_INST_LEVEL_VMEM                     =$00000029;
 SQ_PERF_SEL_INST_LEVEL_SMEM                     =$0000002a;
 SQ_PERF_SEL_INST_LEVEL_LDS                      =$0000002b;
 SQ_PERF_SEL_INST_LEVEL_GDS                      =$0000002c;
 SQ_PERF_SEL_INST_LEVEL_EXP                      =$0000002d;
 SQ_PERF_SEL_WAVE_CYCLES                         =$0000002e;
 SQ_PERF_SEL_WAVE_READY                          =$0000002f;
 SQ_PERF_SEL_WAIT_CNT_VM                         =$00000030;
 SQ_PERF_SEL_WAIT_CNT_LGKM                       =$00000031;
 SQ_PERF_SEL_WAIT_CNT_EXP                        =$00000032;
 SQ_PERF_SEL_WAIT_CNT_ANY                        =$00000033;
 SQ_PERF_SEL_WAIT_BARRIER                        =$00000034;
 SQ_PERF_SEL_WAIT_EXP_ALLOC                      =$00000035;
 SQ_PERF_SEL_WAIT_SLEEP                          =$00000036;
 SQ_PERF_SEL_WAIT_OTHER                          =$00000037;
 SQ_PERF_SEL_WAIT_ANY                            =$00000038;
 SQ_PERF_SEL_WAIT_TTRACE                         =$00000039;
 SQ_PERF_SEL_WAIT_IFETCH                         =$0000003a;
 SQ_PERF_SEL_WAIT_INST_VMEM                      =$0000003b;
 SQ_PERF_SEL_WAIT_INST_SCA                       =$0000003c;
 SQ_PERF_SEL_WAIT_INST_LDS                       =$0000003d;
 SQ_PERF_SEL_WAIT_INST_VALU                      =$0000003e;
 SQ_PERF_SEL_WAIT_INST_EXP_GDS                   =$0000003f;
 SQ_PERF_SEL_WAIT_INST_MISC                      =$00000040;
 SQ_PERF_SEL_WAIT_INST_FLAT                      =$00000041;
 SQ_PERF_SEL_ACTIVE_INST_ANY                     =$00000042;
 SQ_PERF_SEL_ACTIVE_INST_VMEM                    =$00000043;
 SQ_PERF_SEL_ACTIVE_INST_LDS                     =$00000044;
 SQ_PERF_SEL_ACTIVE_INST_VALU                    =$00000045;
 SQ_PERF_SEL_ACTIVE_INST_SCA                     =$00000046;
 SQ_PERF_SEL_ACTIVE_INST_EXP_GDS                 =$00000047;
 SQ_PERF_SEL_ACTIVE_INST_MISC                    =$00000048;
 SQ_PERF_SEL_ACTIVE_INST_FLAT                    =$00000049;
 SQ_PERF_SEL_INST_CYCLES_VMEM_WR                 =$0000004a;
 SQ_PERF_SEL_INST_CYCLES_VMEM_RD                 =$0000004b;
 SQ_PERF_SEL_INST_CYCLES_VMEM_ADDR               =$0000004c;
 SQ_PERF_SEL_INST_CYCLES_VMEM_DATA               =$0000004d;
 SQ_PERF_SEL_INST_CYCLES_VMEM_CMD                =$0000004e;
 SQ_PERF_SEL_INST_CYCLES_VMEM                    =$0000004f;
 SQ_PERF_SEL_INST_CYCLES_LDS                     =$00000050;
 SQ_PERF_SEL_INST_CYCLES_VALU                    =$00000051;
 SQ_PERF_SEL_INST_CYCLES_EXP                     =$00000052;
 SQ_PERF_SEL_INST_CYCLES_GDS                     =$00000053;
 SQ_PERF_SEL_INST_CYCLES_SCA                     =$00000054;
 SQ_PERF_SEL_INST_CYCLES_SMEM                    =$00000055;
 SQ_PERF_SEL_INST_CYCLES_SALU                    =$00000056;
 SQ_PERF_SEL_INST_CYCLES_EXP_GDS                 =$00000057;
 SQ_PERF_SEL_INST_CYCLES_MISC                    =$00000058;
 SQ_PERF_SEL_THREAD_CYCLES_VALU                  =$00000059;
 SQ_PERF_SEL_THREAD_CYCLES_VALU_MAX              =$0000005a;
 SQ_PERF_SEL_IFETCH                              =$0000005b;
 SQ_PERF_SEL_IFETCH_LEVEL                        =$0000005c;
 SQ_PERF_SEL_CBRANCH_FORK                        =$0000005d;
 SQ_PERF_SEL_CBRANCH_FORK_SPLIT                  =$0000005e;
 SQ_PERF_SEL_VALU_LDS_DIRECT_RD                  =$0000005f;
 SQ_PERF_SEL_VALU_LDS_INTERP_OP                  =$00000060;
 SQ_PERF_SEL_LDS_BANK_CONFLICT                   =$00000061;
 SQ_PERF_SEL_LDS_ADDR_CONFLICT                   =$00000062;
 SQ_PERF_SEL_LDS_UNALIGNED_STALL                 =$00000063;
 SQ_PERF_SEL_LDS_MEM_VIOLATIONS                  =$00000064;
 SQ_PERF_SEL_LDS_ATOMIC_RETURN                   =$00000065;
 SQ_PERF_SEL_LDS_IDX_ACTIVE                      =$00000066;
 SQ_PERF_SEL_VALU_DEP_STALL                      =$00000067;
 SQ_PERF_SEL_VALU_STARVE                         =$00000068;
 SQ_PERF_SEL_EXP_REQ_FIFO_FULL                   =$00000069;
 SQ_PERF_SEL_LDS_BACK2BACK_STALL                 =$0000006a;
 SQ_PERF_SEL_LDS_DATA_FIFO_FULL                  =$0000006b;
 SQ_PERF_SEL_LDS_CMD_FIFO_FULL                   =$0000006c;
 SQ_PERF_SEL_VMEM_BACK2BACK_STALL                =$0000006d;
 SQ_PERF_SEL_VMEM_TA_ADDR_FIFO_FULL              =$0000006e;
 SQ_PERF_SEL_VMEM_TA_CMD_FIFO_FULL               =$0000006f;
 SQ_PERF_SEL_VMEM_EX_DATA_REG_BUSY               =$00000070;
 SQ_PERF_SEL_VMEM_WR_BACK2BACK_STALL             =$00000071;
 SQ_PERF_SEL_VMEM_WR_TA_DATA_FIFO_FULL           =$00000072;
 SQ_PERF_SEL_VALU_SRC_C_CONFLICT                 =$00000073;
 SQ_PERF_SEL_VMEM_RD_SRC_CD_CONFLICT             =$00000074;
 SQ_PERF_SEL_VMEM_WR_SRC_CD_CONFLICT             =$00000075;
 SQ_PERF_SEL_FLAT_SRC_CD_CONFLICT                =$00000076;
 SQ_PERF_SEL_LDS_SRC_CD_CONFLICT                 =$00000077;
 SQ_PERF_SEL_SRC_CD_BUSY                         =$00000078;
 SQ_PERF_SEL_PT_POWER_STALL                      =$00000079;
 SQ_PERF_SEL_USER0                               =$0000007a;
 SQ_PERF_SEL_USER1                               =$0000007b;
 SQ_PERF_SEL_USER2                               =$0000007c;
 SQ_PERF_SEL_USER3                               =$0000007d;
 SQ_PERF_SEL_USER4                               =$0000007e;
 SQ_PERF_SEL_USER5                               =$0000007f;
 SQ_PERF_SEL_USER6                               =$00000080;
 SQ_PERF_SEL_USER7                               =$00000081;
 SQ_PERF_SEL_USER8                               =$00000082;
 SQ_PERF_SEL_USER9                               =$00000083;
 SQ_PERF_SEL_USER10                              =$00000084;
 SQ_PERF_SEL_USER11                              =$00000085;
 SQ_PERF_SEL_USER12                              =$00000086;
 SQ_PERF_SEL_USER13                              =$00000087;
 SQ_PERF_SEL_USER14                              =$00000088;
 SQ_PERF_SEL_USER15                              =$00000089;
 SQ_PERF_SEL_USER_LEVEL0                         =$0000008a;
 SQ_PERF_SEL_USER_LEVEL1                         =$0000008b;
 SQ_PERF_SEL_USER_LEVEL2                         =$0000008c;
 SQ_PERF_SEL_USER_LEVEL3                         =$0000008d;
 SQ_PERF_SEL_USER_LEVEL4                         =$0000008e;
 SQ_PERF_SEL_USER_LEVEL5                         =$0000008f;
 SQ_PERF_SEL_USER_LEVEL6                         =$00000090;
 SQ_PERF_SEL_USER_LEVEL7                         =$00000091;
 SQ_PERF_SEL_USER_LEVEL8                         =$00000092;
 SQ_PERF_SEL_USER_LEVEL9                         =$00000093;
 SQ_PERF_SEL_USER_LEVEL10                        =$00000094;
 SQ_PERF_SEL_USER_LEVEL11                        =$00000095;
 SQ_PERF_SEL_USER_LEVEL12                        =$00000096;
 SQ_PERF_SEL_USER_LEVEL13                        =$00000097;
 SQ_PERF_SEL_USER_LEVEL14                        =$00000098;
 SQ_PERF_SEL_USER_LEVEL15                        =$00000099;
 SQ_PERF_SEL_POWER_VALU                          =$0000009a;
 SQ_PERF_SEL_POWER_VALU0                         =$0000009b;
 SQ_PERF_SEL_POWER_VALU1                         =$0000009c;
 SQ_PERF_SEL_POWER_VALU2                         =$0000009d;
 SQ_PERF_SEL_POWER_GPR_RD                        =$0000009e;
 SQ_PERF_SEL_POWER_GPR_WR                        =$0000009f;
 SQ_PERF_SEL_POWER_LDS_BUSY                      =$000000a0;
 SQ_PERF_SEL_POWER_ALU_BUSY                      =$000000a1;
 SQ_PERF_SEL_POWER_TEX_BUSY                      =$000000a2;
 SQ_PERF_SEL_ACCUM_PREV_HIRES                    =$000000a3;
 SQ_PERF_SEL_WAVES_RESTORED                      =$000000a4;
 SQ_PERF_SEL_WAVES_SAVED                         =$000000a5;
 SQ_PERF_SEL_DUMMY_LAST                          =$000000a7;
 SQC_PERF_SEL_ICACHE_INPUT_VALID_READY           =$000000a8;
 SQC_PERF_SEL_ICACHE_INPUT_VALID_READYB          =$000000a9;
 SQC_PERF_SEL_ICACHE_INPUT_VALIDB                =$000000aa;
 SQC_PERF_SEL_DCACHE_INPUT_VALID_READY           =$000000ab;
 SQC_PERF_SEL_DCACHE_INPUT_VALID_READYB          =$000000ac;
 SQC_PERF_SEL_DCACHE_INPUT_VALIDB                =$000000ad;
 SQC_PERF_SEL_TC_REQ                             =$000000ae;
 SQC_PERF_SEL_TC_INST_REQ                        =$000000af;
 SQC_PERF_SEL_TC_DATA_READ_REQ                   =$000000b0;
 SQC_PERF_SEL_TC_DATA_WRITE_REQ                  =$000000b1;
 SQC_PERF_SEL_TC_DATA_ATOMIC_REQ                 =$000000b2;
 SQC_PERF_SEL_TC_STALL                           =$000000b3;
 SQC_PERF_SEL_TC_STARVE                          =$000000b4;
 SQC_PERF_SEL_ICACHE_BUSY_CYCLES                 =$000000b5;
 SQC_PERF_SEL_ICACHE_REQ                         =$000000b6;
 SQC_PERF_SEL_ICACHE_HITS                        =$000000b7;
 SQC_PERF_SEL_ICACHE_MISSES                      =$000000b8;
 SQC_PERF_SEL_ICACHE_MISSES_DUPLICATE            =$000000b9;
 SQC_PERF_SEL_ICACHE_INVAL_INST                  =$000000ba;
 SQC_PERF_SEL_ICACHE_INVAL_ASYNC                 =$000000bb;
 SQC_PERF_SEL_ICACHE_INPUT_STALL_ARB_NO_GRANT    =$000000bc;
 SQC_PERF_SEL_ICACHE_INPUT_STALL_BANK_READYB     =$000000bd;
 SQC_PERF_SEL_ICACHE_CACHE_STALLED               =$000000be;
 SQC_PERF_SEL_ICACHE_CACHE_STALL_INFLIGHT_NONZERO=$000000bf;
 SQC_PERF_SEL_ICACHE_CACHE_STALL_INFLIGHT_MAX    =$000000c0;
 SQC_PERF_SEL_ICACHE_CACHE_STALL_OUTPUT          =$000000c1;
 SQC_PERF_SEL_ICACHE_CACHE_STALL_OUTPUT_MISS_FIFO=$000000c2;
 SQC_PERF_SEL_ICACHE_CACHE_STALL_OUTPUT_HIT_FIFO =$000000c3;
 SQC_PERF_SEL_ICACHE_CACHE_STALL_OUTPUT_TC_IF    =$000000c4;
 SQC_PERF_SEL_ICACHE_STALL_OUTXBAR_ARB_NO_GRANT  =$000000c5;
 SQC_PERF_SEL_DCACHE_BUSY_CYCLES                 =$000000c6;
 SQC_PERF_SEL_DCACHE_REQ                         =$000000c7;
 SQC_PERF_SEL_DCACHE_HITS                        =$000000c8;
 SQC_PERF_SEL_DCACHE_MISSES                      =$000000c9;
 SQC_PERF_SEL_DCACHE_MISSES_DUPLICATE            =$000000ca;
 SQC_PERF_SEL_DCACHE_HIT_LRU_READ                =$000000cb;
 SQC_PERF_SEL_DCACHE_MISS_EVICT_READ             =$000000cc;
 SQC_PERF_SEL_DCACHE_WC_LRU_WRITE                =$000000cd;
 SQC_PERF_SEL_DCACHE_WT_EVICT_WRITE              =$000000ce;
 SQC_PERF_SEL_DCACHE_ATOMIC                      =$000000cf;
 SQC_PERF_SEL_DCACHE_VOLATILE                    =$000000d0;
 SQC_PERF_SEL_DCACHE_INVAL_INST                  =$000000d1;
 SQC_PERF_SEL_DCACHE_INVAL_ASYNC                 =$000000d2;
 SQC_PERF_SEL_DCACHE_INVAL_VOLATILE_INST         =$000000d3;
 SQC_PERF_SEL_DCACHE_INVAL_VOLATILE_ASYNC        =$000000d4;
 SQC_PERF_SEL_DCACHE_WB_INST                     =$000000d5;
 SQC_PERF_SEL_DCACHE_WB_ASYNC                    =$000000d6;
 SQC_PERF_SEL_DCACHE_WB_VOLATILE_INST            =$000000d7;
 SQC_PERF_SEL_DCACHE_WB_VOLATILE_ASYNC           =$000000d8;
 SQC_PERF_SEL_DCACHE_INPUT_STALL_ARB_NO_GRANT    =$000000d9;
 SQC_PERF_SEL_DCACHE_INPUT_STALL_BANK_READYB     =$000000da;
 SQC_PERF_SEL_DCACHE_CACHE_STALLED               =$000000db;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_INFLIGHT_MAX    =$000000dc;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_OUTPUT          =$000000dd;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_EVICT           =$000000de;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_UNORDERED       =$000000df;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_FORCE_EVICT     =$000000e1;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_MULTI_FLUSH     =$000000e2;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_FLUSH_DONE      =$000000e3;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_OUTPUT_MISS_FIFO=$000000e4;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_OUTPUT_HIT_FIFO =$000000e5;
 SQC_PERF_SEL_DCACHE_CACHE_STALL_OUTPUT_TC_IF    =$000000e6;
 SQC_PERF_SEL_DCACHE_STALL_OUTXBAR_ARB_NO_GRANT  =$000000e7;
 SQC_PERF_SEL_DCACHE_REQ_READ_1                  =$000000e8;
 SQC_PERF_SEL_DCACHE_REQ_READ_2                  =$000000e9;
 SQC_PERF_SEL_DCACHE_REQ_READ_4                  =$000000ea;
 SQC_PERF_SEL_DCACHE_REQ_READ_8                  =$000000eb;
 SQC_PERF_SEL_DCACHE_REQ_READ_16                 =$000000ec;
 SQC_PERF_SEL_DCACHE_REQ_TIME                    =$000000ed;
 SQC_PERF_SEL_DCACHE_REQ_WRITE_1                 =$000000ee;
 SQC_PERF_SEL_DCACHE_REQ_WRITE_2                 =$000000ef;
 SQC_PERF_SEL_DCACHE_REQ_WRITE_4                 =$000000f0;
 SQC_PERF_SEL_DCACHE_REQ_ATC_PROBE               =$000000f1;
 SQC_PERF_SEL_SQ_DCACHE_REQS                     =$000000f2;
 SQC_PERF_SEL_DCACHE_FLAT_REQ                    =$000000f3;
 SQC_PERF_SEL_DCACHE_NONFLAT_REQ                 =$000000f4;
 SQC_PERF_SEL_ICACHE_INFLIGHT_LEVEL              =$000000f5;
 SQC_PERF_SEL_DCACHE_INFLIGHT_LEVEL              =$000000f6;
 SQC_PERF_SEL_TC_INFLIGHT_LEVEL                  =$000000f7;
 SQC_PERF_SEL_ICACHE_TC_INFLIGHT_LEVEL           =$000000f8;
 SQC_PERF_SEL_DCACHE_TC_INFLIGHT_LEVEL           =$000000f9;
 SQC_PERF_SEL_ICACHE_GATCL1_TRANSLATION_MISS     =$000000fa;
 SQC_PERF_SEL_ICACHE_GATCL1_PERMISSION_MISS      =$000000fb;
 SQC_PERF_SEL_ICACHE_GATCL1_REQUEST              =$000000fc;
 SQC_PERF_SEL_ICACHE_GATCL1_STALL_INFLIGHT_MAX   =$000000fd;
 SQC_PERF_SEL_ICACHE_GATCL1_STALL_LRU_INFLIGHT   =$000000fe;
 SQC_PERF_SEL_ICACHE_GATCL1_LFIFO_FULL           =$000000ff;
 SQC_PERF_SEL_ICACHE_GATCL1_STALL_LFIFO_NOT_RES  =$00000100;
 SQC_PERF_SEL_ICACHE_GATCL1_ATCL2_INFLIGHT       =$00000102;
 SQC_PERF_SEL_ICACHE_GATCL1_STALL_MISSFIFO_FULL  =$00000103;
 SQC_PERF_SEL_DCACHE_GATCL1_TRANSLATION_MISS     =$00000104;
 SQC_PERF_SEL_DCACHE_GATCL1_PERMISSION_MISS      =$00000105;
 SQC_PERF_SEL_DCACHE_GATCL1_REQUEST              =$00000106;
 SQC_PERF_SEL_DCACHE_GATCL1_STALL_INFLIGHT_MAX   =$00000107;
 SQC_PERF_SEL_DCACHE_GATCL1_STALL_LRU_INFLIGHT   =$00000108;
 SQC_PERF_SEL_DCACHE_GATCL1_LFIFO_FULL           =$00000109;
 SQC_PERF_SEL_DCACHE_GATCL1_STALL_LFIFO_NOT_RES  =$0000010a;
 SQC_PERF_SEL_DCACHE_GATCL1_ATCL2_INFLIGHT       =$0000010c;
 SQC_PERF_SEL_DCACHE_GATCL1_STALL_MISSFIFO_FULL  =$0000010d;
 SQC_PERF_SEL_DCACHE_GATCL1_STALL_MULTI_MISS     =$0000010e;
 SQC_PERF_SEL_DCACHE_GATCL1_HIT_FIFO_FULL        =$0000010f;
 SQC_PERF_SEL_DUMMY_LAST                         =$00000110;
 SQ_PERF_SEL_INSTS_SMEM_NORM                     =$00000111;
 SQ_PERF_SEL_ATC_INSTS_VMEM                      =$00000112;
 SQ_PERF_SEL_ATC_INST_LEVEL_VMEM                 =$00000113;
 SQ_PERF_SEL_ATC_XNACK_FIRST                     =$00000114;
 SQ_PERF_SEL_ATC_XNACK_ALL                       =$00000115;
 SQ_PERF_SEL_ATC_XNACK_FIFO_FULL                 =$00000116;
 SQ_PERF_SEL_ATC_INSTS_SMEM                      =$00000117;
 SQ_PERF_SEL_ATC_INST_LEVEL_SMEM                 =$00000118;
 SQ_PERF_SEL_IFETCH_XNACK                        =$00000119;
 SQ_PERF_SEL_TLB_SHOOTDOWN                       =$0000011a;
 SQ_PERF_SEL_TLB_SHOOTDOWN_CYCLES                =$0000011b;
 SQ_PERF_SEL_INSTS_VMEM_WR_REPLAY                =$0000011c;
 SQ_PERF_SEL_INSTS_VMEM_RD_REPLAY                =$0000011d;
 SQ_PERF_SEL_INSTS_VMEM_REPLAY                   =$0000011e;
 SQ_PERF_SEL_INSTS_SMEM_REPLAY                   =$0000011f;
 SQ_PERF_SEL_INSTS_SMEM_NORM_REPLAY              =$00000120;
 SQ_PERF_SEL_INSTS_FLAT_REPLAY                   =$00000121;
 SQ_PERF_SEL_ATC_INSTS_VMEM_REPLAY               =$00000122;
 SQ_PERF_SEL_ATC_INSTS_SMEM_REPLAY               =$00000123;
 SQ_PERF_SEL_DUMMY_LAST1                         =$0000012a;
 // SQ_ROUND_MODE
 SQ_ROUND_NEAREST_EVEN                           =$00000000;
 SQ_ROUND_PLUS_INFINITY                          =$00000001;
 SQ_ROUND_MINUS_INFINITY                         =$00000002;
 SQ_ROUND_TO_ZERO                                =$00000003;
 // SQ_RSRC_BUF_TYPE
 SQ_RSRC_BUF                                     =$00000000;
 SQ_RSRC_BUF_RSVD_1                              =$00000001;
 SQ_RSRC_BUF_RSVD_2                              =$00000002;
 SQ_RSRC_BUF_RSVD_3                              =$00000003;
 // SQ_RSRC_FLAT_TYPE
 SQ_RSRC_FLAT_RSVD_0                             =$00000000;
 SQ_RSRC_FLAT                                    =$00000001;
 SQ_RSRC_FLAT_RSVD_2                             =$00000002;
 SQ_RSRC_FLAT_RSVD_3                             =$00000003;
 // SQ_RSRC_IMG_TYPE
 SQ_RSRC_IMG_RSVD_0                              =$00000000;
 SQ_RSRC_IMG_RSVD_1                              =$00000001;
 SQ_RSRC_IMG_RSVD_2                              =$00000002;
 SQ_RSRC_IMG_RSVD_3                              =$00000003;
 SQ_RSRC_IMG_RSVD_4                              =$00000004;
 SQ_RSRC_IMG_RSVD_5                              =$00000005;
 SQ_RSRC_IMG_RSVD_6                              =$00000006;
 SQ_RSRC_IMG_RSVD_7                              =$00000007;
 SQ_RSRC_IMG_1D                                  =$00000008;
 SQ_RSRC_IMG_2D                                  =$00000009;
 SQ_RSRC_IMG_3D                                  =$0000000a;
 SQ_RSRC_IMG_CUBE                                =$0000000b;
 SQ_RSRC_IMG_1D_ARRAY                            =$0000000c;
 SQ_RSRC_IMG_2D_ARRAY                            =$0000000d;
 SQ_RSRC_IMG_2D_MSAA                             =$0000000e;
 SQ_RSRC_IMG_2D_MSAA_ARRAY                       =$0000000f;
 // SQ_SEL_XYZW01
 SQ_SEL_0                                        =$00000000;
 SQ_SEL_1                                        =$00000001;
 SQ_SEL_RESERVED_0                               =$00000002;
 SQ_SEL_RESERVED_1                               =$00000003;
 SQ_SEL_X                                        =$00000004;
 SQ_SEL_Y                                        =$00000005;
 SQ_SEL_Z                                        =$00000006;
 SQ_SEL_W                                        =$00000007;
 // SQ_TEX_ANISO_RATIO
 SQ_TEX_ANISO_RATIO_1                            =$00000000;
 SQ_TEX_ANISO_RATIO_2                            =$00000001;
 SQ_TEX_ANISO_RATIO_4                            =$00000002;
 SQ_TEX_ANISO_RATIO_8                            =$00000003;
 SQ_TEX_ANISO_RATIO_16                           =$00000004;
 // SQ_TEX_BORDER_COLOR
 SQ_TEX_BORDER_COLOR_TRANS_BLACK                 =$00000000;
 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK                =$00000001;
 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE                =$00000002;
 SQ_TEX_BORDER_COLOR_REGISTER                    =$00000003;
 // SQ_TEX_CLAMP
 SQ_TEX_WRAP                                     =$00000000;
 SQ_TEX_MIRROR                                   =$00000001;
 SQ_TEX_CLAMP_LAST_TEXEL                         =$00000002;
 SQ_TEX_MIRROR_ONCE_LAST_TEXEL                   =$00000003;
 SQ_TEX_CLAMP_HALF_BORDER                        =$00000004;
 SQ_TEX_MIRROR_ONCE_HALF_BORDER                  =$00000005;
 SQ_TEX_CLAMP_BORDER                             =$00000006;
 SQ_TEX_MIRROR_ONCE_BORDER                       =$00000007;
 // SQ_TEX_DEPTH_COMPARE
 SQ_TEX_DEPTH_COMPARE_NEVER                      =$00000000;
 SQ_TEX_DEPTH_COMPARE_LESS                       =$00000001;
 SQ_TEX_DEPTH_COMPARE_EQUAL                      =$00000002;
 SQ_TEX_DEPTH_COMPARE_LESSEQUAL                  =$00000003;
 SQ_TEX_DEPTH_COMPARE_GREATER                    =$00000004;
 SQ_TEX_DEPTH_COMPARE_NOTEQUAL                   =$00000005;
 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL               =$00000006;
 SQ_TEX_DEPTH_COMPARE_ALWAYS                     =$00000007;
 // SQ_TEX_MIP_FILTER
 SQ_TEX_MIP_FILTER_NONE                          =$00000000;
 SQ_TEX_MIP_FILTER_POINT                         =$00000001;
 SQ_TEX_MIP_FILTER_LINEAR                        =$00000002;
 SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ               =$00000003;
 // SQ_TEX_XY_FILTER
 SQ_TEX_XY_FILTER_POINT                          =$00000000;
 SQ_TEX_XY_FILTER_BILINEAR                       =$00000001;
 SQ_TEX_XY_FILTER_ANISO_POINT                    =$00000002;
 SQ_TEX_XY_FILTER_ANISO_BILINEAR                 =$00000003;
 // SQ_TEX_Z_FILTER
 SQ_TEX_Z_FILTER_NONE                            =$00000000;
 SQ_TEX_Z_FILTER_POINT                           =$00000001;
 SQ_TEX_Z_FILTER_LINEAR                          =$00000002;
 // SQ_THREAD_TRACE_CAPTURE_MODE
 SQ_THREAD_TRACE_CAPTURE_MODE_ALL                =$00000000;
 SQ_THREAD_TRACE_CAPTURE_MODE_SELECT             =$00000001;
 SQ_THREAD_TRACE_CAPTURE_MODE_SELECT_DETAIL      =$00000002;
 // SQ_THREAD_TRACE_INST_TYPE
 SQ_THREAD_TRACE_INST_TYPE_SMEM_RD               =$00000000;
 SQ_THREAD_TRACE_INST_TYPE_SALU_32               =$00000001;
 SQ_THREAD_TRACE_INST_TYPE_VMEM_RD               =$00000002;
 SQ_THREAD_TRACE_INST_TYPE_VMEM_WR               =$00000003;
 SQ_THREAD_TRACE_INST_TYPE_FLAT_WR               =$00000004;
 SQ_THREAD_TRACE_INST_TYPE_VALU_32               =$00000005;
 SQ_THREAD_TRACE_INST_TYPE_LDS                   =$00000006;
 SQ_THREAD_TRACE_INST_TYPE_PC                    =$00000007;
 SQ_THREAD_TRACE_INST_TYPE_EXPREQ_GDS            =$00000008;
 SQ_THREAD_TRACE_INST_TYPE_EXPREQ_GFX            =$00000009;
 SQ_THREAD_TRACE_INST_TYPE_EXPGNT_PAR_COL        =$0000000a;
 SQ_THREAD_TRACE_INST_TYPE_EXPGNT_POS_GDS        =$0000000b;
 SQ_THREAD_TRACE_INST_TYPE_JUMP                  =$0000000c;
 SQ_THREAD_TRACE_INST_TYPE_NEXT                  =$0000000d;
 SQ_THREAD_TRACE_INST_TYPE_FLAT_RD               =$0000000e;
 SQ_THREAD_TRACE_INST_TYPE_OTHER_MSG             =$0000000f;
 SQ_THREAD_TRACE_INST_TYPE_SMEM_WR               =$00000010;
 SQ_THREAD_TRACE_INST_TYPE_SALU_64               =$00000011;
 SQ_THREAD_TRACE_INST_TYPE_VALU_64               =$00000012;
 SQ_THREAD_TRACE_INST_TYPE_SMEM_RD_REPLAY        =$00000013;
 SQ_THREAD_TRACE_INST_TYPE_SMEM_WR_REPLAY        =$00000014;
 SQ_THREAD_TRACE_INST_TYPE_VMEM_RD_REPLAY        =$00000015;
 SQ_THREAD_TRACE_INST_TYPE_VMEM_WR_REPLAY        =$00000016;
 SQ_THREAD_TRACE_INST_TYPE_FLAT_RD_REPLAY        =$00000017;
 SQ_THREAD_TRACE_INST_TYPE_FLAT_WR_REPLAY        =$00000018;
 // SQ_THREAD_TRACE_ISSUE
 SQ_THREAD_TRACE_ISSUE_NULL                      =$00000000;
 SQ_THREAD_TRACE_ISSUE_STALL                     =$00000001;
 SQ_THREAD_TRACE_ISSUE_INST                      =$00000002;
 SQ_THREAD_TRACE_ISSUE_IMMED                     =$00000003;
 // SQ_THREAD_TRACE_ISSUE_MASK
 SQ_THREAD_TRACE_ISSUE_MASK_ALL                  =$00000000;
 SQ_THREAD_TRACE_ISSUE_MASK_STALLED              =$00000001;
 SQ_THREAD_TRACE_ISSUE_MASK_STALLED_AND_IMMED    =$00000002;
 SQ_THREAD_TRACE_ISSUE_MASK_IMMED                =$00000003;
 // SQ_THREAD_TRACE_MISC_TOKEN_TYPE
 SQ_THREAD_TRACE_MISC_TOKEN_TIME                 =$00000000;
 SQ_THREAD_TRACE_MISC_TOKEN_TIME_RESET           =$00000001;
 SQ_THREAD_TRACE_MISC_TOKEN_PACKET_LOST          =$00000002;
 SQ_THREAD_TRACE_MISC_TOKEN_SURF_SYNC            =$00000003;
 SQ_THREAD_TRACE_MISC_TOKEN_TTRACE_STALL_BEGIN   =$00000004;
 SQ_THREAD_TRACE_MISC_TOKEN_TTRACE_STALL_END     =$00000005;
 SQ_THREAD_TRACE_MISC_TOKEN_SAVECTX              =$00000006;
 SQ_THREAD_TRACE_MISC_TOKEN_SHOOT_DOWN           =$00000007;
 // SQ_THREAD_TRACE_MODE_SEL
 SQ_THREAD_TRACE_MODE_OFF                        =$00000000;
 SQ_THREAD_TRACE_MODE_ON                         =$00000001;
 // SQ_THREAD_TRACE_REG_OP
 SQ_THREAD_TRACE_REG_OP_READ                     =$00000000;
 SQ_THREAD_TRACE_REG_OP_WRITE                    =$00000001;
 // SQ_THREAD_TRACE_REG_TYPE
 SQ_THREAD_TRACE_REG_TYPE_EVENT                  =$00000000;
 SQ_THREAD_TRACE_REG_TYPE_DRAW                   =$00000001;
 SQ_THREAD_TRACE_REG_TYPE_DISPATCH               =$00000002;
 SQ_THREAD_TRACE_REG_TYPE_USERDATA               =$00000003;
 SQ_THREAD_TRACE_REG_TYPE_MARKER                 =$00000004;
 SQ_THREAD_TRACE_REG_TYPE_GFXDEC                 =$00000005;
 SQ_THREAD_TRACE_REG_TYPE_SHDEC                  =$00000006;
 SQ_THREAD_TRACE_REG_TYPE_OTHER                  =$00000007;
 // SQ_THREAD_TRACE_TOKEN_TYPE
 SQ_THREAD_TRACE_TOKEN_MISC                      =$00000000;
 SQ_THREAD_TRACE_TOKEN_TIMESTAMP                 =$00000001;
 SQ_THREAD_TRACE_TOKEN_REG                       =$00000002;
 SQ_THREAD_TRACE_TOKEN_WAVE_START                =$00000003;
 SQ_THREAD_TRACE_TOKEN_WAVE_ALLOC                =$00000004;
 SQ_THREAD_TRACE_TOKEN_REG_CSPRIV                =$00000005;
 SQ_THREAD_TRACE_TOKEN_WAVE_END                  =$00000006;
 SQ_THREAD_TRACE_TOKEN_EVENT                     =$00000007;
 SQ_THREAD_TRACE_TOKEN_EVENT_CS                  =$00000008;
 SQ_THREAD_TRACE_TOKEN_EVENT_GFX1                =$00000009;
 SQ_THREAD_TRACE_TOKEN_INST                      =$0000000a;
 SQ_THREAD_TRACE_TOKEN_INST_PC                   =$0000000b;
 SQ_THREAD_TRACE_TOKEN_INST_USERDATA             =$0000000c;
 SQ_THREAD_TRACE_TOKEN_ISSUE                     =$0000000d;
 SQ_THREAD_TRACE_TOKEN_PERF                      =$0000000e;
 SQ_THREAD_TRACE_TOKEN_REG_CS                    =$0000000f;
 // SQ_THREAD_TRACE_VM_ID_MASK
 SQ_THREAD_TRACE_VM_ID_MASK_SINGLE               =$00000000;
 SQ_THREAD_TRACE_VM_ID_MASK_ALL                  =$00000001;
 SQ_THREAD_TRACE_VM_ID_MASK_SINGLE_DETAIL        =$00000002;
 // SQ_THREAD_TRACE_WAVE_MASK
 SQ_THREAD_TRACE_WAVE_MASK_NONE                  =$00000000;
 SQ_THREAD_TRACE_WAVE_MASK_ALL                   =$00000001;
 // SQ_WAVE_IB_ECC_ST
 SQ_WAVE_IB_ECC_CLEAN                            =$00000000;
 SQ_WAVE_IB_ECC_ERR_CONTINUE                     =$00000001;
 SQ_WAVE_IB_ECC_ERR_HALT                         =$00000002;
 SQ_WAVE_IB_ECC_WITH_ERR_MSG                     =$00000003;
 // SQ_WAVE_TYPE
 SQ_WAVE_TYPE_PS                                 =$00000000;
 SQ_WAVE_TYPE_VS                                 =$00000001;
 SQ_WAVE_TYPE_GS                                 =$00000002;
 SQ_WAVE_TYPE_ES                                 =$00000003;
 SQ_WAVE_TYPE_HS                                 =$00000004;
 SQ_WAVE_TYPE_LS                                 =$00000005;
 SQ_WAVE_TYPE_CS                                 =$00000006;
 SQ_WAVE_TYPE_PS1                                =$00000007;
 // SRBM_PERFCOUNT1_SEL
 SRBM_PERF_SEL_COUNT                             =$00000000;
 SRBM_PERF_SEL_BIF_BUSY                          =$00000001;
 SRBM_PERF_SEL_SDMA0_BUSY                        =$00000003;
 SRBM_PERF_SEL_IH_BUSY                           =$00000004;
 SRBM_PERF_SEL_MCB_BUSY                          =$00000005;
 SRBM_PERF_SEL_MCB_NON_DISPLAY_BUSY              =$00000006;
 SRBM_PERF_SEL_MCC_BUSY                          =$00000007;
 SRBM_PERF_SEL_MCD_BUSY                          =$00000008;
 SRBM_PERF_SEL_CHUB_BUSY                         =$00000009;
 SRBM_PERF_SEL_SEM_BUSY                          =$0000000a;
 SRBM_PERF_SEL_UVD_BUSY                          =$0000000b;
 SRBM_PERF_SEL_VMC_BUSY                          =$0000000c;
 SRBM_PERF_SEL_ODE_BUSY                          =$0000000d;
 SRBM_PERF_SEL_SDMA1_BUSY                        =$0000000e;
 SRBM_PERF_SEL_SAMMSP_BUSY                       =$0000000f;
 SRBM_PERF_SEL_VCE0_BUSY                         =$00000010;
 SRBM_PERF_SEL_XDMA_BUSY                         =$00000011;
 SRBM_PERF_SEL_ACP_BUSY                          =$00000012;
 SRBM_PERF_SEL_SDMA2_BUSY                        =$00000013;
 SRBM_PERF_SEL_SDMA3_BUSY                        =$00000014;
 SRBM_PERF_SEL_SAMSCP_BUSY                       =$00000015;
 SRBM_PERF_SEL_VMC1_BUSY                         =$00000016;
 SRBM_PERF_SEL_ISP_BUSY                          =$00000017;
 SRBM_PERF_SEL_VCE1_BUSY                         =$00000018;
 SRBM_PERF_SEL_GCATCL2_BUSY                      =$00000019;
 SRBM_PERF_SEL_OSATCL2_BUSY                      =$0000001a;
 SRBM_PERF_SEL_VP8_BUSY                          =$0000001b;
 // SU_PERFCNT_SEL
 PERF_PAPC_PASX_REQ                              =$00000000;
 PERF_PAPC_PASX_DISABLE_PIPE                     =$00000001;
 PERF_PAPC_PASX_FIRST_VECTOR                     =$00000002;
 PERF_PAPC_PASX_SECOND_VECTOR                    =$00000003;
 PERF_PAPC_PASX_FIRST_DEAD                       =$00000004;
 PERF_PAPC_PASX_SECOND_DEAD                      =$00000005;
 PERF_PAPC_PASX_VTX_KILL_DISCARD                 =$00000006;
 PERF_PAPC_PASX_VTX_NAN_DISCARD                  =$00000007;
 PERF_PAPC_PA_INPUT_PRIM                         =$00000008;
 PERF_PAPC_PA_INPUT_NULL_PRIM                    =$00000009;
 PERF_PAPC_PA_INPUT_EVENT_FLAG                   =$0000000a;
 PERF_PAPC_PA_INPUT_FIRST_PRIM_SLOT              =$0000000b;
 PERF_PAPC_PA_INPUT_END_OF_PACKET                =$0000000c;
 PERF_PAPC_PA_INPUT_EXTENDED_EVENT               =$0000000d;
 PERF_PAPC_CLPR_CULL_PRIM                        =$0000000e;
 PERF_PAPC_CLPR_VVUCP_CULL_PRIM                  =$0000000f;
 PERF_PAPC_CLPR_VV_CULL_PRIM                     =$00000010;
 PERF_PAPC_CLPR_UCP_CULL_PRIM                    =$00000011;
 PERF_PAPC_CLPR_VTX_KILL_CULL_PRIM               =$00000012;
 PERF_PAPC_CLPR_VTX_NAN_CULL_PRIM                =$00000013;
 PERF_PAPC_CLPR_CULL_TO_NULL_PRIM                =$00000014;
 PERF_PAPC_CLPR_VVUCP_CLIP_PRIM                  =$00000015;
 PERF_PAPC_CLPR_VV_CLIP_PRIM                     =$00000016;
 PERF_PAPC_CLPR_UCP_CLIP_PRIM                    =$00000017;
 PERF_PAPC_CLPR_POINT_CLIP_CANDIDATE             =$00000018;
 PERF_PAPC_CLPR_CLIP_PLANE_CNT_1                 =$00000019;
 PERF_PAPC_CLPR_CLIP_PLANE_CNT_2                 =$0000001a;
 PERF_PAPC_CLPR_CLIP_PLANE_CNT_3                 =$0000001b;
 PERF_PAPC_CLPR_CLIP_PLANE_CNT_4                 =$0000001c;
 PERF_PAPC_CLPR_CLIP_PLANE_CNT_5_8               =$0000001d;
 PERF_PAPC_CLPR_CLIP_PLANE_CNT_9_12              =$0000001e;
 PERF_PAPC_CLPR_CLIP_PLANE_NEAR                  =$0000001f;
 PERF_PAPC_CLPR_CLIP_PLANE_FAR                   =$00000020;
 PERF_PAPC_CLPR_CLIP_PLANE_LEFT                  =$00000021;
 PERF_PAPC_CLPR_CLIP_PLANE_RIGHT                 =$00000022;
 PERF_PAPC_CLPR_CLIP_PLANE_TOP                   =$00000023;
 PERF_PAPC_CLPR_CLIP_PLANE_BOTTOM                =$00000024;
 PERF_PAPC_CLPR_GSC_KILL_CULL_PRIM               =$00000025;
 PERF_PAPC_CLPR_RASTER_KILL_CULL_PRIM            =$00000026;
 PERF_PAPC_CLSM_NULL_PRIM                        =$00000027;
 PERF_PAPC_CLSM_TOTALLY_VISIBLE_PRIM             =$00000028;
 PERF_PAPC_CLSM_CULL_TO_NULL_PRIM                =$00000029;
 PERF_PAPC_CLSM_OUT_PRIM_CNT_1                   =$0000002a;
 PERF_PAPC_CLSM_OUT_PRIM_CNT_2                   =$0000002b;
 PERF_PAPC_CLSM_OUT_PRIM_CNT_3                   =$0000002c;
 PERF_PAPC_CLSM_OUT_PRIM_CNT_4                   =$0000002d;
 PERF_PAPC_CLSM_OUT_PRIM_CNT_5_8                 =$0000002e;
 PERF_PAPC_CLSM_OUT_PRIM_CNT_9_13                =$0000002f;
 PERF_PAPC_CLIPGA_VTE_KILL_PRIM                  =$00000030;
 PERF_PAPC_SU_INPUT_PRIM                         =$00000031;
 PERF_PAPC_SU_INPUT_CLIP_PRIM                    =$00000032;
 PERF_PAPC_SU_INPUT_NULL_PRIM                    =$00000033;
 PERF_PAPC_SU_INPUT_PRIM_DUAL                    =$00000034;
 PERF_PAPC_SU_INPUT_CLIP_PRIM_DUAL               =$00000035;
 PERF_PAPC_SU_ZERO_AREA_CULL_PRIM                =$00000036;
 PERF_PAPC_SU_BACK_FACE_CULL_PRIM                =$00000037;
 PERF_PAPC_SU_FRONT_FACE_CULL_PRIM               =$00000038;
 PERF_PAPC_SU_POLYMODE_FACE_CULL                 =$00000039;
 PERF_PAPC_SU_POLYMODE_BACK_CULL                 =$0000003a;
 PERF_PAPC_SU_POLYMODE_FRONT_CULL                =$0000003b;
 PERF_PAPC_SU_POLYMODE_INVALID_FILL              =$0000003c;
 PERF_PAPC_SU_OUTPUT_PRIM                        =$0000003d;
 PERF_PAPC_SU_OUTPUT_CLIP_PRIM                   =$0000003e;
 PERF_PAPC_SU_OUTPUT_NULL_PRIM                   =$0000003f;
 PERF_PAPC_SU_OUTPUT_EVENT_FLAG                  =$00000040;
 PERF_PAPC_SU_OUTPUT_FIRST_PRIM_SLOT             =$00000041;
 PERF_PAPC_SU_OUTPUT_END_OF_PACKET               =$00000042;
 PERF_PAPC_SU_OUTPUT_POLYMODE_FACE               =$00000043;
 PERF_PAPC_SU_OUTPUT_POLYMODE_BACK               =$00000044;
 PERF_PAPC_SU_OUTPUT_POLYMODE_FRONT              =$00000045;
 PERF_PAPC_SU_OUT_CLIP_POLYMODE_FACE             =$00000046;
 PERF_PAPC_SU_OUT_CLIP_POLYMODE_BACK             =$00000047;
 PERF_PAPC_SU_OUT_CLIP_POLYMODE_FRONT            =$00000048;
 PERF_PAPC_SU_OUTPUT_PRIM_DUAL                   =$00000049;
 PERF_PAPC_SU_OUTPUT_CLIP_PRIM_DUAL              =$0000004a;
 PERF_PAPC_SU_OUTPUT_POLYMODE_DUAL               =$0000004b;
 PERF_PAPC_SU_OUTPUT_CLIP_POLYMODE_DUAL          =$0000004c;
 PERF_PAPC_PASX_REQ_IDLE                         =$0000004d;
 PERF_PAPC_PASX_REQ_BUSY                         =$0000004e;
 PERF_PAPC_PASX_REQ_STALLED                      =$0000004f;
 PERF_PAPC_PASX_REC_IDLE                         =$00000050;
 PERF_PAPC_PASX_REC_BUSY                         =$00000051;
 PERF_PAPC_PASX_REC_STARVED_SX                   =$00000052;
 PERF_PAPC_PASX_REC_STALLED                      =$00000053;
 PERF_PAPC_PASX_REC_STALLED_POS_MEM              =$00000054;
 PERF_PAPC_PASX_REC_STALLED_CCGSM_IN             =$00000055;
 PERF_PAPC_CCGSM_IDLE                            =$00000056;
 PERF_PAPC_CCGSM_BUSY                            =$00000057;
 PERF_PAPC_CCGSM_STALLED                         =$00000058;
 PERF_PAPC_CLPRIM_IDLE                           =$00000059;
 PERF_PAPC_CLPRIM_BUSY                           =$0000005a;
 PERF_PAPC_CLPRIM_STALLED                        =$0000005b;
 PERF_PAPC_CLPRIM_STARVED_CCGSM                  =$0000005c;
 PERF_PAPC_CLIPSM_IDLE                           =$0000005d;
 PERF_PAPC_CLIPSM_BUSY                           =$0000005e;
 PERF_PAPC_CLIPSM_WAIT_CLIP_VERT_ENGH            =$0000005f;
 PERF_PAPC_CLIPSM_WAIT_HIGH_PRI_SEQ              =$00000060;
 PERF_PAPC_CLIPSM_WAIT_CLIPGA                    =$00000061;
 PERF_PAPC_CLIPSM_WAIT_AVAIL_VTE_CLIP            =$00000062;
 PERF_PAPC_CLIPSM_WAIT_CLIP_OUTSM                =$00000063;
 PERF_PAPC_CLIPGA_IDLE                           =$00000064;
 PERF_PAPC_CLIPGA_BUSY                           =$00000065;
 PERF_PAPC_CLIPGA_STARVED_VTE_CLIP               =$00000066;
 PERF_PAPC_CLIPGA_STALLED                        =$00000067;
 PERF_PAPC_CLIP_IDLE                             =$00000068;
 PERF_PAPC_CLIP_BUSY                             =$00000069;
 PERF_PAPC_SU_IDLE                               =$0000006a;
 PERF_PAPC_SU_BUSY                               =$0000006b;
 PERF_PAPC_SU_STARVED_CLIP                       =$0000006c;
 PERF_PAPC_SU_STALLED_SC                         =$0000006d;
 PERF_PAPC_CL_DYN_SCLK_VLD                       =$0000006e;
 PERF_PAPC_SU_DYN_SCLK_VLD                       =$0000006f;
 PERF_PAPC_PA_REG_SCLK_VLD                       =$00000070;
 PERF_PAPC_SU_MULTI_GPU_PRIM_FILTER_CULL         =$00000071;
 PERF_PAPC_PASX_SE0_REQ                          =$00000072;
 PERF_PAPC_PASX_SE1_REQ                          =$00000073;
 PERF_PAPC_PASX_SE0_FIRST_VECTOR                 =$00000074;
 PERF_PAPC_PASX_SE0_SECOND_VECTOR                =$00000075;
 PERF_PAPC_PASX_SE1_FIRST_VECTOR                 =$00000076;
 PERF_PAPC_PASX_SE1_SECOND_VECTOR                =$00000077;
 PERF_PAPC_SU_SE0_PRIM_FILTER_CULL               =$00000078;
 PERF_PAPC_SU_SE1_PRIM_FILTER_CULL               =$00000079;
 PERF_PAPC_SU_SE01_PRIM_FILTER_CULL              =$0000007a;
 PERF_PAPC_SU_SE0_OUTPUT_PRIM                    =$0000007b;
 PERF_PAPC_SU_SE1_OUTPUT_PRIM                    =$0000007c;
 PERF_PAPC_SU_SE01_OUTPUT_PRIM                   =$0000007d;
 PERF_PAPC_SU_SE0_OUTPUT_NULL_PRIM               =$0000007e;
 PERF_PAPC_SU_SE1_OUTPUT_NULL_PRIM               =$0000007f;
 PERF_PAPC_SU_SE01_OUTPUT_NULL_PRIM              =$00000080;
 PERF_PAPC_SU_SE0_OUTPUT_FIRST_PRIM_SLOT         =$00000081;
 PERF_PAPC_SU_SE1_OUTPUT_FIRST_PRIM_SLOT         =$00000082;
 PERF_PAPC_SU_SE0_STALLED_SC                     =$00000083;
 PERF_PAPC_SU_SE1_STALLED_SC                     =$00000084;
 PERF_PAPC_SU_SE01_STALLED_SC                    =$00000085;
 PERF_PAPC_CLSM_CLIPPING_PRIM                    =$00000086;
 PERF_PAPC_SU_CULLED_PRIM                        =$00000087;
 PERF_PAPC_SU_OUTPUT_EOPG                        =$00000088;
 PERF_PAPC_SU_SE2_PRIM_FILTER_CULL               =$00000089;
 PERF_PAPC_SU_SE3_PRIM_FILTER_CULL               =$0000008a;
 PERF_PAPC_SU_SE2_OUTPUT_PRIM                    =$0000008b;
 PERF_PAPC_SU_SE3_OUTPUT_PRIM                    =$0000008c;
 PERF_PAPC_SU_SE2_OUTPUT_NULL_PRIM               =$0000008d;
 PERF_PAPC_SU_SE3_OUTPUT_NULL_PRIM               =$0000008e;
 PERF_PAPC_SU_SE0_OUTPUT_END_OF_PACKET           =$0000008f;
 PERF_PAPC_SU_SE1_OUTPUT_END_OF_PACKET           =$00000090;
 PERF_PAPC_SU_SE2_OUTPUT_END_OF_PACKET           =$00000091;
 PERF_PAPC_SU_SE3_OUTPUT_END_OF_PACKET           =$00000092;
 PERF_PAPC_SU_SE0_OUTPUT_EOPG                    =$00000093;
 PERF_PAPC_SU_SE1_OUTPUT_EOPG                    =$00000094;
 PERF_PAPC_SU_SE2_OUTPUT_EOPG                    =$00000095;
 PERF_PAPC_SU_SE3_OUTPUT_EOPG                    =$00000096;
 PERF_PAPC_SU_SE2_STALLED_SC                     =$00000097;
 PERF_PAPC_SU_SE3_STALLED_SC                     =$00000098;
 // SampleSplit
 ADDR_SURF_SAMPLE_SPLIT_1                        =$00000000;
 ADDR_SURF_SAMPLE_SPLIT_2                        =$00000001;
 ADDR_SURF_SAMPLE_SPLIT_4                        =$00000002;
 ADDR_SURF_SAMPLE_SPLIT_8                        =$00000003;
 // SampleSplitBytes
 CONFIG_1KB_SPLIT                                =$00000000;
 CONFIG_2KB_SPLIT                                =$00000001;
 CONFIG_4KB_SPLIT                                =$00000002;
 CONFIG_8KB_SPLIT                                =$00000003;
 // ScMap
 RASTER_CONFIG_SC_MAP_0                          =$00000000;
 RASTER_CONFIG_SC_MAP_1                          =$00000001;
 RASTER_CONFIG_SC_MAP_2                          =$00000002;
 RASTER_CONFIG_SC_MAP_3                          =$00000003;
 // ScXsel
 RASTER_CONFIG_SC_XSEL_8_WIDE_TILE               =$00000000;
 RASTER_CONFIG_SC_XSEL_16_WIDE_TILE              =$00000001;
 RASTER_CONFIG_SC_XSEL_32_WIDE_TILE              =$00000002;
 RASTER_CONFIG_SC_XSEL_64_WIDE_TILE              =$00000003;
 // ScYsel
 RASTER_CONFIG_SC_YSEL_8_WIDE_TILE               =$00000000;
 RASTER_CONFIG_SC_YSEL_16_WIDE_TILE              =$00000001;
 RASTER_CONFIG_SC_YSEL_32_WIDE_TILE              =$00000002;
 RASTER_CONFIG_SC_YSEL_64_WIDE_TILE              =$00000003;
 // SeMap
 RASTER_CONFIG_SE_MAP_0                          =$00000000;
 RASTER_CONFIG_SE_MAP_1                          =$00000001;
 RASTER_CONFIG_SE_MAP_2                          =$00000002;
 RASTER_CONFIG_SE_MAP_3                          =$00000003;
 // SePairMap
 RASTER_CONFIG_SE_PAIR_MAP_0                     =$00000000;
 RASTER_CONFIG_SE_PAIR_MAP_1                     =$00000001;
 RASTER_CONFIG_SE_PAIR_MAP_2                     =$00000002;
 RASTER_CONFIG_SE_PAIR_MAP_3                     =$00000003;
 // SePairXsel
 RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE          =$00000000;
 RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE         =$00000001;
 RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE         =$00000002;
 RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE         =$00000003;
 // SePairYsel
 RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE          =$00000000;
 RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE         =$00000001;
 RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE         =$00000002;
 RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE         =$00000003;
 // SeXsel
 RASTER_CONFIG_SE_XSEL_8_WIDE_TILE               =$00000000;
 RASTER_CONFIG_SE_XSEL_16_WIDE_TILE              =$00000001;
 RASTER_CONFIG_SE_XSEL_32_WIDE_TILE              =$00000002;
 RASTER_CONFIG_SE_XSEL_64_WIDE_TILE              =$00000003;
 // SeYsel
 RASTER_CONFIG_SE_YSEL_8_WIDE_TILE               =$00000000;
 RASTER_CONFIG_SE_YSEL_16_WIDE_TILE              =$00000001;
 RASTER_CONFIG_SE_YSEL_32_WIDE_TILE              =$00000002;
 RASTER_CONFIG_SE_YSEL_64_WIDE_TILE              =$00000003;
 // ShaderEngineTileSize
 ADDR_CONFIG_SE_TILE_16                          =$00000000;
 ADDR_CONFIG_SE_TILE_32                          =$00000001;
 // SourceFormat
 EXPORT_4C_32BPC                                 =$00000000;
 EXPORT_4C_16BPC                                 =$00000001;
 EXPORT_2C_32BPC_GR                              =$00000002;
 EXPORT_2C_32BPC_AR                              =$00000003;
 // StencilFormat
 STENCIL_INVALID                                 =$00000000;
 STENCIL_8                                       =$00000001;
 // StencilOp
 STENCIL_KEEP                                    =$00000000;
 STENCIL_ZERO                                    =$00000001;
 STENCIL_ONES                                    =$00000002;
 STENCIL_REPLACE_TEST                            =$00000003;
 STENCIL_REPLACE_OP                              =$00000004;
 STENCIL_ADD_CLAMP                               =$00000005;
 STENCIL_SUB_CLAMP                               =$00000006;
 STENCIL_INVERT                                  =$00000007;
 STENCIL_ADD_WRAP                                =$00000008;
 STENCIL_SUB_WRAP                                =$00000009;
 STENCIL_AND                                     =$0000000a;
 STENCIL_OR                                      =$0000000b;
 STENCIL_XOR                                     =$0000000c;
 STENCIL_NAND                                    =$0000000d;
 STENCIL_NOR                                     =$0000000e;
 STENCIL_XNOR                                    =$0000000f;
 // SurfaceArray
 ARRAY_1D                                        =$00000000;
 ARRAY_2D                                        =$00000001;
 ARRAY_3D                                        =$00000002;
 ARRAY_3D_SLICE                                  =$00000003;
 // SurfaceEndian
 ENDIAN_NONE                                     =$00000000;
 ENDIAN_8IN16                                    =$00000001;
 ENDIAN_8IN32                                    =$00000002;
 ENDIAN_8IN64                                    =$00000003;
 // SurfaceFormat
 FMT_INVALID                                     =$00000000;
 FMT_8                                           =$00000001;
 FMT_16                                          =$00000002;
 FMT_8_8                                         =$00000003;
 FMT_32                                          =$00000004;
 FMT_16_16                                       =$00000005;
 FMT_10_11_11                                    =$00000006;
 FMT_11_11_10                                    =$00000007;
 FMT_10_10_10_2                                  =$00000008;
 FMT_2_10_10_10                                  =$00000009;
 FMT_8_8_8_8                                     =$0000000a;
 FMT_32_32                                       =$0000000b;
 FMT_16_16_16_16                                 =$0000000c;
 FMT_32_32_32                                    =$0000000d;
 FMT_32_32_32_32                                 =$0000000e;
 FMT_RESERVED_4                                  =$0000000f;
 FMT_5_6_5                                       =$00000010;
 FMT_1_5_5_5                                     =$00000011;
 FMT_5_5_5_1                                     =$00000012;
 FMT_4_4_4_4                                     =$00000013;
 FMT_8_24                                        =$00000014;
 FMT_24_8                                        =$00000015;
 FMT_X24_8_32_FLOAT                              =$00000016;
 FMT_RESERVED_33                                 =$00000017;
 FMT_11_11_10_FLOAT                              =$00000018;
 FMT_16_FLOAT                                    =$00000019;
 FMT_32_FLOAT                                    =$0000001a;
 FMT_16_16_FLOAT                                 =$0000001b;
 FMT_8_24_FLOAT                                  =$0000001c;
 FMT_24_8_FLOAT                                  =$0000001d;
 FMT_32_32_FLOAT                                 =$0000001e;
 FMT_10_11_11_FLOAT                              =$0000001f;
 FMT_16_16_16_16_FLOAT                           =$00000020;
 FMT_3_3_2                                       =$00000021;
 FMT_6_5_5                                       =$00000022;
 FMT_32_32_32_32_FLOAT                           =$00000023;
 FMT_RESERVED_36                                 =$00000024;
 FMT_1                                           =$00000025;
 FMT_1_REVERSED                                  =$00000026;
 FMT_GB_GR                                       =$00000027;
 FMT_BG_RG                                       =$00000028;
 FMT_32_AS_8                                     =$00000029;
 FMT_32_AS_8_8                                   =$0000002a;
 FMT_5_9_9_9_SHAREDEXP                           =$0000002b;
 FMT_8_8_8                                       =$0000002c;
 FMT_16_16_16                                    =$0000002d;
 FMT_16_16_16_FLOAT                              =$0000002e;
 FMT_4_4                                         =$0000002f;
 FMT_32_32_32_FLOAT                              =$00000030;
 FMT_BC1                                         =$00000031;
 FMT_BC2                                         =$00000032;
 FMT_BC3                                         =$00000033;
 FMT_BC4                                         =$00000034;
 FMT_BC5                                         =$00000035;
 FMT_BC6                                         =$00000036;
 FMT_BC7                                         =$00000037;
 FMT_32_AS_32_32_32_32                           =$00000038;
 FMT_APC3                                        =$00000039;
 FMT_APC4                                        =$0000003a;
 FMT_APC5                                        =$0000003b;
 FMT_APC6                                        =$0000003c;
 FMT_APC7                                        =$0000003d;
 FMT_CTX1                                        =$0000003e;
 FMT_RESERVED_63                                 =$0000003f;
 // SurfaceNumber
 NUMBER_UNORM                                    =$00000000;
 NUMBER_SNORM                                    =$00000001;
 NUMBER_USCALED                                  =$00000002;
 NUMBER_SSCALED                                  =$00000003;
 NUMBER_UINT                                     =$00000004;
 NUMBER_SINT                                     =$00000005;
 NUMBER_SRGB                                     =$00000006;
 NUMBER_FLOAT                                    =$00000007;
 // SurfaceSwap
 SWAP_STD                                        =$00000000;
 SWAP_ALT                                        =$00000001;
 SWAP_STD_REV                                    =$00000002;
 SWAP_ALT_REV                                    =$00000003;
 // SurfaceTiling
 ARRAY_LINEAR                                    =$00000000;
 ARRAY_TILED                                     =$00000001;
 // TA_PERFCOUNT_SEL
 TA_PERF_SEL_NULL                                =$00000000;
 TA_PERF_SEL_sh_fifo_busy                        =$00000001;
 TA_PERF_SEL_sh_fifo_cmd_busy                    =$00000002;
 TA_PERF_SEL_sh_fifo_addr_busy                   =$00000003;
 TA_PERF_SEL_sh_fifo_data_busy                   =$00000004;
 TA_PERF_SEL_sh_fifo_data_sfifo_busy             =$00000005;
 TA_PERF_SEL_sh_fifo_data_tfifo_busy             =$00000006;
 TA_PERF_SEL_gradient_busy                       =$00000007;
 TA_PERF_SEL_gradient_fifo_busy                  =$00000008;
 TA_PERF_SEL_lod_busy                            =$00000009;
 TA_PERF_SEL_lod_fifo_busy                       =$0000000a;
 TA_PERF_SEL_addresser_busy                      =$0000000b;
 TA_PERF_SEL_addresser_fifo_busy                 =$0000000c;
 TA_PERF_SEL_aligner_busy                        =$0000000d;
 TA_PERF_SEL_write_path_busy                     =$0000000e;
 TA_PERF_SEL_ta_busy                             =$0000000f;
 TA_PERF_SEL_sq_ta_cmd_cycles                    =$00000010;
 TA_PERF_SEL_sp_ta_addr_cycles                   =$00000011;
 TA_PERF_SEL_sp_ta_data_cycles                   =$00000012;
 TA_PERF_SEL_ta_fa_data_state_cycles             =$00000013;
 TA_PERF_SEL_sh_fifo_addr_waiting_on_cmd_cycles  =$00000014;
 TA_PERF_SEL_sh_fifo_cmd_waiting_on_addr_cycles  =$00000015;
 TA_PERF_SEL_RESERVED_28                         =$0000001c;
 TA_PERF_SEL_RESERVED_29                         =$0000001d;
 TA_PERF_SEL_sh_fifo_addr_cycles                 =$0000001e;
 TA_PERF_SEL_sh_fifo_data_cycles                 =$0000001f;
 TA_PERF_SEL_total_wavefronts                    =$00000020;
 TA_PERF_SEL_gradient_cycles                     =$00000021;
 TA_PERF_SEL_walker_cycles                       =$00000022;
 TA_PERF_SEL_aligner_cycles                      =$00000023;
 TA_PERF_SEL_image_wavefronts                    =$00000024;
 TA_PERF_SEL_image_read_wavefronts               =$00000025;
 TA_PERF_SEL_image_write_wavefronts              =$00000026;
 TA_PERF_SEL_image_atomic_wavefronts             =$00000027;
 TA_PERF_SEL_image_total_cycles                  =$00000028;
 TA_PERF_SEL_RESERVED_41                         =$00000029;
 TA_PERF_SEL_RESERVED_42                         =$0000002a;
 TA_PERF_SEL_RESERVED_43                         =$0000002b;
 TA_PERF_SEL_buffer_wavefronts                   =$0000002c;
 TA_PERF_SEL_buffer_read_wavefronts              =$0000002d;
 TA_PERF_SEL_buffer_write_wavefronts             =$0000002e;
 TA_PERF_SEL_buffer_atomic_wavefronts            =$0000002f;
 TA_PERF_SEL_buffer_coalescable_wavefronts       =$00000030;
 TA_PERF_SEL_buffer_total_cycles                 =$00000031;
 TA_PERF_SEL_buffer_coalesced_read_cycles        =$00000034;
 TA_PERF_SEL_buffer_coalesced_write_cycles       =$00000035;
 TA_PERF_SEL_addr_stalled_by_tc_cycles           =$00000036;
 TA_PERF_SEL_addr_stalled_by_td_cycles           =$00000037;
 TA_PERF_SEL_data_stalled_by_tc_cycles           =$00000038;
 TA_PERF_SEL_addresser_stalled_cycles            =$0000003a;
 TA_PERF_SEL_aniso_stalled_cycles                =$0000003c;
 TA_PERF_SEL_deriv_stalled_by_aniso_only_cycles  =$0000003d;
 TA_PERF_SEL_deriv_stalled_cycles                =$0000003e;
 TA_PERF_SEL_aniso_gt1_cycle_quads               =$0000003f;
 TA_PERF_SEL_color_1_cycle_pixels                =$00000040;
 TA_PERF_SEL_color_2_cycle_pixels                =$00000041;
 TA_PERF_SEL_color_3_cycle_pixels                =$00000042;
 TA_PERF_SEL_color_4_cycle_pixels                =$00000043;
 TA_PERF_SEL_mip_1_cycle_pixels                  =$00000044;
 TA_PERF_SEL_mip_2_cycle_pixels                  =$00000045;
 TA_PERF_SEL_vol_1_cycle_pixels                  =$00000046;
 TA_PERF_SEL_vol_2_cycle_pixels                  =$00000047;
 TA_PERF_SEL_bilin_point_1_cycle_pixels          =$00000048;
 TA_PERF_SEL_mipmap_lod_0_samples                =$00000049;
 TA_PERF_SEL_mipmap_lod_1_samples                =$0000004a;
 TA_PERF_SEL_mipmap_lod_2_samples                =$0000004b;
 TA_PERF_SEL_mipmap_lod_3_samples                =$0000004c;
 TA_PERF_SEL_mipmap_lod_4_samples                =$0000004d;
 TA_PERF_SEL_mipmap_lod_5_samples                =$0000004e;
 TA_PERF_SEL_mipmap_lod_6_samples                =$0000004f;
 TA_PERF_SEL_mipmap_lod_7_samples                =$00000050;
 TA_PERF_SEL_mipmap_lod_8_samples                =$00000051;
 TA_PERF_SEL_mipmap_lod_9_samples                =$00000052;
 TA_PERF_SEL_mipmap_lod_10_samples               =$00000053;
 TA_PERF_SEL_mipmap_lod_11_samples               =$00000054;
 TA_PERF_SEL_mipmap_lod_12_samples               =$00000055;
 TA_PERF_SEL_mipmap_lod_13_samples               =$00000056;
 TA_PERF_SEL_mipmap_lod_14_samples               =$00000057;
 TA_PERF_SEL_mipmap_invalid_samples              =$00000058;
 TA_PERF_SEL_aniso_1_cycle_quads                 =$00000059;
 TA_PERF_SEL_aniso_2_cycle_quads                 =$0000005a;
 TA_PERF_SEL_aniso_4_cycle_quads                 =$0000005b;
 TA_PERF_SEL_aniso_6_cycle_quads                 =$0000005c;
 TA_PERF_SEL_aniso_8_cycle_quads                 =$0000005d;
 TA_PERF_SEL_aniso_10_cycle_quads                =$0000005e;
 TA_PERF_SEL_aniso_12_cycle_quads                =$0000005f;
 TA_PERF_SEL_aniso_14_cycle_quads                =$00000060;
 TA_PERF_SEL_aniso_16_cycle_quads                =$00000061;
 TA_PERF_SEL_write_path_input_cycles             =$00000062;
 TA_PERF_SEL_write_path_output_cycles            =$00000063;
 TA_PERF_SEL_flat_wavefronts                     =$00000064;
 TA_PERF_SEL_flat_read_wavefronts                =$00000065;
 TA_PERF_SEL_flat_write_wavefronts               =$00000066;
 TA_PERF_SEL_flat_atomic_wavefronts              =$00000067;
 TA_PERF_SEL_flat_coalesceable_wavefronts        =$00000068;
 TA_PERF_SEL_reg_sclk_vld                        =$00000069;
 TA_PERF_SEL_local_cg_dyn_sclk_grp0_en           =$0000006a;
 TA_PERF_SEL_local_cg_dyn_sclk_grp1_en           =$0000006b;
 TA_PERF_SEL_local_cg_dyn_sclk_grp1_mems_en      =$0000006c;
 TA_PERF_SEL_local_cg_dyn_sclk_grp4_en           =$0000006d;
 TA_PERF_SEL_local_cg_dyn_sclk_grp5_en           =$0000006e;
 TA_PERF_SEL_xnack_on_phase0                     =$0000006f;
 TA_PERF_SEL_xnack_on_phase1                     =$00000070;
 TA_PERF_SEL_xnack_on_phase2                     =$00000071;
 TA_PERF_SEL_xnack_on_phase3                     =$00000072;
 TA_PERF_SEL_first_xnack_on_phase0               =$00000073;
 TA_PERF_SEL_first_xnack_on_phase1               =$00000074;
 TA_PERF_SEL_first_xnack_on_phase2               =$00000075;
 TA_PERF_SEL_first_xnack_on_phase3               =$00000076;
 // TA_TC_ADDR_MODES
 TA_TC_ADDR_MODE_DEFAULT                         =$00000000;
 TA_TC_ADDR_MODE_COMP0                           =$00000001;
 TA_TC_ADDR_MODE_COMP1                           =$00000002;
 TA_TC_ADDR_MODE_COMP2                           =$00000003;
 TA_TC_ADDR_MODE_COMP3                           =$00000004;
 TA_TC_ADDR_MODE_UNALIGNED                       =$00000005;
 TA_TC_ADDR_MODE_BORDER_COLOR                    =$00000006;
 // TCA_PERF_SEL
 TCA_PERF_SEL_NONE                               =$00000000;
 TCA_PERF_SEL_CYCLE                              =$00000001;
 TCA_PERF_SEL_BUSY                               =$00000002;
 TCA_PERF_SEL_FORCED_HOLE_TCC0                   =$00000003;
 TCA_PERF_SEL_FORCED_HOLE_TCC1                   =$00000004;
 TCA_PERF_SEL_FORCED_HOLE_TCC2                   =$00000005;
 TCA_PERF_SEL_FORCED_HOLE_TCC3                   =$00000006;
 TCA_PERF_SEL_FORCED_HOLE_TCC4                   =$00000007;
 TCA_PERF_SEL_FORCED_HOLE_TCC5                   =$00000008;
 TCA_PERF_SEL_FORCED_HOLE_TCC6                   =$00000009;
 TCA_PERF_SEL_FORCED_HOLE_TCC7                   =$0000000a;
 TCA_PERF_SEL_REQ_TCC0                           =$0000000b;
 TCA_PERF_SEL_REQ_TCC1                           =$0000000c;
 TCA_PERF_SEL_REQ_TCC2                           =$0000000d;
 TCA_PERF_SEL_REQ_TCC3                           =$0000000e;
 TCA_PERF_SEL_REQ_TCC4                           =$0000000f;
 TCA_PERF_SEL_REQ_TCC5                           =$00000010;
 TCA_PERF_SEL_REQ_TCC6                           =$00000011;
 TCA_PERF_SEL_REQ_TCC7                           =$00000012;
 TCA_PERF_SEL_CROSSBAR_DOUBLE_ARB_TCC0           =$00000013;
 TCA_PERF_SEL_CROSSBAR_DOUBLE_ARB_TCC1           =$00000014;
 TCA_PERF_SEL_CROSSBAR_DOUBLE_ARB_TCC2           =$00000015;
 TCA_PERF_SEL_CROSSBAR_DOUBLE_ARB_TCC3           =$00000016;
 TCA_PERF_SEL_CROSSBAR_DOUBLE_ARB_TCC4           =$00000017;
 TCA_PERF_SEL_CROSSBAR_DOUBLE_ARB_TCC5           =$00000018;
 TCA_PERF_SEL_CROSSBAR_DOUBLE_ARB_TCC6           =$00000019;
 TCA_PERF_SEL_CROSSBAR_DOUBLE_ARB_TCC7           =$0000001a;
 TCA_PERF_SEL_CROSSBAR_STALL_TCC0                =$0000001b;
 TCA_PERF_SEL_CROSSBAR_STALL_TCC1                =$0000001c;
 TCA_PERF_SEL_CROSSBAR_STALL_TCC2                =$0000001d;
 TCA_PERF_SEL_CROSSBAR_STALL_TCC3                =$0000001e;
 TCA_PERF_SEL_CROSSBAR_STALL_TCC4                =$0000001f;
 TCA_PERF_SEL_CROSSBAR_STALL_TCC5                =$00000020;
 TCA_PERF_SEL_CROSSBAR_STALL_TCC6                =$00000021;
 TCA_PERF_SEL_CROSSBAR_STALL_TCC7                =$00000022;
 // TCC_CACHE_POLICIES
 TCC_CACHE_POLICY_LRU                            =$00000000;
 TCC_CACHE_POLICY_STREAM                         =$00000001;
 // TCC_PERF_SEL
 TCC_PERF_SEL_NONE                               =$00000000;
 TCC_PERF_SEL_CYCLE                              =$00000001;
 TCC_PERF_SEL_BUSY                               =$00000002;
 TCC_PERF_SEL_REQ                                =$00000003;
 TCC_PERF_SEL_STREAMING_REQ                      =$00000004;
 TCC_PERF_SEL_EXE_REQ                            =$00000005;
 TCC_PERF_SEL_COMPRESSED_REQ                     =$00000006;
 TCC_PERF_SEL_COMPRESSED_0_REQ                   =$00000007;
 TCC_PERF_SEL_METADATA_REQ                       =$00000008;
 TCC_PERF_SEL_NC_VIRTUAL_REQ                     =$00000009;
 TCC_PERF_SEL_NC_PHYSICAL_REQ                    =$0000000a;
 TCC_PERF_SEL_UC_VIRTUAL_REQ                     =$0000000b;
 TCC_PERF_SEL_UC_PHYSICAL_REQ                    =$0000000c;
 TCC_PERF_SEL_CC_PHYSICAL_REQ                    =$0000000d;
 TCC_PERF_SEL_PROBE                              =$0000000e;
 TCC_PERF_SEL_READ                               =$0000000f;
 TCC_PERF_SEL_WRITE                              =$00000010;
 TCC_PERF_SEL_ATOMIC                             =$00000011;
 TCC_PERF_SEL_HIT                                =$00000012;
 TCC_PERF_SEL_MISS                               =$00000013;
 TCC_PERF_SEL_DEWRITE_ALLOCATE_HIT               =$00000014;
 TCC_PERF_SEL_FULLY_WRITTEN_HIT                  =$00000015;
 TCC_PERF_SEL_WRITEBACK                          =$00000016;
 TCC_PERF_SEL_LATENCY_FIFO_FULL                  =$00000017;
 TCC_PERF_SEL_SRC_FIFO_FULL                      =$00000018;
 TCC_PERF_SEL_HOLE_FIFO_FULL                     =$00000019;
 TCC_PERF_SEL_MC_WRREQ                           =$0000001a;
 TCC_PERF_SEL_MC_WRREQ_UNCACHED                  =$0000001b;
 TCC_PERF_SEL_MC_WRREQ_STALL                     =$0000001c;
 TCC_PERF_SEL_MC_WRREQ_CREDIT_STALL              =$0000001d;
 TCC_PERF_SEL_MC_WRREQ_MC_HALT_STALL             =$0000001e;
 TCC_PERF_SEL_TOO_MANY_MC_WRREQS_STALL           =$0000001f;
 TCC_PERF_SEL_MC_WRREQ_LEVEL                     =$00000020;
 TCC_PERF_SEL_MC_ATOMIC                          =$00000021;
 TCC_PERF_SEL_MC_ATOMIC_LEVEL                    =$00000022;
 TCC_PERF_SEL_MC_RDREQ                           =$00000023;
 TCC_PERF_SEL_MC_RDREQ_UNCACHED                  =$00000024;
 TCC_PERF_SEL_MC_RDREQ_MDC                       =$00000025;
 TCC_PERF_SEL_MC_RDREQ_COMPRESSED                =$00000026;
 TCC_PERF_SEL_MC_RDREQ_CREDIT_STALL              =$00000027;
 TCC_PERF_SEL_MC_RDREQ_MC_HALT_STALL             =$00000028;
 TCC_PERF_SEL_MC_RDREQ_LEVEL                     =$00000029;
 TCC_PERF_SEL_TAG_STALL                          =$0000002a;
 TCC_PERF_SEL_TAG_WRITEBACK_FIFO_FULL_STALL      =$0000002b;
 TCC_PERF_SEL_TAG_MISS_NOTHING_REPLACEABLE_STALL =$0000002c;
 TCC_PERF_SEL_TAG_PROBE_STALL                    =$0000002f;
 TCC_PERF_SEL_TAG_PROBE_FILTER_STALL             =$00000030;
 TCC_PERF_SEL_READ_RETURN_TIMEOUT                =$00000031;
 TCC_PERF_SEL_WRITEBACK_READ_TIMEOUT             =$00000032;
 TCC_PERF_SEL_READ_RETURN_FULL_BUBBLE            =$00000033;
 TCC_PERF_SEL_BUBBLE                             =$00000034;
 TCC_PERF_SEL_RETURN_ACK                         =$00000035;
 TCC_PERF_SEL_RETURN_DATA                        =$00000036;
 TCC_PERF_SEL_RETURN_HOLE                        =$00000037;
 TCC_PERF_SEL_RETURN_ACK_HOLE                    =$00000038;
 TCC_PERF_SEL_IB_REQ                             =$00000039;
 TCC_PERF_SEL_IB_STALL                           =$0000003a;
 TCC_PERF_SEL_IB_TAG_STALL                       =$0000003b;
 TCC_PERF_SEL_IB_MDC_STALL                       =$0000003c;
 TCC_PERF_SEL_TCA_LEVEL                          =$0000003d;
 TCC_PERF_SEL_HOLE_LEVEL                         =$0000003e;
 TCC_PERF_SEL_MC_RDRET_NACK                      =$0000003f;
 TCC_PERF_SEL_MC_WRRET_NACK                      =$00000040;
 TCC_PERF_SEL_NORMAL_WRITEBACK                   =$00000041;
 TCC_PERF_SEL_TC_OP_WBL2_NC_WRITEBACK            =$00000042;
 TCC_PERF_SEL_TC_OP_WBINVL2_WRITEBACK            =$00000043;
 TCC_PERF_SEL_TC_OP_WBINVL2_NC_WRITEBACK         =$00000044;
 TCC_PERF_SEL_TC_OP_WBINVL2_SD_WRITEBACK         =$00000045;
 TCC_PERF_SEL_ALL_TC_OP_WB_WRITEBACK             =$00000046;
 TCC_PERF_SEL_NORMAL_EVICT                       =$00000047;
 TCC_PERF_SEL_TC_OP_WBL2_NC_EVICT                =$00000048;
 TCC_PERF_SEL_TC_OP_INVL2_NC_EVICT               =$00000049;
 TCC_PERF_SEL_TC_OP_WBINVL2_EVICT                =$0000004a;
 TCC_PERF_SEL_TC_OP_WBINVL2_NC_EVICT             =$0000004b;
 TCC_PERF_SEL_TC_OP_WBINVL2_SD_EVICT             =$0000004c;
 TCC_PERF_SEL_ALL_TC_OP_INV_EVICT                =$0000004d;
 TCC_PERF_SEL_PROBE_EVICT                        =$0000004e;
 TCC_PERF_SEL_TC_OP_WBL2_NC_CYCLE                =$0000004f;
 TCC_PERF_SEL_TC_OP_INVL2_NC_CYCLE               =$00000050;
 TCC_PERF_SEL_TC_OP_WBINVL2_CYCLE                =$00000051;
 TCC_PERF_SEL_TC_OP_WBINVL2_NC_CYCLE             =$00000052;
 TCC_PERF_SEL_TC_OP_WBINVL2_SD_CYCLE             =$00000053;
 TCC_PERF_SEL_ALL_TC_OP_WB_OR_INV_CYCLE          =$00000054;
 TCC_PERF_SEL_TC_OP_WBL2_NC_START                =$00000055;
 TCC_PERF_SEL_TC_OP_INVL2_NC_START               =$00000056;
 TCC_PERF_SEL_TC_OP_WBINVL2_START                =$00000057;
 TCC_PERF_SEL_TC_OP_WBINVL2_NC_START             =$00000058;
 TCC_PERF_SEL_TC_OP_WBINVL2_SD_START             =$00000059;
 TCC_PERF_SEL_ALL_TC_OP_WB_OR_INV_START          =$0000005a;
 TCC_PERF_SEL_TC_OP_WBL2_NC_FINISH               =$0000005b;
 TCC_PERF_SEL_TC_OP_INVL2_NC_FINISH              =$0000005c;
 TCC_PERF_SEL_TC_OP_WBINVL2_FINISH               =$0000005d;
 TCC_PERF_SEL_TC_OP_WBINVL2_NC_FINISH            =$0000005e;
 TCC_PERF_SEL_TC_OP_WBINVL2_SD_FINISH            =$0000005f;
 TCC_PERF_SEL_ALL_TC_OP_WB_OR_INV_FINISH         =$00000060;
 TCC_PERF_SEL_MDC_REQ                            =$00000061;
 TCC_PERF_SEL_MDC_LEVEL                          =$00000062;
 TCC_PERF_SEL_MDC_TAG_HIT                        =$00000063;
 TCC_PERF_SEL_MDC_SECTOR_HIT                     =$00000064;
 TCC_PERF_SEL_MDC_SECTOR_MISS                    =$00000065;
 TCC_PERF_SEL_MDC_TAG_STALL                      =$00000066;
 TCC_PERF_SEL_PROBE_FILTER_DISABLE_TRANSITION    =$0000006a;
 TCC_PERF_SEL_PROBE_FILTER_DISABLED              =$0000006b;
 TCC_PERF_SEL_CLIENT0_REQ                        =$00000080;
 TCC_PERF_SEL_CLIENT1_REQ                        =$00000081;
 TCC_PERF_SEL_CLIENT2_REQ                        =$00000082;
 TCC_PERF_SEL_CLIENT3_REQ                        =$00000083;
 TCC_PERF_SEL_CLIENT4_REQ                        =$00000084;
 TCC_PERF_SEL_CLIENT5_REQ                        =$00000085;
 TCC_PERF_SEL_CLIENT6_REQ                        =$00000086;
 TCC_PERF_SEL_CLIENT7_REQ                        =$00000087;
 TCC_PERF_SEL_CLIENT8_REQ                        =$00000088;
 TCC_PERF_SEL_CLIENT9_REQ                        =$00000089;
 TCC_PERF_SEL_CLIENT10_REQ                       =$0000008a;
 TCC_PERF_SEL_CLIENT11_REQ                       =$0000008b;
 TCC_PERF_SEL_CLIENT12_REQ                       =$0000008c;
 TCC_PERF_SEL_CLIENT13_REQ                       =$0000008d;
 TCC_PERF_SEL_CLIENT14_REQ                       =$0000008e;
 TCC_PERF_SEL_CLIENT15_REQ                       =$0000008f;
 TCC_PERF_SEL_CLIENT16_REQ                       =$00000090;
 TCC_PERF_SEL_CLIENT17_REQ                       =$00000091;
 TCC_PERF_SEL_CLIENT18_REQ                       =$00000092;
 TCC_PERF_SEL_CLIENT19_REQ                       =$00000093;
 TCC_PERF_SEL_CLIENT20_REQ                       =$00000094;
 TCC_PERF_SEL_CLIENT21_REQ                       =$00000095;
 TCC_PERF_SEL_CLIENT22_REQ                       =$00000096;
 TCC_PERF_SEL_CLIENT23_REQ                       =$00000097;
 TCC_PERF_SEL_CLIENT24_REQ                       =$00000098;
 TCC_PERF_SEL_CLIENT25_REQ                       =$00000099;
 TCC_PERF_SEL_CLIENT26_REQ                       =$0000009a;
 TCC_PERF_SEL_CLIENT27_REQ                       =$0000009b;
 TCC_PERF_SEL_CLIENT28_REQ                       =$0000009c;
 TCC_PERF_SEL_CLIENT29_REQ                       =$0000009d;
 TCC_PERF_SEL_CLIENT30_REQ                       =$0000009e;
 TCC_PERF_SEL_CLIENT31_REQ                       =$0000009f;
 TCC_PERF_SEL_CLIENT32_REQ                       =$000000a0;
 TCC_PERF_SEL_CLIENT33_REQ                       =$000000a1;
 TCC_PERF_SEL_CLIENT34_REQ                       =$000000a2;
 TCC_PERF_SEL_CLIENT35_REQ                       =$000000a3;
 TCC_PERF_SEL_CLIENT36_REQ                       =$000000a4;
 TCC_PERF_SEL_CLIENT37_REQ                       =$000000a5;
 TCC_PERF_SEL_CLIENT38_REQ                       =$000000a6;
 TCC_PERF_SEL_CLIENT39_REQ                       =$000000a7;
 TCC_PERF_SEL_CLIENT40_REQ                       =$000000a8;
 TCC_PERF_SEL_CLIENT41_REQ                       =$000000a9;
 TCC_PERF_SEL_CLIENT42_REQ                       =$000000aa;
 TCC_PERF_SEL_CLIENT43_REQ                       =$000000ab;
 TCC_PERF_SEL_CLIENT44_REQ                       =$000000ac;
 TCC_PERF_SEL_CLIENT45_REQ                       =$000000ad;
 TCC_PERF_SEL_CLIENT46_REQ                       =$000000ae;
 TCC_PERF_SEL_CLIENT47_REQ                       =$000000af;
 TCC_PERF_SEL_CLIENT48_REQ                       =$000000b0;
 TCC_PERF_SEL_CLIENT49_REQ                       =$000000b1;
 TCC_PERF_SEL_CLIENT50_REQ                       =$000000b2;
 TCC_PERF_SEL_CLIENT51_REQ                       =$000000b3;
 TCC_PERF_SEL_CLIENT52_REQ                       =$000000b4;
 TCC_PERF_SEL_CLIENT53_REQ                       =$000000b5;
 TCC_PERF_SEL_CLIENT54_REQ                       =$000000b6;
 TCC_PERF_SEL_CLIENT55_REQ                       =$000000b7;
 TCC_PERF_SEL_CLIENT56_REQ                       =$000000b8;
 TCC_PERF_SEL_CLIENT57_REQ                       =$000000b9;
 TCC_PERF_SEL_CLIENT58_REQ                       =$000000ba;
 TCC_PERF_SEL_CLIENT59_REQ                       =$000000bb;
 TCC_PERF_SEL_CLIENT60_REQ                       =$000000bc;
 TCC_PERF_SEL_CLIENT61_REQ                       =$000000bd;
 TCC_PERF_SEL_CLIENT62_REQ                       =$000000be;
 TCC_PERF_SEL_CLIENT63_REQ                       =$000000bf;
 TCC_PERF_SEL_CLIENT64_REQ                       =$000000c0;
 TCC_PERF_SEL_CLIENT65_REQ                       =$000000c1;
 TCC_PERF_SEL_CLIENT66_REQ                       =$000000c2;
 TCC_PERF_SEL_CLIENT67_REQ                       =$000000c3;
 TCC_PERF_SEL_CLIENT68_REQ                       =$000000c4;
 TCC_PERF_SEL_CLIENT69_REQ                       =$000000c5;
 TCC_PERF_SEL_CLIENT70_REQ                       =$000000c6;
 TCC_PERF_SEL_CLIENT71_REQ                       =$000000c7;
 TCC_PERF_SEL_CLIENT72_REQ                       =$000000c8;
 TCC_PERF_SEL_CLIENT73_REQ                       =$000000c9;
 TCC_PERF_SEL_CLIENT74_REQ                       =$000000ca;
 TCC_PERF_SEL_CLIENT75_REQ                       =$000000cb;
 TCC_PERF_SEL_CLIENT76_REQ                       =$000000cc;
 TCC_PERF_SEL_CLIENT77_REQ                       =$000000cd;
 TCC_PERF_SEL_CLIENT78_REQ                       =$000000ce;
 TCC_PERF_SEL_CLIENT79_REQ                       =$000000cf;
 TCC_PERF_SEL_CLIENT80_REQ                       =$000000d0;
 TCC_PERF_SEL_CLIENT81_REQ                       =$000000d1;
 TCC_PERF_SEL_CLIENT82_REQ                       =$000000d2;
 TCC_PERF_SEL_CLIENT83_REQ                       =$000000d3;
 TCC_PERF_SEL_CLIENT84_REQ                       =$000000d4;
 TCC_PERF_SEL_CLIENT85_REQ                       =$000000d5;
 TCC_PERF_SEL_CLIENT86_REQ                       =$000000d6;
 TCC_PERF_SEL_CLIENT87_REQ                       =$000000d7;
 TCC_PERF_SEL_CLIENT88_REQ                       =$000000d8;
 TCC_PERF_SEL_CLIENT89_REQ                       =$000000d9;
 TCC_PERF_SEL_CLIENT90_REQ                       =$000000da;
 TCC_PERF_SEL_CLIENT91_REQ                       =$000000db;
 TCC_PERF_SEL_CLIENT92_REQ                       =$000000dc;
 TCC_PERF_SEL_CLIENT93_REQ                       =$000000dd;
 TCC_PERF_SEL_CLIENT94_REQ                       =$000000de;
 TCC_PERF_SEL_CLIENT95_REQ                       =$000000df;
 TCC_PERF_SEL_CLIENT96_REQ                       =$000000e0;
 TCC_PERF_SEL_CLIENT97_REQ                       =$000000e1;
 TCC_PERF_SEL_CLIENT98_REQ                       =$000000e2;
 TCC_PERF_SEL_CLIENT99_REQ                       =$000000e3;
 TCC_PERF_SEL_CLIENT100_REQ                      =$000000e4;
 TCC_PERF_SEL_CLIENT101_REQ                      =$000000e5;
 TCC_PERF_SEL_CLIENT102_REQ                      =$000000e6;
 TCC_PERF_SEL_CLIENT103_REQ                      =$000000e7;
 TCC_PERF_SEL_CLIENT104_REQ                      =$000000e8;
 TCC_PERF_SEL_CLIENT105_REQ                      =$000000e9;
 TCC_PERF_SEL_CLIENT106_REQ                      =$000000ea;
 TCC_PERF_SEL_CLIENT107_REQ                      =$000000eb;
 TCC_PERF_SEL_CLIENT108_REQ                      =$000000ec;
 TCC_PERF_SEL_CLIENT109_REQ                      =$000000ed;
 TCC_PERF_SEL_CLIENT110_REQ                      =$000000ee;
 TCC_PERF_SEL_CLIENT111_REQ                      =$000000ef;
 TCC_PERF_SEL_CLIENT112_REQ                      =$000000f0;
 TCC_PERF_SEL_CLIENT113_REQ                      =$000000f1;
 TCC_PERF_SEL_CLIENT114_REQ                      =$000000f2;
 TCC_PERF_SEL_CLIENT115_REQ                      =$000000f3;
 TCC_PERF_SEL_CLIENT116_REQ                      =$000000f4;
 TCC_PERF_SEL_CLIENT117_REQ                      =$000000f5;
 TCC_PERF_SEL_CLIENT118_REQ                      =$000000f6;
 TCC_PERF_SEL_CLIENT119_REQ                      =$000000f7;
 TCC_PERF_SEL_CLIENT120_REQ                      =$000000f8;
 TCC_PERF_SEL_CLIENT121_REQ                      =$000000f9;
 TCC_PERF_SEL_CLIENT122_REQ                      =$000000fa;
 TCC_PERF_SEL_CLIENT123_REQ                      =$000000fb;
 TCC_PERF_SEL_CLIENT124_REQ                      =$000000fc;
 TCC_PERF_SEL_CLIENT125_REQ                      =$000000fd;
 TCC_PERF_SEL_CLIENT126_REQ                      =$000000fe;
 TCC_PERF_SEL_CLIENT127_REQ                      =$000000ff;
 // TCP_CACHE_POLICIES
 TCP_CACHE_POLICY_MISS_LRU                       =$00000000;
 TCP_CACHE_POLICY_MISS_EVICT                     =$00000001;
 TCP_CACHE_POLICY_HIT_LRU                        =$00000002;
 TCP_CACHE_POLICY_HIT_EVICT                      =$00000003;
 // TCP_CACHE_STORE_POLICIES
 TCP_CACHE_STORE_POLICY_WT_LRU                   =$00000000;
 TCP_CACHE_STORE_POLICY_WT_EVICT                 =$00000001;
 // TCP_PERFCOUNT_SELECT
 TCP_PERF_SEL_TA_TCP_ADDR_STARVE_CYCLES          =$00000000;
 TCP_PERF_SEL_TA_TCP_DATA_STARVE_CYCLES          =$00000001;
 TCP_PERF_SEL_TCP_TA_ADDR_STALL_CYCLES           =$00000002;
 TCP_PERF_SEL_TCP_TA_DATA_STALL_CYCLES           =$00000003;
 TCP_PERF_SEL_TD_TCP_STALL_CYCLES                =$00000004;
 TCP_PERF_SEL_TCR_TCP_STALL_CYCLES               =$00000005;
 TCP_PERF_SEL_LOD_STALL_CYCLES                   =$00000006;
 TCP_PERF_SEL_READ_TAGCONFLICT_STALL_CYCLES      =$00000007;
 TCP_PERF_SEL_WRITE_TAGCONFLICT_STALL_CYCLES     =$00000008;
 TCP_PERF_SEL_ATOMIC_TAGCONFLICT_STALL_CYCLES    =$00000009;
 TCP_PERF_SEL_ALLOC_STALL_CYCLES                 =$0000000a;
 TCP_PERF_SEL_LFIFO_STALL_CYCLES                 =$0000000b;
 TCP_PERF_SEL_RFIFO_STALL_CYCLES                 =$0000000c;
 TCP_PERF_SEL_TCR_RDRET_STALL                    =$0000000d;
 TCP_PERF_SEL_WRITE_CONFLICT_STALL               =$0000000e;
 TCP_PERF_SEL_HOLE_READ_STALL                    =$0000000f;
 TCP_PERF_SEL_READCONFLICT_STALL_CYCLES          =$00000010;
 TCP_PERF_SEL_PENDING_STALL_CYCLES               =$00000011;
 TCP_PERF_SEL_READFIFO_STALL_CYCLES              =$00000012;
 TCP_PERF_SEL_TCP_LATENCY                        =$00000013;
 TCP_PERF_SEL_TCC_READ_REQ_LATENCY               =$00000014;
 TCP_PERF_SEL_TCC_WRITE_REQ_LATENCY              =$00000015;
 TCP_PERF_SEL_TCC_WRITE_REQ_HOLE_LATENCY         =$00000016;
 TCP_PERF_SEL_TCC_READ_REQ                       =$00000017;
 TCP_PERF_SEL_TCC_WRITE_REQ                      =$00000018;
 TCP_PERF_SEL_TCC_ATOMIC_WITH_RET_REQ            =$00000019;
 TCP_PERF_SEL_TCC_ATOMIC_WITHOUT_RET_REQ         =$0000001a;
 TCP_PERF_SEL_TOTAL_LOCAL_READ                   =$0000001b;
 TCP_PERF_SEL_TOTAL_GLOBAL_READ                  =$0000001c;
 TCP_PERF_SEL_TOTAL_LOCAL_WRITE                  =$0000001d;
 TCP_PERF_SEL_TOTAL_GLOBAL_WRITE                 =$0000001e;
 TCP_PERF_SEL_TOTAL_ATOMIC_WITH_RET              =$0000001f;
 TCP_PERF_SEL_TOTAL_ATOMIC_WITHOUT_RET           =$00000020;
 TCP_PERF_SEL_TOTAL_WBINVL1                      =$00000021;
 TCP_PERF_SEL_IMG_READ_FMT_1                     =$00000022;
 TCP_PERF_SEL_IMG_READ_FMT_8                     =$00000023;
 TCP_PERF_SEL_IMG_READ_FMT_16                    =$00000024;
 TCP_PERF_SEL_IMG_READ_FMT_32                    =$00000025;
 TCP_PERF_SEL_IMG_READ_FMT_32_AS_8               =$00000026;
 TCP_PERF_SEL_IMG_READ_FMT_32_AS_16              =$00000027;
 TCP_PERF_SEL_IMG_READ_FMT_32_AS_128             =$00000028;
 TCP_PERF_SEL_IMG_READ_FMT_64_2_CYCLE            =$00000029;
 TCP_PERF_SEL_IMG_READ_FMT_64_1_CYCLE            =$0000002a;
 TCP_PERF_SEL_IMG_READ_FMT_96                    =$0000002b;
 TCP_PERF_SEL_IMG_READ_FMT_128_4_CYCLE           =$0000002c;
 TCP_PERF_SEL_IMG_READ_FMT_128_1_CYCLE           =$0000002d;
 TCP_PERF_SEL_IMG_READ_FMT_BC1                   =$0000002e;
 TCP_PERF_SEL_IMG_READ_FMT_BC2                   =$0000002f;
 TCP_PERF_SEL_IMG_READ_FMT_BC3                   =$00000030;
 TCP_PERF_SEL_IMG_READ_FMT_BC4                   =$00000031;
 TCP_PERF_SEL_IMG_READ_FMT_BC5                   =$00000032;
 TCP_PERF_SEL_IMG_READ_FMT_BC6                   =$00000033;
 TCP_PERF_SEL_IMG_READ_FMT_BC7                   =$00000034;
 TCP_PERF_SEL_IMG_READ_FMT_I8                    =$00000035;
 TCP_PERF_SEL_IMG_READ_FMT_I16                   =$00000036;
 TCP_PERF_SEL_IMG_READ_FMT_I32                   =$00000037;
 TCP_PERF_SEL_IMG_READ_FMT_I32_AS_8              =$00000038;
 TCP_PERF_SEL_IMG_READ_FMT_I32_AS_16             =$00000039;
 TCP_PERF_SEL_IMG_READ_FMT_D8                    =$0000003a;
 TCP_PERF_SEL_IMG_READ_FMT_D16                   =$0000003b;
 TCP_PERF_SEL_IMG_READ_FMT_D32                   =$0000003c;
 TCP_PERF_SEL_IMG_WRITE_FMT_8                    =$0000003d;
 TCP_PERF_SEL_IMG_WRITE_FMT_16                   =$0000003e;
 TCP_PERF_SEL_IMG_WRITE_FMT_32                   =$0000003f;
 TCP_PERF_SEL_IMG_WRITE_FMT_64                   =$00000040;
 TCP_PERF_SEL_IMG_WRITE_FMT_128                  =$00000041;
 TCP_PERF_SEL_IMG_WRITE_FMT_D8                   =$00000042;
 TCP_PERF_SEL_IMG_WRITE_FMT_D16                  =$00000043;
 TCP_PERF_SEL_IMG_WRITE_FMT_D32                  =$00000044;
 TCP_PERF_SEL_IMG_ATOMIC_WITH_RET_FMT_32         =$00000045;
 TCP_PERF_SEL_IMG_ATOMIC_WITHOUT_RET_FMT_32      =$00000046;
 TCP_PERF_SEL_IMG_ATOMIC_WITH_RET_FMT_64         =$00000047;
 TCP_PERF_SEL_IMG_ATOMIC_WITHOUT_RET_FMT_64      =$00000048;
 TCP_PERF_SEL_BUF_READ_FMT_8                     =$00000049;
 TCP_PERF_SEL_BUF_READ_FMT_16                    =$0000004a;
 TCP_PERF_SEL_BUF_READ_FMT_32                    =$0000004b;
 TCP_PERF_SEL_BUF_WRITE_FMT_8                    =$0000004c;
 TCP_PERF_SEL_BUF_WRITE_FMT_16                   =$0000004d;
 TCP_PERF_SEL_BUF_WRITE_FMT_32                   =$0000004e;
 TCP_PERF_SEL_BUF_ATOMIC_WITH_RET_FMT_32         =$0000004f;
 TCP_PERF_SEL_BUF_ATOMIC_WITHOUT_RET_FMT_32      =$00000050;
 TCP_PERF_SEL_BUF_ATOMIC_WITH_RET_FMT_64         =$00000051;
 TCP_PERF_SEL_BUF_ATOMIC_WITHOUT_RET_FMT_64      =$00000052;
 TCP_PERF_SEL_ARR_LINEAR_GENERAL                 =$00000053;
 TCP_PERF_SEL_ARR_LINEAR_ALIGNED                 =$00000054;
 TCP_PERF_SEL_ARR_1D_THIN1                       =$00000055;
 TCP_PERF_SEL_ARR_1D_THICK                       =$00000056;
 TCP_PERF_SEL_ARR_2D_THIN1                       =$00000057;
 TCP_PERF_SEL_ARR_2D_THICK                       =$00000058;
 TCP_PERF_SEL_ARR_2D_XTHICK                      =$00000059;
 TCP_PERF_SEL_ARR_3D_THIN1                       =$0000005a;
 TCP_PERF_SEL_ARR_3D_THICK                       =$0000005b;
 TCP_PERF_SEL_ARR_3D_XTHICK                      =$0000005c;
 TCP_PERF_SEL_DIM_1D                             =$0000005d;
 TCP_PERF_SEL_DIM_2D                             =$0000005e;
 TCP_PERF_SEL_DIM_3D                             =$0000005f;
 TCP_PERF_SEL_DIM_1D_ARRAY                       =$00000060;
 TCP_PERF_SEL_DIM_2D_ARRAY                       =$00000061;
 TCP_PERF_SEL_DIM_2D_MSAA                        =$00000062;
 TCP_PERF_SEL_DIM_2D_ARRAY_MSAA                  =$00000063;
 TCP_PERF_SEL_DIM_CUBE_ARRAY                     =$00000064;
 TCP_PERF_SEL_CP_TCP_INVALIDATE                  =$00000065;
 TCP_PERF_SEL_TA_TCP_STATE_READ                  =$00000066;
 TCP_PERF_SEL_TAGRAM0_REQ                        =$00000067;
 TCP_PERF_SEL_TAGRAM1_REQ                        =$00000068;
 TCP_PERF_SEL_TAGRAM2_REQ                        =$00000069;
 TCP_PERF_SEL_TAGRAM3_REQ                        =$0000006a;
 TCP_PERF_SEL_GATE_EN1                           =$0000006b;
 TCP_PERF_SEL_GATE_EN2                           =$0000006c;
 TCP_PERF_SEL_CORE_REG_SCLK_VLD                  =$0000006d;
 TCP_PERF_SEL_TCC_REQ                            =$0000006e;
 TCP_PERF_SEL_TCC_NON_READ_REQ                   =$0000006f;
 TCP_PERF_SEL_TCC_BYPASS_READ_REQ                =$00000070;
 TCP_PERF_SEL_TCC_MISS_EVICT_READ_REQ            =$00000071;
 TCP_PERF_SEL_TCC_VOLATILE_READ_REQ              =$00000072;
 TCP_PERF_SEL_TCC_VOLATILE_BYPASS_READ_REQ       =$00000073;
 TCP_PERF_SEL_TCC_VOLATILE_MISS_EVICT_READ_REQ   =$00000074;
 TCP_PERF_SEL_TCC_BYPASS_WRITE_REQ               =$00000075;
 TCP_PERF_SEL_TCC_MISS_EVICT_WRITE_REQ           =$00000076;
 TCP_PERF_SEL_TCC_VOLATILE_BYPASS_WRITE_REQ      =$00000077;
 TCP_PERF_SEL_TCC_VOLATILE_WRITE_REQ             =$00000078;
 TCP_PERF_SEL_TCC_VOLATILE_MISS_EVICT_WRITE_REQ  =$00000079;
 TCP_PERF_SEL_TCC_BYPASS_ATOMIC_REQ              =$0000007a;
 TCP_PERF_SEL_TCC_ATOMIC_REQ                     =$0000007b;
 TCP_PERF_SEL_TCC_VOLATILE_ATOMIC_REQ            =$0000007c;
 TCP_PERF_SEL_TCC_DATA_BUS_BUSY                  =$0000007d;
 TCP_PERF_SEL_TOTAL_ACCESSES                     =$0000007e;
 TCP_PERF_SEL_TOTAL_READ                         =$0000007f;
 TCP_PERF_SEL_TOTAL_HIT_LRU_READ                 =$00000080;
 TCP_PERF_SEL_TOTAL_HIT_EVICT_READ               =$00000081;
 TCP_PERF_SEL_TOTAL_MISS_LRU_READ                =$00000082;
 TCP_PERF_SEL_TOTAL_MISS_EVICT_READ              =$00000083;
 TCP_PERF_SEL_TOTAL_NON_READ                     =$00000084;
 TCP_PERF_SEL_TOTAL_WRITE                        =$00000085;
 TCP_PERF_SEL_TOTAL_MISS_LRU_WRITE               =$00000086;
 TCP_PERF_SEL_TOTAL_MISS_EVICT_WRITE             =$00000087;
 TCP_PERF_SEL_TOTAL_WBINVL1_VOL                  =$00000088;
 TCP_PERF_SEL_TOTAL_WRITEBACK_INVALIDATES        =$00000089;
 TCP_PERF_SEL_DISPLAY_MICROTILING                =$0000008a;
 TCP_PERF_SEL_THIN_MICROTILING                   =$0000008b;
 TCP_PERF_SEL_DEPTH_MICROTILING                  =$0000008c;
 TCP_PERF_SEL_ARR_PRT_THIN1                      =$0000008d;
 TCP_PERF_SEL_ARR_PRT_2D_THIN1                   =$0000008e;
 TCP_PERF_SEL_ARR_PRT_3D_THIN1                   =$0000008f;
 TCP_PERF_SEL_ARR_PRT_THICK                      =$00000090;
 TCP_PERF_SEL_ARR_PRT_2D_THICK                   =$00000091;
 TCP_PERF_SEL_ARR_PRT_3D_THICK                   =$00000092;
 TCP_PERF_SEL_CP_TCP_INVALIDATE_VOL              =$00000093;
 TCP_PERF_SEL_SQ_TCP_INVALIDATE_VOL              =$00000094;
 TCP_PERF_SEL_UNALIGNED                          =$00000095;
 TCP_PERF_SEL_ROTATED_MICROTILING                =$00000096;
 TCP_PERF_SEL_THICK_MICROTILING                  =$00000097;
 TCP_PERF_SEL_ATC                                =$00000098;
 TCP_PERF_SEL_POWER_STALL                        =$00000099;
 TCP_PERF_SEL_RESERVED_154                       =$0000009a;
 TCP_PERF_SEL_TCC_LRU_REQ                        =$0000009b;
 TCP_PERF_SEL_TCC_STREAM_REQ                     =$0000009c;
 TCP_PERF_SEL_TCC_NC_READ_REQ                    =$0000009d;
 TCP_PERF_SEL_TCC_NC_WRITE_REQ                   =$0000009e;
 TCP_PERF_SEL_TCC_NC_ATOMIC_REQ                  =$0000009f;
 TCP_PERF_SEL_TCC_UC_READ_REQ                    =$000000a0;
 TCP_PERF_SEL_TCC_UC_WRITE_REQ                   =$000000a1;
 TCP_PERF_SEL_TCC_UC_ATOMIC_REQ                  =$000000a2;
 TCP_PERF_SEL_TCC_CC_READ_REQ                    =$000000a3;
 TCP_PERF_SEL_TCC_CC_WRITE_REQ                   =$000000a4;
 TCP_PERF_SEL_TCC_CC_ATOMIC_REQ                  =$000000a5;
 TCP_PERF_SEL_TCC_DCC_REQ                        =$000000a6;
 TCP_PERF_SEL_TCC_PHYSICAL_REQ                   =$000000a7;
 TCP_PERF_SEL_UNORDERED_MTYPE_STALL              =$000000a8;
 TCP_PERF_SEL_VOLATILE                           =$000000a9;
 TCP_PERF_SEL_TC_TA_XNACK_STALL                  =$000000aa;
 TCP_PERF_SEL_ATCL1_SERIALIZATION_STALL          =$000000ab;
 TCP_PERF_SEL_SHOOTDOWN                          =$000000ac;
 TCP_PERF_SEL_GATCL1_TRANSLATION_MISS            =$000000ad;
 TCP_PERF_SEL_GATCL1_PERMISSION_MISS             =$000000ae;
 TCP_PERF_SEL_GATCL1_REQUEST                     =$000000af;
 TCP_PERF_SEL_GATCL1_STALL_INFLIGHT_MAX          =$000000b0;
 TCP_PERF_SEL_GATCL1_STALL_LRU_INFLIGHT          =$000000b1;
 TCP_PERF_SEL_GATCL1_LFIFO_FULL                  =$000000b2;
 TCP_PERF_SEL_GATCL1_STALL_LFIFO_NOT_RES         =$000000b3;
 TCP_PERF_SEL_GATCL1_ATCL2_INFLIGHT              =$000000b5;
 TCP_PERF_SEL_GATCL1_STALL_MISSFIFO_FULL         =$000000b6;
 // TCP_WATCH_MODES
 TCP_WATCH_MODE_READ                             =$00000000;
 TCP_WATCH_MODE_NONREAD                          =$00000001;
 TCP_WATCH_MODE_ATOMIC                           =$00000002;
 TCP_WATCH_MODE_ALL                              =$00000003;
 // TCS_PERF_SEL
 TCS_PERF_SEL_NONE                               =$00000000;
 TCS_PERF_SEL_CYCLE                              =$00000001;
 TCS_PERF_SEL_BUSY                               =$00000002;
 TCS_PERF_SEL_REQ                                =$00000003;
 TCS_PERF_SEL_READ                               =$00000004;
 TCS_PERF_SEL_WRITE                              =$00000005;
 TCS_PERF_SEL_ATOMIC                             =$00000006;
 TCS_PERF_SEL_HOLE_FIFO_FULL                     =$00000007;
 TCS_PERF_SEL_REQ_FIFO_FULL                      =$00000008;
 TCS_PERF_SEL_REQ_CREDIT_STALL                   =$00000009;
 TCS_PERF_SEL_REQ_NO_SRC_DATA_STALL              =$0000000a;
 TCS_PERF_SEL_REQ_STALL                          =$0000000b;
 TCS_PERF_SEL_TCS_CHUB_REQ_SEND                  =$0000000c;
 TCS_PERF_SEL_CHUB_TCS_RET_SEND                  =$0000000d;
 TCS_PERF_SEL_RETURN_ACK                         =$0000000e;
 TCS_PERF_SEL_RETURN_DATA                        =$0000000f;
 TCS_PERF_SEL_IB_TOTAL_REQUESTS_STALL            =$00000010;
 TCS_PERF_SEL_IB_STALL                           =$00000011;
 TCS_PERF_SEL_TCA_LEVEL                          =$00000012;
 TCS_PERF_SEL_HOLE_LEVEL                         =$00000013;
 TCS_PERF_SEL_CHUB_LEVEL                         =$00000014;
 TCS_PERF_SEL_CLIENT0_REQ                        =$00000040;
 TCS_PERF_SEL_CLIENT1_REQ                        =$00000041;
 TCS_PERF_SEL_CLIENT2_REQ                        =$00000042;
 TCS_PERF_SEL_CLIENT3_REQ                        =$00000043;
 TCS_PERF_SEL_CLIENT4_REQ                        =$00000044;
 TCS_PERF_SEL_CLIENT5_REQ                        =$00000045;
 TCS_PERF_SEL_CLIENT6_REQ                        =$00000046;
 TCS_PERF_SEL_CLIENT7_REQ                        =$00000047;
 TCS_PERF_SEL_CLIENT8_REQ                        =$00000048;
 TCS_PERF_SEL_CLIENT9_REQ                        =$00000049;
 TCS_PERF_SEL_CLIENT10_REQ                       =$0000004a;
 TCS_PERF_SEL_CLIENT11_REQ                       =$0000004b;
 TCS_PERF_SEL_CLIENT12_REQ                       =$0000004c;
 TCS_PERF_SEL_CLIENT13_REQ                       =$0000004d;
 TCS_PERF_SEL_CLIENT14_REQ                       =$0000004e;
 TCS_PERF_SEL_CLIENT15_REQ                       =$0000004f;
 TCS_PERF_SEL_CLIENT16_REQ                       =$00000050;
 TCS_PERF_SEL_CLIENT17_REQ                       =$00000051;
 TCS_PERF_SEL_CLIENT18_REQ                       =$00000052;
 TCS_PERF_SEL_CLIENT19_REQ                       =$00000053;
 TCS_PERF_SEL_CLIENT20_REQ                       =$00000054;
 TCS_PERF_SEL_CLIENT21_REQ                       =$00000055;
 TCS_PERF_SEL_CLIENT22_REQ                       =$00000056;
 TCS_PERF_SEL_CLIENT23_REQ                       =$00000057;
 TCS_PERF_SEL_CLIENT24_REQ                       =$00000058;
 TCS_PERF_SEL_CLIENT25_REQ                       =$00000059;
 TCS_PERF_SEL_CLIENT26_REQ                       =$0000005a;
 TCS_PERF_SEL_CLIENT27_REQ                       =$0000005b;
 TCS_PERF_SEL_CLIENT28_REQ                       =$0000005c;
 TCS_PERF_SEL_CLIENT29_REQ                       =$0000005d;
 TCS_PERF_SEL_CLIENT30_REQ                       =$0000005e;
 TCS_PERF_SEL_CLIENT31_REQ                       =$0000005f;
 TCS_PERF_SEL_CLIENT32_REQ                       =$00000060;
 TCS_PERF_SEL_CLIENT33_REQ                       =$00000061;
 TCS_PERF_SEL_CLIENT34_REQ                       =$00000062;
 TCS_PERF_SEL_CLIENT35_REQ                       =$00000063;
 TCS_PERF_SEL_CLIENT36_REQ                       =$00000064;
 TCS_PERF_SEL_CLIENT37_REQ                       =$00000065;
 TCS_PERF_SEL_CLIENT38_REQ                       =$00000066;
 TCS_PERF_SEL_CLIENT39_REQ                       =$00000067;
 TCS_PERF_SEL_CLIENT40_REQ                       =$00000068;
 TCS_PERF_SEL_CLIENT41_REQ                       =$00000069;
 TCS_PERF_SEL_CLIENT42_REQ                       =$0000006a;
 TCS_PERF_SEL_CLIENT43_REQ                       =$0000006b;
 TCS_PERF_SEL_CLIENT44_REQ                       =$0000006c;
 TCS_PERF_SEL_CLIENT45_REQ                       =$0000006d;
 TCS_PERF_SEL_CLIENT46_REQ                       =$0000006e;
 TCS_PERF_SEL_CLIENT47_REQ                       =$0000006f;
 TCS_PERF_SEL_CLIENT48_REQ                       =$00000070;
 TCS_PERF_SEL_CLIENT49_REQ                       =$00000071;
 TCS_PERF_SEL_CLIENT50_REQ                       =$00000072;
 TCS_PERF_SEL_CLIENT51_REQ                       =$00000073;
 TCS_PERF_SEL_CLIENT52_REQ                       =$00000074;
 TCS_PERF_SEL_CLIENT53_REQ                       =$00000075;
 TCS_PERF_SEL_CLIENT54_REQ                       =$00000076;
 TCS_PERF_SEL_CLIENT55_REQ                       =$00000077;
 TCS_PERF_SEL_CLIENT56_REQ                       =$00000078;
 TCS_PERF_SEL_CLIENT57_REQ                       =$00000079;
 TCS_PERF_SEL_CLIENT58_REQ                       =$0000007a;
 TCS_PERF_SEL_CLIENT59_REQ                       =$0000007b;
 TCS_PERF_SEL_CLIENT60_REQ                       =$0000007c;
 TCS_PERF_SEL_CLIENT61_REQ                       =$0000007d;
 TCS_PERF_SEL_CLIENT62_REQ                       =$0000007e;
 TCS_PERF_SEL_CLIENT63_REQ                       =$0000007f;
 // TC_CHUB_REQ_CREDITS_ENUM
 TC_CHUB_REQ_CREDITS                             =$00000010;
 // TC_NACKS
 TC_NACK_NO_FAULT                                =$00000000;
 TC_NACK_PAGE_FAULT                              =$00000001;
 TC_NACK_PROTECTION_FAULT                        =$00000002;
 TC_NACK_DATA_ERROR                              =$00000003;
 // TC_OP
 TC_OP_READ                                      =$00000000;
 TC_OP_ATOMIC_FCMPSWAP_RTN_32                    =$00000001;
 TC_OP_ATOMIC_FMIN_RTN_32                        =$00000002;
 TC_OP_ATOMIC_FMAX_RTN_32                        =$00000003;
 TC_OP_RESERVED_FOP_RTN_32_0                     =$00000004;
 TC_OP_RESERVED_FOP_RTN_32_1                     =$00000005;
 TC_OP_RESERVED_FOP_RTN_32_2                     =$00000006;
 TC_OP_ATOMIC_SWAP_RTN_32                        =$00000007;
 TC_OP_ATOMIC_CMPSWAP_RTN_32                     =$00000008;
 TC_OP_ATOMIC_FCMPSWAP_FLUSH_DENORM_RTN_32       =$00000009;
 TC_OP_ATOMIC_FMIN_FLUSH_DENORM_RTN_32           =$0000000a;
 TC_OP_ATOMIC_FMAX_FLUSH_DENORM_RTN_32           =$0000000b;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_RTN_32_0        =$0000000c;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_RTN_32_1        =$0000000d;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_RTN_32_2        =$0000000e;
 TC_OP_ATOMIC_ADD_RTN_32                         =$0000000f;
 TC_OP_ATOMIC_SUB_RTN_32                         =$00000010;
 TC_OP_ATOMIC_SMIN_RTN_32                        =$00000011;
 TC_OP_ATOMIC_UMIN_RTN_32                        =$00000012;
 TC_OP_ATOMIC_SMAX_RTN_32                        =$00000013;
 TC_OP_ATOMIC_UMAX_RTN_32                        =$00000014;
 TC_OP_ATOMIC_AND_RTN_32                         =$00000015;
 TC_OP_ATOMIC_OR_RTN_32                          =$00000016;
 TC_OP_ATOMIC_XOR_RTN_32                         =$00000017;
 TC_OP_ATOMIC_INC_RTN_32                         =$00000018;
 TC_OP_ATOMIC_DEC_RTN_32                         =$00000019;
 TC_OP_WBINVL1_VOL                               =$0000001a;
 TC_OP_WBINVL1_SD                                =$0000001b;
 TC_OP_RESERVED_NON_FLOAT_RTN_32_0               =$0000001c;
 TC_OP_RESERVED_NON_FLOAT_RTN_32_1               =$0000001d;
 TC_OP_RESERVED_NON_FLOAT_RTN_32_2               =$0000001e;
 TC_OP_RESERVED_NON_FLOAT_RTN_32_3               =$0000001f;
 TC_OP_WRITE                                     =$00000020;
 TC_OP_ATOMIC_FCMPSWAP_RTN_64                    =$00000021;
 TC_OP_ATOMIC_FMIN_RTN_64                        =$00000022;
 TC_OP_ATOMIC_FMAX_RTN_64                        =$00000023;
 TC_OP_RESERVED_FOP_RTN_64_0                     =$00000024;
 TC_OP_RESERVED_FOP_RTN_64_1                     =$00000025;
 TC_OP_RESERVED_FOP_RTN_64_2                     =$00000026;
 TC_OP_ATOMIC_SWAP_RTN_64                        =$00000027;
 TC_OP_ATOMIC_CMPSWAP_RTN_64                     =$00000028;
 TC_OP_ATOMIC_FCMPSWAP_FLUSH_DENORM_RTN_64       =$00000029;
 TC_OP_ATOMIC_FMIN_FLUSH_DENORM_RTN_64           =$0000002a;
 TC_OP_ATOMIC_FMAX_FLUSH_DENORM_RTN_64           =$0000002b;
 TC_OP_WBINVL2_SD                                =$0000002c;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_RTN_64_0        =$0000002d;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_RTN_64_1        =$0000002e;
 TC_OP_ATOMIC_ADD_RTN_64                         =$0000002f;
 TC_OP_ATOMIC_SUB_RTN_64                         =$00000030;
 TC_OP_ATOMIC_SMIN_RTN_64                        =$00000031;
 TC_OP_ATOMIC_UMIN_RTN_64                        =$00000032;
 TC_OP_ATOMIC_SMAX_RTN_64                        =$00000033;
 TC_OP_ATOMIC_UMAX_RTN_64                        =$00000034;
 TC_OP_ATOMIC_AND_RTN_64                         =$00000035;
 TC_OP_ATOMIC_OR_RTN_64                          =$00000036;
 TC_OP_ATOMIC_XOR_RTN_64                         =$00000037;
 TC_OP_ATOMIC_INC_RTN_64                         =$00000038;
 TC_OP_ATOMIC_DEC_RTN_64                         =$00000039;
 TC_OP_WBL2_NC                                   =$0000003a;
 TC_OP_RESERVED_NON_FLOAT_RTN_64_0               =$0000003b;
 TC_OP_RESERVED_NON_FLOAT_RTN_64_1               =$0000003c;
 TC_OP_RESERVED_NON_FLOAT_RTN_64_2               =$0000003d;
 TC_OP_RESERVED_NON_FLOAT_RTN_64_3               =$0000003e;
 TC_OP_RESERVED_NON_FLOAT_RTN_64_4               =$0000003f;
 TC_OP_WBINVL1                                   =$00000040;
 TC_OP_ATOMIC_FCMPSWAP_32                        =$00000041;
 TC_OP_ATOMIC_FMIN_32                            =$00000042;
 TC_OP_ATOMIC_FMAX_32                            =$00000043;
 TC_OP_RESERVED_FOP_32_0                         =$00000044;
 TC_OP_RESERVED_FOP_32_1                         =$00000045;
 TC_OP_RESERVED_FOP_32_2                         =$00000046;
 TC_OP_ATOMIC_SWAP_32                            =$00000047;
 TC_OP_ATOMIC_CMPSWAP_32                         =$00000048;
 TC_OP_ATOMIC_FCMPSWAP_FLUSH_DENORM_32           =$00000049;
 TC_OP_ATOMIC_FMIN_FLUSH_DENORM_32               =$0000004a;
 TC_OP_ATOMIC_FMAX_FLUSH_DENORM_32               =$0000004b;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_32_0            =$0000004c;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_32_1            =$0000004d;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_32_2            =$0000004e;
 TC_OP_ATOMIC_ADD_32                             =$0000004f;
 TC_OP_ATOMIC_SUB_32                             =$00000050;
 TC_OP_ATOMIC_SMIN_32                            =$00000051;
 TC_OP_ATOMIC_UMIN_32                            =$00000052;
 TC_OP_ATOMIC_SMAX_32                            =$00000053;
 TC_OP_ATOMIC_UMAX_32                            =$00000054;
 TC_OP_ATOMIC_AND_32                             =$00000055;
 TC_OP_ATOMIC_OR_32                              =$00000056;
 TC_OP_ATOMIC_XOR_32                             =$00000057;
 TC_OP_ATOMIC_INC_32                             =$00000058;
 TC_OP_ATOMIC_DEC_32                             =$00000059;
 TC_OP_INVL2_NC                                  =$0000005a;
 TC_OP_RESERVED_NON_FLOAT_32_0                   =$0000005b;
 TC_OP_RESERVED_NON_FLOAT_32_1                   =$0000005c;
 TC_OP_RESERVED_NON_FLOAT_32_2                   =$0000005d;
 TC_OP_RESERVED_NON_FLOAT_32_3                   =$0000005e;
 TC_OP_RESERVED_NON_FLOAT_32_4                   =$0000005f;
 TC_OP_WBINVL2                                   =$00000060;
 TC_OP_ATOMIC_FCMPSWAP_64                        =$00000061;
 TC_OP_ATOMIC_FMIN_64                            =$00000062;
 TC_OP_ATOMIC_FMAX_64                            =$00000063;
 TC_OP_RESERVED_FOP_64_0                         =$00000064;
 TC_OP_RESERVED_FOP_64_1                         =$00000065;
 TC_OP_RESERVED_FOP_64_2                         =$00000066;
 TC_OP_ATOMIC_SWAP_64                            =$00000067;
 TC_OP_ATOMIC_CMPSWAP_64                         =$00000068;
 TC_OP_ATOMIC_FCMPSWAP_FLUSH_DENORM_64           =$00000069;
 TC_OP_ATOMIC_FMIN_FLUSH_DENORM_64               =$0000006a;
 TC_OP_ATOMIC_FMAX_FLUSH_DENORM_64               =$0000006b;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_64_0            =$0000006c;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_64_1            =$0000006d;
 TC_OP_RESERVED_FOP_FLUSH_DENORM_64_2            =$0000006e;
 TC_OP_ATOMIC_ADD_64                             =$0000006f;
 TC_OP_ATOMIC_SUB_64                             =$00000070;
 TC_OP_ATOMIC_SMIN_64                            =$00000071;
 TC_OP_ATOMIC_UMIN_64                            =$00000072;
 TC_OP_ATOMIC_SMAX_64                            =$00000073;
 TC_OP_ATOMIC_UMAX_64                            =$00000074;
 TC_OP_ATOMIC_AND_64                             =$00000075;
 TC_OP_ATOMIC_OR_64                              =$00000076;
 TC_OP_ATOMIC_XOR_64                             =$00000077;
 TC_OP_ATOMIC_INC_64                             =$00000078;
 TC_OP_ATOMIC_DEC_64                             =$00000079;
 TC_OP_WBINVL2_NC                                =$0000007a;
 TC_OP_RESERVED_NON_FLOAT_64_0                   =$0000007b;
 TC_OP_RESERVED_NON_FLOAT_64_1                   =$0000007c;
 TC_OP_RESERVED_NON_FLOAT_64_2                   =$0000007d;
 TC_OP_RESERVED_NON_FLOAT_64_3                   =$0000007e;
 TC_OP_RESERVED_NON_FLOAT_64_4                   =$0000007f;
 // TC_OP_MASKS
 TC_OP_MASK_FLUSH_DENROM                         =$00000008;
 TC_OP_MASK_64                                   =$00000020;
 TC_OP_MASK_NO_RTN                               =$00000040;
 // TD_PERFCOUNT_SEL
 TD_PERF_SEL_none                                =$00000000;
 TD_PERF_SEL_td_busy                             =$00000001;
 TD_PERF_SEL_input_busy                          =$00000002;
 TD_PERF_SEL_output_busy                         =$00000003;
 TD_PERF_SEL_lerp_busy                           =$00000004;
 TD_PERF_SEL_reg_sclk_vld                        =$00000005;
 TD_PERF_SEL_local_cg_dyn_sclk_grp0_en           =$00000006;
 TD_PERF_SEL_local_cg_dyn_sclk_grp1_en           =$00000007;
 TD_PERF_SEL_local_cg_dyn_sclk_grp4_en           =$00000008;
 TD_PERF_SEL_local_cg_dyn_sclk_grp5_en           =$00000009;
 TD_PERF_SEL_tc_td_fifo_full                     =$0000000a;
 TD_PERF_SEL_constant_state_full                 =$0000000b;
 TD_PERF_SEL_sample_state_full                   =$0000000c;
 TD_PERF_SEL_output_fifo_full                    =$0000000d;
 TD_PERF_SEL_RESERVED_14                         =$0000000e;
 TD_PERF_SEL_tc_stall                            =$0000000f;
 TD_PERF_SEL_pc_stall                            =$00000010;
 TD_PERF_SEL_gds_stall                           =$00000011;
 TD_PERF_SEL_RESERVED_18                         =$00000012;
 TD_PERF_SEL_RESERVED_19                         =$00000013;
 TD_PERF_SEL_gather4_wavefront                   =$00000014;
 TD_PERF_SEL_sample_c_wavefront                  =$00000015;
 TD_PERF_SEL_load_wavefront                      =$00000016;
 TD_PERF_SEL_atomic_wavefront                    =$00000017;
 TD_PERF_SEL_store_wavefront                     =$00000018;
 TD_PERF_SEL_ldfptr_wavefront                    =$00000019;
 TD_PERF_SEL_RESERVED_26                         =$0000001a;
 TD_PERF_SEL_RESERVED_27                         =$0000001b;
 TD_PERF_SEL_d16_en_wavefront                    =$0000001c;
 TD_PERF_SEL_bicubic_filter_wavefront            =$0000001d;
 TD_PERF_SEL_bypass_filter_wavefront             =$0000001e;
 TD_PERF_SEL_min_max_filter_wavefront            =$0000001f;
 TD_PERF_SEL_coalescable_wavefront               =$00000020;
 TD_PERF_SEL_coalesced_phase                     =$00000021;
 TD_PERF_SEL_four_phase_wavefront                =$00000022;
 TD_PERF_SEL_eight_phase_wavefront               =$00000023;
 TD_PERF_SEL_sixteen_phase_wavefront             =$00000024;
 TD_PERF_SEL_four_phase_forward_wavefront        =$00000025;
 TD_PERF_SEL_write_ack_wavefront                 =$00000026;
 TD_PERF_SEL_RESERVED_39                         =$00000027;
 TD_PERF_SEL_user_defined_border                 =$00000028;
 TD_PERF_SEL_white_border                        =$00000029;
 TD_PERF_SEL_opaque_black_border                 =$0000002a;
 TD_PERF_SEL_RESERVED_43                         =$0000002b;
 TD_PERF_SEL_RESERVED_44                         =$0000002c;
 TD_PERF_SEL_nack                                =$0000002d;
 TD_PERF_SEL_td_sp_traffic                       =$0000002e;
 TD_PERF_SEL_consume_gds_traffic                 =$0000002f;
 TD_PERF_SEL_addresscmd_poison                   =$00000030;
 TD_PERF_SEL_data_poison                         =$00000031;
 TD_PERF_SEL_start_cycle_0                       =$00000032;
 TD_PERF_SEL_start_cycle_1                       =$00000033;
 TD_PERF_SEL_start_cycle_2                       =$00000034;
 TD_PERF_SEL_start_cycle_3                       =$00000035;
 TD_PERF_SEL_null_cycle_output                   =$00000036;
 // TEX_BORDER_COLOR_TYPE
 TEX_BorderColor_TransparentBlack                =$00000000;
 TEX_BorderColor_OpaqueBlack                     =$00000001;
 TEX_BorderColor_OpaqueWhite                     =$00000002;
 TEX_BorderColor_Register                        =$00000003;
 // TEX_CHROMA_KEY
 TEX_ChromaKey_Disabled                          =$00000000;
 TEX_ChromaKey_Kill                              =$00000001;
 TEX_ChromaKey_Blend                             =$00000002;
 TEX_ChromaKey_RESERVED_3                        =$00000003;
 // TEX_CLAMP
 TEX_Clamp_Repeat                                =$00000000;
 TEX_Clamp_Mirror                                =$00000001;
 TEX_Clamp_ClampToLast                           =$00000002;
 TEX_Clamp_MirrorOnceToLast                      =$00000003;
 TEX_Clamp_ClampHalfToBorder                     =$00000004;
 TEX_Clamp_MirrorOnceHalfToBorder                =$00000005;
 TEX_Clamp_ClampToBorder                         =$00000006;
 TEX_Clamp_MirrorOnceToBorder                    =$00000007;
 // TEX_COORD_TYPE
 TEX_CoordType_Unnormalized                      =$00000000;
 TEX_CoordType_Normalized                        =$00000001;
 // TEX_DEPTH_COMPARE_FUNCTION
 TEX_DepthCompareFunction_Never                  =$00000000;
 TEX_DepthCompareFunction_Less                   =$00000001;
 TEX_DepthCompareFunction_Equal                  =$00000002;
 TEX_DepthCompareFunction_LessEqual              =$00000003;
 TEX_DepthCompareFunction_Greater                =$00000004;
 TEX_DepthCompareFunction_NotEqual               =$00000005;
 TEX_DepthCompareFunction_GreaterEqual           =$00000006;
 TEX_DepthCompareFunction_Always                 =$00000007;
 // TEX_DIM
 TEX_Dim_1D                                      =$00000000;
 TEX_Dim_2D                                      =$00000001;
 TEX_Dim_3D                                      =$00000002;
 TEX_Dim_CubeMap                                 =$00000003;
 TEX_Dim_1DArray                                 =$00000004;
 TEX_Dim_2DArray                                 =$00000005;
 TEX_Dim_2D_MSAA                                 =$00000006;
 TEX_Dim_2DArray_MSAA                            =$00000007;
 // TEX_FORMAT_COMP
 TEX_FormatComp_Unsigned                         =$00000000;
 TEX_FormatComp_Signed                           =$00000001;
 TEX_FormatComp_UnsignedBiased                   =$00000002;
 TEX_FormatComp_RESERVED_3                       =$00000003;
 // TEX_MAX_ANISO_RATIO
 TEX_MaxAnisoRatio_1to1                          =$00000000;
 TEX_MaxAnisoRatio_2to1                          =$00000001;
 TEX_MaxAnisoRatio_4to1                          =$00000002;
 TEX_MaxAnisoRatio_8to1                          =$00000003;
 TEX_MaxAnisoRatio_16to1                         =$00000004;
 TEX_MaxAnisoRatio_RESERVED_5                    =$00000005;
 TEX_MaxAnisoRatio_RESERVED_6                    =$00000006;
 TEX_MaxAnisoRatio_RESERVED_7                    =$00000007;
 // TEX_MIP_FILTER
 TEX_MipFilter_None                              =$00000000;
 TEX_MipFilter_Point                             =$00000001;
 TEX_MipFilter_Linear                            =$00000002;
 TEX_MipFilter_Point_Aniso_Adj                   =$00000003;
 // TEX_REQUEST_SIZE
 TEX_RequestSize_32B                             =$00000000;
 TEX_RequestSize_64B                             =$00000001;
 TEX_RequestSize_128B                            =$00000002;
 TEX_RequestSize_2X64B                           =$00000003;
 // TEX_SAMPLER_TYPE
 TEX_SamplerType_Invalid                         =$00000000;
 TEX_SamplerType_Valid                           =$00000001;
 // TEX_XY_FILTER
 TEX_XYFilter_Point                              =$00000000;
 TEX_XYFilter_Linear                             =$00000001;
 TEX_XYFilter_AnisoPoint                         =$00000002;
 TEX_XYFilter_AnisoLinear                        =$00000003;
 // TEX_Z_FILTER
 TEX_ZFilter_None                                =$00000000;
 TEX_ZFilter_Point                               =$00000001;
 TEX_ZFilter_Linear                              =$00000002;
 TEX_ZFilter_RESERVED_3                          =$00000003;
 // TVX_DATA_FORMAT
 TVX_FMT_INVALID                                 =$00000000;
 TVX_FMT_8                                       =$00000001;
 TVX_FMT_4_4                                     =$00000002;
 TVX_FMT_3_3_2                                   =$00000003;
 TVX_FMT_RESERVED_4                              =$00000004;
 TVX_FMT_16                                      =$00000005;
 TVX_FMT_16_FLOAT                                =$00000006;
 TVX_FMT_8_8                                     =$00000007;
 TVX_FMT_5_6_5                                   =$00000008;
 TVX_FMT_6_5_5                                   =$00000009;
 TVX_FMT_1_5_5_5                                 =$0000000a;
 TVX_FMT_4_4_4_4                                 =$0000000b;
 TVX_FMT_5_5_5_1                                 =$0000000c;
 TVX_FMT_32                                      =$0000000d;
 TVX_FMT_32_FLOAT                                =$0000000e;
 TVX_FMT_16_16                                   =$0000000f;
 TVX_FMT_16_16_FLOAT                             =$00000010;
 TVX_FMT_8_24                                    =$00000011;
 TVX_FMT_8_24_FLOAT                              =$00000012;
 TVX_FMT_24_8                                    =$00000013;
 TVX_FMT_24_8_FLOAT                              =$00000014;
 TVX_FMT_10_11_11                                =$00000015;
 TVX_FMT_10_11_11_FLOAT                          =$00000016;
 TVX_FMT_11_11_10                                =$00000017;
 TVX_FMT_11_11_10_FLOAT                          =$00000018;
 TVX_FMT_2_10_10_10                              =$00000019;
 TVX_FMT_8_8_8_8                                 =$0000001a;
 TVX_FMT_10_10_10_2                              =$0000001b;
 TVX_FMT_X24_8_32_FLOAT                          =$0000001c;
 TVX_FMT_32_32                                   =$0000001d;
 TVX_FMT_32_32_FLOAT                             =$0000001e;
 TVX_FMT_16_16_16_16                             =$0000001f;
 TVX_FMT_16_16_16_16_FLOAT                       =$00000020;
 TVX_FMT_RESERVED_33                             =$00000021;
 TVX_FMT_32_32_32_32                             =$00000022;
 TVX_FMT_32_32_32_32_FLOAT                       =$00000023;
 TVX_FMT_RESERVED_36                             =$00000024;
 TVX_FMT_1                                       =$00000025;
 TVX_FMT_1_REVERSED                              =$00000026;
 TVX_FMT_GB_GR                                   =$00000027;
 TVX_FMT_BG_RG                                   =$00000028;
 TVX_FMT_32_AS_8                                 =$00000029;
 TVX_FMT_32_AS_8_8                               =$0000002a;
 TVX_FMT_5_9_9_9_SHAREDEXP                       =$0000002b;
 TVX_FMT_8_8_8                                   =$0000002c;
 TVX_FMT_16_16_16                                =$0000002d;
 TVX_FMT_16_16_16_FLOAT                          =$0000002e;
 TVX_FMT_32_32_32                                =$0000002f;
 TVX_FMT_32_32_32_FLOAT                          =$00000030;
 TVX_FMT_BC1                                     =$00000031;
 TVX_FMT_BC2                                     =$00000032;
 TVX_FMT_BC3                                     =$00000033;
 TVX_FMT_BC4                                     =$00000034;
 TVX_FMT_BC5                                     =$00000035;
 TVX_FMT_APC0                                    =$00000036;
 TVX_FMT_APC1                                    =$00000037;
 TVX_FMT_APC2                                    =$00000038;
 TVX_FMT_APC3                                    =$00000039;
 TVX_FMT_APC4                                    =$0000003a;
 TVX_FMT_APC5                                    =$0000003b;
 TVX_FMT_APC6                                    =$0000003c;
 TVX_FMT_APC7                                    =$0000003d;
 TVX_FMT_CTX1                                    =$0000003e;
 TVX_FMT_RESERVED_63                             =$0000003f;
 // TVX_DST_SEL
 TVX_DstSel_X                                    =$00000000;
 TVX_DstSel_Y                                    =$00000001;
 TVX_DstSel_Z                                    =$00000002;
 TVX_DstSel_W                                    =$00000003;
 TVX_DstSel_0f                                   =$00000004;
 TVX_DstSel_1f                                   =$00000005;
 TVX_DstSel_RESERVED_6                           =$00000006;
 TVX_DstSel_Mask                                 =$00000007;
 // TVX_ENDIAN_SWAP
 TVX_EndianSwap_None                             =$00000000;
 TVX_EndianSwap_8in16                            =$00000001;
 TVX_EndianSwap_8in32                            =$00000002;
 TVX_EndianSwap_8in64                            =$00000003;
 // TVX_INST
 TVX_Inst_NormalVertexFetch                      =$00000000;
 TVX_Inst_SemanticVertexFetch                    =$00000001;
 TVX_Inst_RESERVED_2                             =$00000002;
 TVX_Inst_LD                                     =$00000003;
 TVX_Inst_GetTextureResInfo                      =$00000004;
 TVX_Inst_GetNumberOfSamples                     =$00000005;
 TVX_Inst_GetLOD                                 =$00000006;
 TVX_Inst_GetGradientsH                          =$00000007;
 TVX_Inst_GetGradientsV                          =$00000008;
 TVX_Inst_SetTextureOffsets                      =$00000009;
 TVX_Inst_KeepGradients                          =$0000000a;
 TVX_Inst_SetGradientsH                          =$0000000b;
 TVX_Inst_SetGradientsV                          =$0000000c;
 TVX_Inst_Pass                                   =$0000000d;
 TVX_Inst_GetBufferResInfo                       =$0000000e;
 TVX_Inst_RESERVED_15                            =$0000000f;
 TVX_Inst_Sample                                 =$00000010;
 TVX_Inst_Sample_L                               =$00000011;
 TVX_Inst_Sample_LB                              =$00000012;
 TVX_Inst_Sample_LZ                              =$00000013;
 TVX_Inst_Sample_G                               =$00000014;
 TVX_Inst_Gather4                                =$00000015;
 TVX_Inst_Sample_G_LB                            =$00000016;
 TVX_Inst_Gather4_O                              =$00000017;
 TVX_Inst_Sample_C                               =$00000018;
 TVX_Inst_Sample_C_L                             =$00000019;
 TVX_Inst_Sample_C_LB                            =$0000001a;
 TVX_Inst_Sample_C_LZ                            =$0000001b;
 TVX_Inst_Sample_C_G                             =$0000001c;
 TVX_Inst_Gather4_C                              =$0000001d;
 TVX_Inst_Sample_C_G_LB                          =$0000001e;
 TVX_Inst_Gather4_C_O                            =$0000001f;
 // TVX_NUM_FORMAT_ALL
 TVX_NumFormatAll_Norm                           =$00000000;
 TVX_NumFormatAll_Int                            =$00000001;
 TVX_NumFormatAll_Scaled                         =$00000002;
 TVX_NumFormatAll_RESERVED_3                     =$00000003;
 // TVX_SRC_SEL
 TVX_SrcSel_X                                    =$00000000;
 TVX_SrcSel_Y                                    =$00000001;
 TVX_SrcSel_Z                                    =$00000002;
 TVX_SrcSel_W                                    =$00000003;
 TVX_SrcSel_0f                                   =$00000004;
 TVX_SrcSel_1f                                   =$00000005;
 // TVX_SRF_MODE_ALL
 TVX_SRFModeAll_ZCMO                             =$00000000;
 TVX_SRFModeAll_NZ                               =$00000001;
 // TVX_TYPE
 TVX_Type_InvalidTextureResource                 =$00000000;
 TVX_Type_InvalidVertexBuffer                    =$00000001;
 TVX_Type_ValidTextureResource                   =$00000002;
 TVX_Type_ValidVertexBuffer                      =$00000003;
 // TileSplit
 ADDR_SURF_TILE_SPLIT_64B                        =$00000000;
 ADDR_SURF_TILE_SPLIT_128B                       =$00000001;
 ADDR_SURF_TILE_SPLIT_256B                       =$00000002;
 ADDR_SURF_TILE_SPLIT_512B                       =$00000003;
 ADDR_SURF_TILE_SPLIT_1KB                        =$00000004;
 ADDR_SURF_TILE_SPLIT_2KB                        =$00000005;
 ADDR_SURF_TILE_SPLIT_4KB                        =$00000006;
 // TileType
 ARRAY_COLOR_TILE                                =$00000000;
 ARRAY_DEPTH_TILE                                =$00000001;
 // UVDFirmwareCommand
 UVDFC_FENCE                                     =$00000000;
 UVDFC_TRAP                                      =$00000001;
 UVDFC_DECODED_ADDR                              =$00000002;
 UVDFC_MBLOCK_ADDR                               =$00000003;
 UVDFC_ITBUF_ADDR                                =$00000004;
 UVDFC_DISPLAY_ADDR                              =$00000005;
 UVDFC_EOD                                       =$00000006;
 UVDFC_DISPLAY_PITCH                             =$00000007;
 UVDFC_DISPLAY_TILING                            =$00000008;
 UVDFC_BITSTREAM_ADDR                            =$00000009;
 UVDFC_BITSTREAM_SIZE                            =$0000000a;
 // VGT_CACHE_INVALID_MODE
 VC_ONLY                                         =$00000000;
 TC_ONLY                                         =$00000001;
 VC_AND_TC                                       =$00000002;
 // VGT_DI_INDEX_SIZE
 DI_INDEX_SIZE_16_BIT                            =$00000000;
 DI_INDEX_SIZE_32_BIT                            =$00000001;
 DI_INDEX_SIZE_8_BIT                             =$00000002;
 // VGT_DI_MAJOR_MODE_SELECT
 DI_MAJOR_MODE_0                                 =$00000000;
 DI_MAJOR_MODE_1                                 =$00000001;
 // VGT_DI_PRIM_TYPE
 DI_PT_NONE                                      =$00000000;
 DI_PT_POINTLIST                                 =$00000001;
 DI_PT_LINELIST                                  =$00000002;
 DI_PT_LINESTRIP                                 =$00000003;
 DI_PT_TRILIST                                   =$00000004;
 DI_PT_TRIFAN                                    =$00000005;
 DI_PT_TRISTRIP                                  =$00000006;
 DI_PT_UNUSED_0                                  =$00000007;
 DI_PT_UNUSED_1                                  =$00000008;
 DI_PT_PATCH                                     =$00000009;
 DI_PT_LINELIST_ADJ                              =$0000000a;
 DI_PT_LINESTRIP_ADJ                             =$0000000b;
 DI_PT_TRILIST_ADJ                               =$0000000c;
 DI_PT_TRISTRIP_ADJ                              =$0000000d;
 DI_PT_UNUSED_3                                  =$0000000e;
 DI_PT_UNUSED_4                                  =$0000000f;
 DI_PT_TRI_WITH_WFLAGS                           =$00000010;
 DI_PT_RECTLIST                                  =$00000011;
 DI_PT_LINELOOP                                  =$00000012;
 DI_PT_QUADLIST                                  =$00000013;
 DI_PT_QUADSTRIP                                 =$00000014;
 DI_PT_POLYGON                                   =$00000015;
 DI_PT_2D_COPY_RECT_LIST_V0                      =$00000016;
 DI_PT_2D_COPY_RECT_LIST_V1                      =$00000017;
 DI_PT_2D_COPY_RECT_LIST_V2                      =$00000018;
 DI_PT_2D_COPY_RECT_LIST_V3                      =$00000019;
 DI_PT_2D_FILL_RECT_LIST                         =$0000001a;
 DI_PT_2D_LINE_STRIP                             =$0000001b;
 DI_PT_2D_TRI_STRIP                              =$0000001c;
 // VGT_DI_SOURCE_SELECT
 DI_SRC_SEL_DMA                                  =$00000000;
 DI_SRC_SEL_IMMEDIATE                            =$00000001;
 DI_SRC_SEL_AUTO_INDEX                           =$00000002;
 DI_SRC_SEL_RESERVED                             =$00000003;
 // VGT_DMA_BUF_TYPE
 VGT_DMA_BUF_MEM                                 =$00000000;
 VGT_DMA_BUF_RING                                =$00000001;
 VGT_DMA_BUF_SETUP                               =$00000002;
 VGT_DMA_PTR_UPDATE                              =$00000003;
 // VGT_DMA_SWAP_MODE
 VGT_DMA_SWAP_NONE                               =$00000000;
 VGT_DMA_SWAP_16_BIT                             =$00000001;
 VGT_DMA_SWAP_32_BIT                             =$00000002;
 VGT_DMA_SWAP_WORD                               =$00000003;
 // VGT_EVENT_TYPE
 Reserved_0x00                                   =$00000000;
 SAMPLE_STREAMOUTSTATS1                          =$00000001;
 SAMPLE_STREAMOUTSTATS2                          =$00000002;
 SAMPLE_STREAMOUTSTATS3                          =$00000003;
 CACHE_FLUSH_TS                                  =$00000004;
 CONTEXT_DONE                                    =$00000005;
 CACHE_FLUSH                                     =$00000006;
 CS_PARTIAL_FLUSH                                =$00000007;
 VGT_STREAMOUT_SYNC                              =$00000008;
 Reserved_0x09                                   =$00000009;
 VGT_STREAMOUT_RESET                             =$0000000a;
 END_OF_PIPE_INCR_DE                             =$0000000b;
 END_OF_PIPE_IB_END                              =$0000000c;
 RST_PIX_CNT                                     =$0000000d;
 Reserved_0x0E                                   =$0000000e;
 VS_PARTIAL_FLUSH                                =$0000000f;
 PS_PARTIAL_FLUSH                                =$00000010;
 FLUSH_HS_OUTPUT                                 =$00000011;
 FLUSH_LS_OUTPUT                                 =$00000012;
 Reserved_0x13                                   =$00000013;
 CACHE_FLUSH_AND_INV_TS_EVENT                    =$00000014;
 ZPASS_DONE                                      =$00000015;
 CACHE_FLUSH_AND_INV_EVENT                       =$00000016;
 PERFCOUNTER_START                               =$00000017;
 PERFCOUNTER_STOP                                =$00000018;
 PIPELINESTAT_START                              =$00000019;
 PIPELINESTAT_STOP                               =$0000001a;
 PERFCOUNTER_SAMPLE                              =$0000001b;
 FLUSH_ES_OUTPUT                                 =$0000001c;
 FLUSH_GS_OUTPUT                                 =$0000001d;
 SAMPLE_PIPELINESTAT                             =$0000001e;
 SO_VGTSTREAMOUT_FLUSH                           =$0000001f;
 SAMPLE_STREAMOUTSTATS                           =$00000020;
 RESET_VTX_CNT                                   =$00000021;
 BLOCK_CONTEXT_DONE                              =$00000022;
 CS_CONTEXT_DONE                                 =$00000023;
 VGT_FLUSH                                       =$00000024;
 TGID_ROLLOVER                                   =$00000025;
 SQ_NON_EVENT                                    =$00000026;
 SC_SEND_DB_VPZ                                  =$00000027;
 BOTTOM_OF_PIPE_TS                               =$00000028;
 FLUSH_SX_TS                                     =$00000029;
 DB_CACHE_FLUSH_AND_INV                          =$0000002a;
 FLUSH_AND_INV_DB_DATA_TS                        =$0000002b;
 FLUSH_AND_INV_DB_META                           =$0000002c;
 FLUSH_AND_INV_CB_DATA_TS                        =$0000002d;
 FLUSH_AND_INV_CB_META                           =$0000002e;
 CS_DONE                                         =$0000002f;
 PS_DONE                                         =$00000030;
 FLUSH_AND_INV_CB_PIXEL_DATA                     =$00000031;
 SX_CB_RAT_ACK_REQUEST                           =$00000032;
 THREAD_TRACE_START                              =$00000033;
 THREAD_TRACE_STOP                               =$00000034;
 THREAD_TRACE_MARKER                             =$00000035;
 THREAD_TRACE_FLUSH                              =$00000036;
 THREAD_TRACE_FINISH                             =$00000037;
 PIXEL_PIPE_STAT_CONTROL                         =$00000038;
 PIXEL_PIPE_STAT_DUMP                            =$00000039;
 PIXEL_PIPE_STAT_RESET                           =$0000003a;
 CONTEXT_SUSPEND                                 =$0000003b;
 OFFCHIP_HS_DEALLOC                              =$0000003c;
 // VGT_GROUP_CONV_SEL
 VGT_GRP_INDEX_16                                =$00000000;
 VGT_GRP_INDEX_32                                =$00000001;
 VGT_GRP_UINT_16                                 =$00000002;
 VGT_GRP_UINT_32                                 =$00000003;
 VGT_GRP_SINT_16                                 =$00000004;
 VGT_GRP_SINT_32                                 =$00000005;
 VGT_GRP_FLOAT_32                                =$00000006;
 VGT_GRP_AUTO_PRIM                               =$00000007;
 VGT_GRP_FIX_1_23_TO_FLOAT                       =$00000008;
 // VGT_GRP_PRIM_ORDER
 VGT_GRP_LIST                                    =$00000000;
 VGT_GRP_STRIP                                   =$00000001;
 VGT_GRP_FAN                                     =$00000002;
 VGT_GRP_LOOP                                    =$00000003;
 VGT_GRP_POLYGON                                 =$00000004;
 // VGT_GRP_PRIM_TYPE
 VGT_GRP_3D_POINT                                =$00000000;
 VGT_GRP_3D_LINE                                 =$00000001;
 VGT_GRP_3D_TRI                                  =$00000002;
 VGT_GRP_3D_RECT                                 =$00000003;
 VGT_GRP_3D_QUAD                                 =$00000004;
 VGT_GRP_2D_COPY_RECT_V0                         =$00000005;
 VGT_GRP_2D_COPY_RECT_V1                         =$00000006;
 VGT_GRP_2D_COPY_RECT_V2                         =$00000007;
 VGT_GRP_2D_COPY_RECT_V3                         =$00000008;
 VGT_GRP_2D_FILL_RECT                            =$00000009;
 VGT_GRP_2D_LINE                                 =$0000000a;
 VGT_GRP_2D_TRI                                  =$0000000b;
 VGT_GRP_PRIM_INDEX_LINE                         =$0000000c;
 VGT_GRP_PRIM_INDEX_TRI                          =$0000000d;
 VGT_GRP_PRIM_INDEX_QUAD                         =$0000000e;
 VGT_GRP_3D_LINE_ADJ                             =$0000000f;
 VGT_GRP_3D_TRI_ADJ                              =$00000010;
 VGT_GRP_3D_PATCH                                =$00000011;
 // VGT_GS_CUT_MODE
 GS_CUT_1024                                     =$00000000;
 GS_CUT_512                                      =$00000001;
 GS_CUT_256                                      =$00000002;
 GS_CUT_128                                      =$00000003;
 // VGT_GS_MODE_TYPE
 GS_OFF                                          =$00000000;
 GS_SCENARIO_A                                   =$00000001;
 GS_SCENARIO_B                                   =$00000002;
 GS_SCENARIO_G                                   =$00000003;
 GS_SCENARIO_C                                   =$00000004;
 SPRITE_EN                                       =$00000005;
 // VGT_GS_OUTPRIM_TYPE
 POINTLIST                                       =$00000000;
 LINESTRIP                                       =$00000001;
 TRISTRIP                                        =$00000002;
 // VGT_INDEX_TYPE_MODE
 VGT_INDEX_16                                    =$00000000;
 VGT_INDEX_32                                    =$00000001;
 VGT_INDEX_8                                     =$00000002;
 // VGT_OUTPATH_SELECT
 VGT_OUTPATH_VTX_REUSE                           =$00000000;
 VGT_OUTPATH_TESS_EN                             =$00000001;
 VGT_OUTPATH_PASSTHRU                            =$00000002;
 VGT_OUTPATH_GS_BLOCK                            =$00000003;
 VGT_OUTPATH_HS_BLOCK                            =$00000004;
 // VGT_OUT_PRIM_TYPE
 VGT_OUT_POINT                                   =$00000000;
 VGT_OUT_LINE                                    =$00000001;
 VGT_OUT_TRI                                     =$00000002;
 VGT_OUT_RECT_V0                                 =$00000003;
 VGT_OUT_RECT_V1                                 =$00000004;
 VGT_OUT_RECT_V2                                 =$00000005;
 VGT_OUT_RECT_V3                                 =$00000006;
 VGT_OUT_RESERVED                                =$00000007;
 VGT_TE_QUAD                                     =$00000008;
 VGT_TE_PRIM_INDEX_LINE                          =$00000009;
 VGT_TE_PRIM_INDEX_TRI                           =$0000000a;
 VGT_TE_PRIM_INDEX_QUAD                          =$0000000b;
 VGT_OUT_LINE_ADJ                                =$0000000c;
 VGT_OUT_TRI_ADJ                                 =$0000000d;
 VGT_OUT_PATCH                                   =$0000000e;
 // VGT_PERFCOUNT_SELECT
 vgt_perf_VGT_SPI_ESTHREAD_EVENT_WINDOW_ACTIVE   =$00000000;
 vgt_perf_VGT_SPI_ESVERT_VALID                   =$00000001;
 vgt_perf_VGT_SPI_ESVERT_EOV                     =$00000002;
 vgt_perf_VGT_SPI_ESVERT_STALLED                 =$00000003;
 vgt_perf_VGT_SPI_ESVERT_STARVED_BUSY            =$00000004;
 vgt_perf_VGT_SPI_ESVERT_STARVED_IDLE            =$00000005;
 vgt_perf_VGT_SPI_ESVERT_STATIC                  =$00000006;
 vgt_perf_VGT_SPI_ESTHREAD_IS_EVENT              =$00000007;
 vgt_perf_VGT_SPI_ESTHREAD_SEND                  =$00000008;
 vgt_perf_VGT_SPI_GSPRIM_VALID                   =$00000009;
 vgt_perf_VGT_SPI_GSPRIM_EOV                     =$0000000a;
 vgt_perf_VGT_SPI_GSPRIM_CONT                    =$0000000b;
 vgt_perf_VGT_SPI_GSPRIM_STALLED                 =$0000000c;
 vgt_perf_VGT_SPI_GSPRIM_STARVED_BUSY            =$0000000d;
 vgt_perf_VGT_SPI_GSPRIM_STARVED_IDLE            =$0000000e;
 vgt_perf_VGT_SPI_GSPRIM_STATIC                  =$0000000f;
 vgt_perf_VGT_SPI_GSTHREAD_EVENT_WINDOW_ACTIVE   =$00000010;
 vgt_perf_VGT_SPI_GSTHREAD_IS_EVENT              =$00000011;
 vgt_perf_VGT_SPI_GSTHREAD_SEND                  =$00000012;
 vgt_perf_VGT_SPI_VSTHREAD_EVENT_WINDOW_ACTIVE   =$00000013;
 vgt_perf_VGT_SPI_VSVERT_SEND                    =$00000014;
 vgt_perf_VGT_SPI_VSVERT_EOV                     =$00000015;
 vgt_perf_VGT_SPI_VSVERT_STALLED                 =$00000016;
 vgt_perf_VGT_SPI_VSVERT_STARVED_BUSY            =$00000017;
 vgt_perf_VGT_SPI_VSVERT_STARVED_IDLE            =$00000018;
 vgt_perf_VGT_SPI_VSVERT_STATIC                  =$00000019;
 vgt_perf_VGT_SPI_VSTHREAD_IS_EVENT              =$0000001a;
 vgt_perf_VGT_SPI_VSTHREAD_SEND                  =$0000001b;
 vgt_perf_VGT_PA_EVENT_WINDOW_ACTIVE             =$0000001c;
 vgt_perf_VGT_PA_CLIPV_SEND                      =$0000001d;
 vgt_perf_VGT_PA_CLIPV_FIRSTVERT                 =$0000001e;
 vgt_perf_VGT_PA_CLIPV_STALLED                   =$0000001f;
 vgt_perf_VGT_PA_CLIPV_STARVED_BUSY              =$00000020;
 vgt_perf_VGT_PA_CLIPV_STARVED_IDLE              =$00000021;
 vgt_perf_VGT_PA_CLIPV_STATIC                    =$00000022;
 vgt_perf_VGT_PA_CLIPP_SEND                      =$00000023;
 vgt_perf_VGT_PA_CLIPP_EOP                       =$00000024;
 vgt_perf_VGT_PA_CLIPP_IS_EVENT                  =$00000025;
 vgt_perf_VGT_PA_CLIPP_NULL_PRIM                 =$00000026;
 vgt_perf_VGT_PA_CLIPP_NEW_VTX_VECT              =$00000027;
 vgt_perf_VGT_PA_CLIPP_STALLED                   =$00000028;
 vgt_perf_VGT_PA_CLIPP_STARVED_BUSY              =$00000029;
 vgt_perf_VGT_PA_CLIPP_STARVED_IDLE              =$0000002a;
 vgt_perf_VGT_PA_CLIPP_STATIC                    =$0000002b;
 vgt_perf_VGT_PA_CLIPS_SEND                      =$0000002c;
 vgt_perf_VGT_PA_CLIPS_STALLED                   =$0000002d;
 vgt_perf_VGT_PA_CLIPS_STARVED_BUSY              =$0000002e;
 vgt_perf_VGT_PA_CLIPS_STARVED_IDLE              =$0000002f;
 vgt_perf_VGT_PA_CLIPS_STATIC                    =$00000030;
 vgt_perf_vsvert_ds_send                         =$00000031;
 vgt_perf_vsvert_api_send                        =$00000032;
 vgt_perf_hs_tif_stall                           =$00000033;
 vgt_perf_hs_input_stall                         =$00000034;
 vgt_perf_hs_interface_stall                     =$00000035;
 vgt_perf_hs_tfm_stall                           =$00000036;
 vgt_perf_te11_starved                           =$00000037;
 vgt_perf_gs_event_stall                         =$00000038;
 vgt_perf_vgt_pa_clipp_send_not_event            =$00000039;
 vgt_perf_vgt_pa_clipp_valid_prim                =$0000003a;
 vgt_perf_reused_es_indices                      =$0000003b;
 vgt_perf_vs_cache_hits                          =$0000003c;
 vgt_perf_gs_cache_hits                          =$0000003d;
 vgt_perf_ds_cache_hits                          =$0000003e;
 vgt_perf_total_cache_hits                       =$0000003f;
 vgt_perf_vgt_busy                               =$00000040;
 vgt_perf_vgt_gs_busy                            =$00000041;
 vgt_perf_esvert_stalled_es_tbl                  =$00000042;
 vgt_perf_esvert_stalled_gs_tbl                  =$00000043;
 vgt_perf_esvert_stalled_gs_event                =$00000044;
 vgt_perf_esvert_stalled_gsprim                  =$00000045;
 vgt_perf_gsprim_stalled_es_tbl                  =$00000046;
 vgt_perf_gsprim_stalled_gs_tbl                  =$00000047;
 vgt_perf_gsprim_stalled_gs_event                =$00000048;
 vgt_perf_gsprim_stalled_esvert                  =$00000049;
 vgt_perf_esthread_stalled_es_rb_full            =$0000004a;
 vgt_perf_esthread_stalled_spi_bp                =$0000004b;
 vgt_perf_counters_avail_stalled                 =$0000004c;
 vgt_perf_gs_rb_space_avail_stalled              =$0000004d;
 vgt_perf_gs_issue_rtr_stalled                   =$0000004e;
 vgt_perf_gsthread_stalled                       =$0000004f;
 vgt_perf_strmout_stalled                        =$00000050;
 vgt_perf_wait_for_es_done_stalled               =$00000051;
 vgt_perf_cm_stalled_by_gog                      =$00000052;
 vgt_perf_cm_reading_stalled                     =$00000053;
 vgt_perf_cm_stalled_by_gsfetch_done             =$00000054;
 vgt_perf_gog_vs_tbl_stalled                     =$00000055;
 vgt_perf_gog_out_indx_stalled                   =$00000056;
 vgt_perf_gog_out_prim_stalled                   =$00000057;
 vgt_perf_waveid_stalled                         =$00000058;
 vgt_perf_gog_busy                               =$00000059;
 vgt_perf_reused_vs_indices                      =$0000005a;
 vgt_perf_sclk_reg_vld_event                     =$0000005b;
 vgt_perf_vs_conflicting_indices                 =$0000005c;
 vgt_perf_sclk_core_vld_event                    =$0000005d;
 vgt_perf_hswave_stalled                         =$0000005e;
 vgt_perf_sclk_gs_vld_event                      =$0000005f;
 vgt_perf_VGT_SPI_LSVERT_VALID                   =$00000060;
 vgt_perf_VGT_SPI_LSVERT_EOV                     =$00000061;
 vgt_perf_VGT_SPI_LSVERT_STALLED                 =$00000062;
 vgt_perf_VGT_SPI_LSVERT_STARVED_BUSY            =$00000063;
 vgt_perf_VGT_SPI_LSVERT_STARVED_IDLE            =$00000064;
 vgt_perf_VGT_SPI_LSVERT_STATIC                  =$00000065;
 vgt_perf_VGT_SPI_LSWAVE_EVENT_WINDOW_ACTIVE     =$00000066;
 vgt_perf_VGT_SPI_LSWAVE_IS_EVENT                =$00000067;
 vgt_perf_VGT_SPI_LSWAVE_SEND                    =$00000068;
 vgt_perf_VGT_SPI_HSVERT_VALID                   =$00000069;
 vgt_perf_VGT_SPI_HSVERT_EOV                     =$0000006a;
 vgt_perf_VGT_SPI_HSVERT_STALLED                 =$0000006b;
 vgt_perf_VGT_SPI_HSVERT_STARVED_BUSY            =$0000006c;
 vgt_perf_VGT_SPI_HSVERT_STARVED_IDLE            =$0000006d;
 vgt_perf_VGT_SPI_HSVERT_STATIC                  =$0000006e;
 vgt_perf_VGT_SPI_HSWAVE_EVENT_WINDOW_ACTIVE     =$0000006f;
 vgt_perf_VGT_SPI_HSWAVE_IS_EVENT                =$00000070;
 vgt_perf_VGT_SPI_HSWAVE_SEND                    =$00000071;
 vgt_perf_ds_prims                               =$00000072;
 vgt_perf_ls_thread_groups                       =$00000073;
 vgt_perf_hs_thread_groups                       =$00000074;
 vgt_perf_es_thread_groups                       =$00000075;
 vgt_perf_vs_thread_groups                       =$00000076;
 vgt_perf_ls_done_latency                        =$00000077;
 vgt_perf_hs_done_latency                        =$00000078;
 vgt_perf_es_done_latency                        =$00000079;
 vgt_perf_gs_done_latency                        =$0000007a;
 vgt_perf_vgt_hs_busy                            =$0000007b;
 vgt_perf_vgt_te11_busy                          =$0000007c;
 vgt_perf_ls_flush                               =$0000007d;
 vgt_perf_hs_flush                               =$0000007e;
 vgt_perf_es_flush                               =$0000007f;
 vgt_perf_vgt_pa_clipp_eopg                      =$00000080;
 vgt_perf_ls_done                                =$00000081;
 vgt_perf_hs_done                                =$00000082;
 vgt_perf_es_done                                =$00000083;
 vgt_perf_gs_done                                =$00000084;
 vgt_perf_vsfetch_done                           =$00000085;
 vgt_perf_gs_done_received                       =$00000086;
 vgt_perf_es_ring_high_water_mark                =$00000087;
 vgt_perf_gs_ring_high_water_mark                =$00000088;
 vgt_perf_vs_table_high_water_mark               =$00000089;
 vgt_perf_hs_tgs_active_high_water_mark          =$0000008a;
 vgt_perf_pa_clipp_dealloc                       =$0000008b;
 vgt_perf_cut_mem_flush_stalled                  =$0000008c;
 vgt_perf_vsvert_work_received                   =$0000008d;
 vgt_perf_vgt_pa_clipp_starved_after_work        =$0000008e;
 vgt_perf_te11_con_starved_after_work            =$0000008f;
 vgt_perf_hs_waiting_on_ls_done_stall            =$00000090;
 vgt_spi_vsvert_valid                            =$00000091;
 // VGT_RDREQ_POLICY
 VGT_POLICY_LRU                                  =$00000000;
 VGT_POLICY_STREAM                               =$00000001;
 // VGT_STAGES_ES_EN
 ES_STAGE_OFF                                    =$00000000;
 ES_STAGE_DS                                     =$00000001;
 ES_STAGE_REAL                                   =$00000002;
 RESERVED_ES                                     =$00000003;
 // VGT_STAGES_GS_EN
 GS_STAGE_OFF                                    =$00000000;
 GS_STAGE_ON                                     =$00000001;
 // VGT_STAGES_HS_EN
 HS_STAGE_OFF                                    =$00000000;
 HS_STAGE_ON                                     =$00000001;
 // VGT_STAGES_LS_EN
 LS_STAGE_OFF                                    =$00000000;
 LS_STAGE_ON                                     =$00000001;
 CS_STAGE_ON                                     =$00000002;
 RESERVED_LS                                     =$00000003;
 // VGT_STAGES_VS_EN
 VS_STAGE_REAL                                   =$00000000;
 VS_STAGE_DS                                     =$00000001;
 VS_STAGE_COPY_SHADER                            =$00000002;
 RESERVED_VS                                     =$00000003;
 // VGT_TESS_PARTITION
 PART_INTEGER                                    =$00000000;
 PART_POW2                                       =$00000001;
 PART_FRAC_ODD                                   =$00000002;
 PART_FRAC_EVEN                                  =$00000003;
 // VGT_TESS_TOPOLOGY
 OUTPUT_POINT                                    =$00000000;
 OUTPUT_LINE                                     =$00000001;
 OUTPUT_TRIANGLE_CW                              =$00000002;
 OUTPUT_TRIANGLE_CCW                             =$00000003;
 // VGT_TESS_TYPE
 TESS_ISOLINE                                    =$00000000;
 TESS_TRIANGLE                                   =$00000001;
 TESS_QUAD                                       =$00000002;
 // VTX_CLAMP
 VTX_Clamp_ClampToZero                           =$00000000;
 VTX_Clamp_ClampToNAN                            =$00000001;
 // VTX_FETCH_TYPE
 VTX_FetchType_VertexData                        =$00000000;
 VTX_FetchType_InstanceData                      =$00000001;
 VTX_FetchType_NoIndexOffset                     =$00000002;
 VTX_FetchType_RESERVED_3                        =$00000003;
 // VTX_FORMAT_COMP_ALL
 VTX_FormatCompAll_Unsigned                      =$00000000;
 VTX_FormatCompAll_Signed                        =$00000001;
 // VTX_MEM_REQUEST_SIZE
 VTX_MemRequestSize_32B                          =$00000000;
 VTX_MemRequestSize_64B                          =$00000001;
 // WD_IA_DRAW_TYPE
 WD_IA_DRAW_TYPE_DI_MM0                          =$00000000;
 WD_IA_DRAW_TYPE_DI_MM1                          =$00000001;
 WD_IA_DRAW_TYPE_EVENT_INIT                      =$00000002;
 WD_IA_DRAW_TYPE_EVENT_ADDR                      =$00000003;
 WD_IA_DRAW_TYPE_MIN_INDX                        =$00000004;
 WD_IA_DRAW_TYPE_MAX_INDX                        =$00000005;
 WD_IA_DRAW_TYPE_INDX_OFF                        =$00000006;
 WD_IA_DRAW_TYPE_IMM_DATA                        =$00000007;
 // WD_PERFCOUNT_SELECT
 wd_perf_RBIU_FIFOS_EVENT_WINDOW_ACTIVE          =$00000000;
 wd_perf_RBIU_DR_FIFO_STARVED                    =$00000001;
 wd_perf_RBIU_DR_FIFO_STALLED                    =$00000002;
 wd_perf_RBIU_DI_FIFO_STARVED                    =$00000003;
 wd_perf_RBIU_DI_FIFO_STALLED                    =$00000004;
 wd_perf_wd_busy                                 =$00000005;
 wd_perf_wd_sclk_reg_vld_event                   =$00000006;
 wd_perf_wd_sclk_input_vld_event                 =$00000007;
 wd_perf_wd_sclk_core_vld_event                  =$00000008;
 wd_perf_wd_stalled                              =$00000009;
 wd_perf_inside_tf_bin_0                         =$0000000a;
 wd_perf_inside_tf_bin_1                         =$0000000b;
 wd_perf_inside_tf_bin_2                         =$0000000c;
 wd_perf_inside_tf_bin_3                         =$0000000d;
 wd_perf_inside_tf_bin_4                         =$0000000e;
 wd_perf_inside_tf_bin_5                         =$0000000f;
 wd_perf_inside_tf_bin_6                         =$00000010;
 wd_perf_inside_tf_bin_7                         =$00000011;
 wd_perf_inside_tf_bin_8                         =$00000012;
 wd_perf_tfreq_lat_bin_0                         =$00000013;
 wd_perf_tfreq_lat_bin_1                         =$00000014;
 wd_perf_tfreq_lat_bin_2                         =$00000015;
 wd_perf_tfreq_lat_bin_3                         =$00000016;
 wd_perf_tfreq_lat_bin_4                         =$00000017;
 wd_perf_tfreq_lat_bin_5                         =$00000018;
 wd_perf_tfreq_lat_bin_6                         =$00000019;
 wd_perf_tfreq_lat_bin_7                         =$0000001a;
 wd_starved_on_hs_done                           =$0000001b;
 wd_perf_se0_hs_done_latency                     =$0000001c;
 wd_perf_se1_hs_done_latency                     =$0000001d;
 wd_perf_se2_hs_done_latency                     =$0000001e;
 wd_perf_se3_hs_done_latency                     =$0000001f;
 wd_perf_hs_done_se0                             =$00000020;
 wd_perf_hs_done_se1                             =$00000021;
 wd_perf_hs_done_se2                             =$00000022;
 wd_perf_hs_done_se3                             =$00000023;
 wd_perf_null_patches                            =$00000024;
 // ZFormat
 Z_INVALID                                       =$00000000;
 Z_16                                            =$00000001;
 Z_24                                            =$00000002;
 Z_32_FLOAT                                      =$00000003;
 // ZLimitSumm
 FORCE_SUMM_OFF                                  =$00000000;
 FORCE_SUMM_MINZ                                 =$00000001;
 FORCE_SUMM_MAXZ                                 =$00000002;
 FORCE_SUMM_BOTH                                 =$00000003;
 // ZModeForce
 NO_FORCE                                        =$00000000;
 FORCE_EARLY_Z                                   =$00000001;
 FORCE_LATE_Z                                    =$00000002;
 FORCE_RE_Z                                      =$00000003;
 // ZOrder
 LATE_Z                                          =$00000000;
 EARLY_Z_THEN_LATE_Z                             =$00000001;
 RE_Z                                            =$00000002;
 EARLY_Z_THEN_RE_Z                               =$00000003;
 // ZSamplePosition
 Z_SAMPLE_CENTER                                 =$00000000;
 Z_SAMPLE_CENTROID                               =$00000001;
 // ZpassControl
 ZPASS_DISABLE                                   =$00000000;
 ZPASS_SAMPLES                                   =$00000001;
 ZPASS_PIXELS                                    =$00000002;
 // COL_MAN_DENORM_CLAMP_CONTROL
 DENORM_CLAMP_CONTROL_UNITY                      =$00000000;
 DENORM_CLAMP_CONTROL_8                          =$00000001;
 DENORM_CLAMP_CONTROL_10                         =$00000002;
 DENORM_CLAMP_CONTROL_12                         =$00000003;
 // COL_MAN_DISABLE_MULTIPLE_UPDATE
 COL_MAN_MULTIPLE_UPDATE                         =$00000000;
 COL_MAN_MULTIPLE_UPDAT_EDISABLE                 =$00000001;
 // COL_MAN_GAMMA_CORR_CONTROL
 GAMMA_CORR_CONTROL_BYPASS                       =$00000000;
 GAMMA_CORR_CONTROL_A                            =$00000001;
 GAMMA_CORR_CONTROL_B                            =$00000002;
 // COL_MAN_INPUTCSC_CONVERT
 INPUTCSC_ROUND                                  =$00000000;
 INPUTCSC_TRUNCATE                               =$00000001;
 // COL_MAN_INPUTCSC_MODE
 INPUTCSC_MODE_BYPASS                            =$00000000;
 INPUTCSC_MODE_A                                 =$00000001;
 INPUTCSC_MODE_B                                 =$00000002;
 INPUTCSC_MODE_UNITY                             =$00000003;
 // COL_MAN_INPUTCSC_TYPE
 INPUTCSC_TYPE_12_0                              =$00000000;
 INPUTCSC_TYPE_10_2                              =$00000001;
 INPUTCSC_TYPE_8_4                               =$00000002;
 // COL_MAN_OUTPUT_CSC_MODE
 COL_MAN_OUTPUT_CSC_BYPASS                       =$00000000;
 COL_MAN_OUTPUT_CSC_RGB                          =$00000001;
 COL_MAN_OUTPUT_CSC_YCrCb601                     =$00000002;
 COL_MAN_OUTPUT_CSC_YCrCb709                     =$00000003;
 COL_MAN_OUTPUT_CSC_A                            =$00000004;
 COL_MAN_OUTPUT_CSC_B                            =$00000005;
 // COL_MAN_PRESCALE_MODE
 PRESCALE_MODE_BYPASS                            =$00000000;
 PRESCALE_MODE_PROGRAM                           =$00000001;
 PRESCALE_MODE_UNITY                             =$00000002;
 // COL_MAN_UPDATE_LOCK
 COL_MAN_UPDATE_UNLOCKED                         =$00000000;
 COL_MAN_UPDATE_LOCKED                           =$00000001;
 // CmaskAddr
 CMASK_ADDR_TILED                                =$00000000;
 CMASK_ADDR_LINEAR                               =$00000001;
 CMASK_ADDR_COMPATIBLE                           =$00000002;
 // ColorTransform
 DCC_CT_AUTO                                     =$00000000;
 DCC_CT_NONE                                     =$00000001;
 ABGR_TO_A_BG_G_RB                               =$00000002;
 BGRA_TO_BG_G_RB_A                               =$00000003;
 // DCIOCHIP_AUXSLAVE_PAD_MODE
 DCIOCHIP_AUXSLAVE_PAD_MODE_I2C                  =$00000000;
 DCIOCHIP_AUXSLAVE_PAD_MODE_AUX                  =$00000001;
 // DCIOCHIP_DVO_VREFPON
 DCIOCHIP_DVO_VREFPON_DISABLE                    =$00000000;
 DCIOCHIP_DVO_VREFPON_ENABLE                     =$00000001;
 // DCIOCHIP_DVO_VREFSEL
 DCIOCHIP_DVO_VREFSEL_ONCHIP                     =$00000000;
 DCIOCHIP_DVO_VREFSEL_EXTERNAL                   =$00000001;
 // DCIOCHIP_ENABLE_2BIT
 DCIOCHIP_2BIT_DISABLE                           =$00000000;
 DCIOCHIP_2BIT_ENABLE                            =$00000003;
 // DCIOCHIP_ENABLE_4BIT
 DCIOCHIP_4BIT_DISABLE                           =$00000000;
 DCIOCHIP_4BIT_ENABLE                            =$0000000f;
 // DCIOCHIP_ENABLE_5BIT
 DCIOCHIP_5BIT_DISABLE                           =$00000000;
 DCIOCHIP_5BIT_ENABLE                            =$0000001f;
 // DCIOCHIP_GPIO_I2C_DRIVE
 DCIOCHIP_GPIO_I2C_DRIVE_LOW                     =$00000000;
 DCIOCHIP_GPIO_I2C_DRIVE_HIGH                    =$00000001;
 // DCIOCHIP_GPIO_I2C_EN
 DCIOCHIP_GPIO_I2C_DISABLE                       =$00000000;
 DCIOCHIP_GPIO_I2C_ENABLE                        =$00000001;
 // DCIOCHIP_GPIO_I2C_MASK
 DCIOCHIP_GPIO_I2C_MASK_DISABLE                  =$00000000;
 DCIOCHIP_GPIO_I2C_MASK_ENABLE                   =$00000001;
 // DCIOCHIP_GPIO_MASK_EN
 DCIOCHIP_GPIO_MASK_EN_HARDWARE                  =$00000000;
 DCIOCHIP_GPIO_MASK_EN_SOFTWARE                  =$00000001;
 // DCIOCHIP_HPD_SEL
 DCIOCHIP_HPD_SEL_ASYNC                          =$00000000;
 DCIOCHIP_HPD_SEL_CLOCKED                        =$00000001;
 // DCIOCHIP_INVERT
 DCIOCHIP_POL_NON_INVERT                         =$00000000;
 DCIOCHIP_POL_INVERT                             =$00000001;
 // DCIOCHIP_MASK
 DCIOCHIP_MASK_DISABLE                           =$00000000;
 DCIOCHIP_MASK_ENABLE                            =$00000001;
 // DCIOCHIP_MASK_2BIT
 DCIOCHIP_MASK_2BIT_DISABLE                      =$00000000;
 DCIOCHIP_MASK_2BIT_ENABLE                       =$00000003;
 // DCIOCHIP_MASK_4BIT
 DCIOCHIP_MASK_4BIT_DISABLE                      =$00000000;
 DCIOCHIP_MASK_4BIT_ENABLE                       =$0000000f;
 // DCIOCHIP_MASK_5BIT
 DCIOCHIP_MASIK_5BIT_DISABLE                     =$00000000;
 DCIOCHIP_MASIK_5BIT_ENABLE                      =$0000001f;
 // DCIOCHIP_PAD_MODE
 DCIOCHIP_PAD_MODE_DDC                           =$00000000;
 DCIOCHIP_PAD_MODE_DP                            =$00000001;
 // DCIOCHIP_PD_EN
 DCIOCHIP_PD_EN_NOTALLOW                         =$00000000;
 DCIOCHIP_PD_EN_ALLOW                            =$00000001;
 // DCIOCHIP_REF_27_SRC_SEL
 DCIOCHIP_REF_27_SRC_SEL_XTAL_DIVIDER            =$00000000;
 DCIOCHIP_REF_27_SRC_SEL_DISP_CLKIN2_DIVIDER     =$00000001;
 DCIOCHIP_REF_27_SRC_SEL_XTAL_BYPASS             =$00000002;
 DCIOCHIP_REF_27_SRC_SEL_DISP_CLKIN2_BYPASS      =$00000003;
 // DCIO_BL_PWM_CNTL2_BL_PWM_OVERRIDE_BL_OUT_ENABLE
 DCIO_BL_PWM_OVERRIDE_BL_OUT_DISABLE             =$00000000;
 DCIO_BL_PWM_OVERRIDE_BL_OUT_ENABLE              =$00000001;
 // DCIO_BL_PWM_CNTL2_BL_PWM_OVERRIDE_LVTMA_PWRSEQ_EN
 DCIO_BL_PWM_OVERRIDE_LVTMA_PWRSEQ_EN_NORMAL     =$00000000;
 DCIO_BL_PWM_OVERRIDE_LVTMA_PWRSEQ_EN_PWM        =$00000001;
 // DCIO_BL_PWM_CNTL2_DBG_BL_PWM_INPUT_REFCLK_SELECT
 DCIO_DBG_BL_PWM_INPUT_REFCLK_SELECT_NORMAL      =$00000000;
 DCIO_DBG_BL_PWM_INPUT_REFCLK_SELECT_DEBUG1      =$00000001;
 DCIO_DBG_BL_PWM_INPUT_REFCLK_SELECT_DEBUG2      =$00000002;
 DCIO_DBG_BL_PWM_INPUT_REFCLK_SELECT_DEBUG3      =$00000003;
 // DCIO_BL_PWM_CNTL_BL_PWM_EN
 DCIO_BL_PWM_DISABLE                             =$00000000;
 DCIO_BL_PWM_ENABLE                              =$00000001;
 // DCIO_BL_PWM_CNTL_BL_PWM_FRACTIONAL_EN
 DCIO_BL_PWM_FRACTIONAL_DISABLE                  =$00000000;
 DCIO_BL_PWM_FRACTIONAL_ENABLE                   =$00000001;
 // DCIO_BL_PWM_GRP1_FRAME_START_DISP_SEL
 // DCIO_BL_PWM_GRP1_IGNORE_MASTER_LOCK_EN
 DCIO_BL_PWM_GRP1_IGNORE_MASTER_LOCK_ENABLE      =$00000000;
 DCIO_BL_PWM_GRP1_IGNORE_MASTER_LOCK_DISABLE     =$00000001;
 // DCIO_BL_PWM_GRP1_READBACK_DB_REG_VALUE_EN
 DCIO_BL_PWM_GRP1_READBACK_DB_REG_VALUE_EN_BL_PWM=$00000000;
 // DCIO_BL_PWM_GRP1_REG_LOCK
 DCIO_BL_PWM_GRP1_REG_LOCK_DISABLE               =$00000000;
 DCIO_BL_PWM_GRP1_REG_LOCK_ENABLE                =$00000001;
 // DCIO_BL_PWM_GRP1_UPDATE_AT_FRAME_START
 DCIO_BL_PWM_GRP1_UPDATE_AT_FRAME_START_DISABLE  =$00000000;
 DCIO_BL_PWM_GRP1_UPDATE_AT_FRAME_START_ENABLE   =$00000001;
 // DCIO_CLOCK_CNTL_DCIO_TEST_CLK_SEL
 DCIO_TEST_CLK_SEL_DISPCLK                       =$00000000;
 DCIO_TEST_CLK_SEL_GATED_DISPCLK                 =$00000001;
 DCIO_TEST_CLK_SEL_SCLK                          =$00000002;
 // DCIO_CLOCK_CNTL_DISPCLK_R_DCIO_GATE_DIS
 DCIO_DISPCLK_R_DCIO_GATE_DISABLE                =$00000000;
 DCIO_DISPCLK_R_DCIO_GATE_ENABLE                 =$00000001;
 // DCIO_CLOCK_CNTL_DISPCLK_R_DCIO_RAMP_DIS
 DCIO_DISPCLK_R_DCIO_RAMP_DISABLE                =$00000000;
 DCIO_DISPCLK_R_DCIO_RAMP_ENABLE                 =$00000001;
 // DCIO_DACA_SOFT_RESET
 DCIO_DACA_SOFT_RESET_DEASSERT                   =$00000000;
 DCIO_DACA_SOFT_RESET_ASSERT                     =$00000001;
 // DCIO_DBG_OUT_12BIT_SEL
 DCIO_DBG_OUT_12BIT_SEL_LOW_12BIT                =$00000000;
 DCIO_DBG_OUT_12BIT_SEL_MID_12BIT                =$00000001;
 DCIO_DBG_OUT_12BIT_SEL_HIGH_12BIT               =$00000002;
 DCIO_DBG_OUT_12BIT_SEL_OVERRIDE                 =$00000003;
 // DCIO_DBG_OUT_PIN_SEL
 DCIO_DBG_OUT_PIN_SEL_LOW_12BIT                  =$00000000;
 DCIO_DBG_OUT_PIN_SEL_HIGH_12BIT                 =$00000001;
 // DCIO_DCO_DCFE_EXT_VSYNC_MUX
 DCIO_EXT_VSYNC_MUX_SWAPLOCKB                    =$00000000;
 DCIO_EXT_VSYNC_MUX_CRTC0                        =$00000001;
 DCIO_EXT_VSYNC_MUX_CRTC1                        =$00000002;
 DCIO_EXT_VSYNC_MUX_CRTC2                        =$00000003;
 DCIO_EXT_VSYNC_MUX_CRTC3                        =$00000004;
 DCIO_EXT_VSYNC_MUX_CRTC4                        =$00000005;
 DCIO_EXT_VSYNC_MUX_CRTC5                        =$00000006;
 DCIO_EXT_VSYNC_MUX_GENERICB                     =$00000007;
 // DCIO_DCO_EXT_VSYNC_MASK
 DCIO_EXT_VSYNC_MASK_NONE                        =$00000000;
 DCIO_EXT_VSYNC_MASK_PIPE0                       =$00000001;
 DCIO_EXT_VSYNC_MASK_PIPE1                       =$00000002;
 DCIO_EXT_VSYNC_MASK_PIPE2                       =$00000003;
 DCIO_EXT_VSYNC_MASK_PIPE3                       =$00000004;
 DCIO_EXT_VSYNC_MASK_PIPE4                       =$00000005;
 DCIO_EXT_VSYNC_MASK_PIPE5                       =$00000006;
 DCIO_EXT_VSYNC_MASK_NONE_DUPLICATE              =$00000007;
 // DCIO_DCRXPHY_SOFT_RESET
 DCIO_DCRXPHY_SOFT_RESET_DEASSERT                =$00000000;
 DCIO_DCRXPHY_SOFT_RESET_ASSERT                  =$00000001;
 // DCIO_DC_DVODATA_CONFIG_DVO_ALTER_MAPPING_EN
 DCIO_DVO_ALTER_MAPPING_EN_DEFAULT               =$00000000;
 DCIO_DVO_ALTER_MAPPING_EN_ALTERNATIVE           =$00000001;
 // DCIO_DC_DVODATA_CONFIG_VIP_ALTER_MAPPING_EN
 DCIO_VIP_ALTER_MAPPING_EN_DEFAULT               =$00000000;
 DCIO_VIP_ALTER_MAPPING_EN_ALTERNATIVE           =$00000001;
 // DCIO_DC_DVODATA_CONFIG_VIP_MUX_EN
 DCIO_VIP_MUX_EN_DVO                             =$00000000;
 DCIO_VIP_MUX_EN_VIP                             =$00000001;
 // DCIO_DC_GENERICA_SEL
 DCIO_GENERICA_SEL_DACA_STEREOSYNC               =$00000000;
 DCIO_GENERICA_SEL_STEREOSYNC                    =$00000001;
 DCIO_GENERICA_SEL_DACA_PIXCLK                   =$00000002;
 DCIO_GENERICA_SEL_DACB_PIXCLK                   =$00000003;
 DCIO_GENERICA_SEL_DVOA_CTL3                     =$00000004;
 DCIO_GENERICA_SEL_P1_PLLCLK                     =$00000005;
 DCIO_GENERICA_SEL_P2_PLLCLK                     =$00000006;
 DCIO_GENERICA_SEL_DVOA_STEREOSYNC               =$00000007;
 DCIO_GENERICA_SEL_DACA_FIELD_NUMBER             =$00000008;
 DCIO_GENERICA_SEL_DACB_FIELD_NUMBER             =$00000009;
 DCIO_GENERICA_SEL_GENERICA_DCCG                 =$0000000a;
 DCIO_GENERICA_SEL_SYNCEN                        =$0000000b;
 DCIO_GENERICA_SEL_GENERICA_SCG                  =$0000000c;
 DCIO_GENERICA_SEL_RESERVED_VALUE13              =$0000000d;
 DCIO_GENERICA_SEL_RESERVED_VALUE14              =$0000000e;
 DCIO_GENERICA_SEL_RESERVED_VALUE15              =$0000000f;
 DCIO_GENERICA_SEL_GENERICA_DPRX                 =$00000010;
 DCIO_GENERICA_SEL_GENERICB_DPRX                 =$00000011;
 // DCIO_DC_GENERICB_SEL
 DCIO_GENERICB_SEL_DACA_STEREOSYNC               =$00000000;
 DCIO_GENERICB_SEL_STEREOSYNC                    =$00000001;
 DCIO_GENERICB_SEL_DACA_PIXCLK                   =$00000002;
 DCIO_GENERICB_SEL_DACB_PIXCLK                   =$00000003;
 DCIO_GENERICB_SEL_DVOA_CTL3                     =$00000004;
 DCIO_GENERICB_SEL_P1_PLLCLK                     =$00000005;
 DCIO_GENERICB_SEL_P2_PLLCLK                     =$00000006;
 DCIO_GENERICB_SEL_DVOA_STEREOSYNC               =$00000007;
 DCIO_GENERICB_SEL_DACA_FIELD_NUMBER             =$00000008;
 DCIO_GENERICB_SEL_DACB_FIELD_NUMBER             =$00000009;
 DCIO_GENERICB_SEL_GENERICB_DCCG                 =$0000000a;
 DCIO_GENERICB_SEL_SYNCEN                        =$0000000b;
 DCIO_GENERICB_SEL_GENERICA_SCG                  =$0000000c;
 DCIO_GENERICB_SEL_RESERVED_VALUE13              =$0000000d;
 DCIO_GENERICB_SEL_RESERVED_VALUE14              =$0000000e;
 DCIO_GENERICB_SEL_RESERVED_VALUE15              =$0000000f;
 // DCIO_DC_GENERIC_UNIPHY_FBDIV_CLK_DIV2_SEL
 DCIO_UNIPHYA_TEST_FBDIV_CLK_DIV2                =$00000000;
 DCIO_UNIPHYB_TEST_FBDIV_CLK_DIV2                =$00000001;
 DCIO_UNIPHYC_TEST_FBDIV_CLK_DIV2                =$00000002;
 DCIO_UNIPHYD_TEST_FBDIV_CLK_DIV2                =$00000003;
 DCIO_UNIPHYE_TEST_FBDIV_CLK_DIV2                =$00000004;
 DCIO_UNIPHYF_TEST_FBDIV_CLK_DIV2                =$00000005;
 // DCIO_DC_GENERIC_UNIPHY_FBDIV_CLK_SEL
 DCIO_UNIPHYA_FBDIV_CLK                          =$00000000;
 DCIO_UNIPHYB_FBDIV_CLK                          =$00000001;
 DCIO_UNIPHYC_FBDIV_CLK                          =$00000002;
 DCIO_UNIPHYD_FBDIV_CLK                          =$00000003;
 DCIO_UNIPHYE_FBDIV_CLK                          =$00000004;
 DCIO_UNIPHYF_FBDIV_CLK                          =$00000005;
 // DCIO_DC_GENERIC_UNIPHY_FBDIV_SSC_CLK_SEL
 DCIO_UNIPHYA_FBDIV_SSC_CLK                      =$00000000;
 DCIO_UNIPHYB_FBDIV_SSC_CLK                      =$00000001;
 DCIO_UNIPHYC_FBDIV_SSC_CLK                      =$00000002;
 DCIO_UNIPHYD_FBDIV_SSC_CLK                      =$00000003;
 DCIO_UNIPHYE_FBDIV_SSC_CLK                      =$00000004;
 DCIO_UNIPHYF_FBDIV_SSC_CLK                      =$00000005;
 // DCIO_DC_GENERIC_UNIPHY_REFDIV_CLK_SEL
 DCIO_UNIPHYA_TEST_REFDIV_CLK                    =$00000000;
 DCIO_UNIPHYB_TEST_REFDIV_CLK                    =$00000001;
 DCIO_UNIPHYC_TEST_REFDIV_CLK                    =$00000002;
 DCIO_UNIPHYD_TEST_REFDIV_CLK                    =$00000003;
 DCIO_UNIPHYE_TEST_REFDIV_CLK                    =$00000004;
 DCIO_UNIPHYF_TEST_REFDIV_CLK                    =$00000005;
 // DCIO_DC_GPIO_CHIP_DEBUG_OUT_PIN_SEL
 DCIO_DC_GPIO_CHIP_DEBUG_OUT_PIN_SEL_NORMAL      =$00000000;
 DCIO_DC_GPIO_CHIP_DEBUG_OUT_PIN_SEL_SWAP        =$00000001;
 // DCIO_DC_GPIO_DEBUG_BUS_FLOP_EN
 DCIO_DC_GPIO_DEBUG_BUS_FLOP_EN_BYPASS           =$00000000;
 DCIO_DC_GPIO_DEBUG_BUS_FLOP_EN_ENABLE           =$00000001;
 // DCIO_DC_GPIO_DEBUG_DPRX_LOOPBACK_ENABLE
 DCIO_DPRX_LOOPBACK_ENABLE_NORMAL                =$00000000;
 DCIO_DPRX_LOOPBACK_ENABLE_LOOP                  =$00000001;
 // DCIO_DC_GPIO_MACRO_DEBUG
 DCIO_DC_GPIO_MACRO_DEBUG_NORMAL                 =$00000000;
 DCIO_DC_GPIO_MACRO_DEBUG_CHIP_BIF               =$00000001;
 DCIO_DC_GPIO_MACRO_DEBUG_RESERVED_VALUE2        =$00000002;
 DCIO_DC_GPIO_MACRO_DEBUG_RESERVED_VALUE3        =$00000003;
 // DCIO_DC_GPIO_VIP_DEBUG
 DCIO_DC_GPIO_VIP_DEBUG_NORMAL                   =$00000000;
 DCIO_DC_GPIO_VIP_DEBUG_CG_BIG                   =$00000001;
 // DCIO_DC_GPU_TIMER_READ_SELECT
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D1_V_UPDATE    =$00000000;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE    =$00000001;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D2_V_UPDATE    =$00000002;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D2_V_UPDATE    =$00000003;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D3_V_UPDATE    =$00000004;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D3_V_UPDATE    =$00000005;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D4_V_UPDATE    =$00000006;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D4_V_UPDATE    =$00000007;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D5_V_UPDATE    =$00000008;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D5_V_UPDATE    =$00000009;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D6_V_UPDATE    =$0000000a;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D6_V_UPDATE    =$0000000b;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D1_P_FLIP      =$0000000c;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_P_FLIP      =$0000000d;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D2_P_FLIP      =$0000000e;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D2_P_FLIP      =$0000000f;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D3_P_FLIP      =$00000010;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D3_P_FLIP      =$00000011;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D4_P_FLIP      =$00000012;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D4_P_FLIP      =$00000013;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D5_P_FLIP      =$00000014;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D5_P_FLIP      =$00000015;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D6_P_FLIP      =$00000016;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D6_P_FLIP      =$00000017;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D1_VSYNC_NOM   =$00000018;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_VSYNC_NOM   =$00000019;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D2_VSYNC_NOM   =$0000001a;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D2_VSYNC_NOM   =$0000001b;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D3_VSYNC_NOM   =$0000001c;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D3_VSYNC_NOM   =$0000001d;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D4_VSYNC_NOM   =$0000001e;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D4_VSYNC_NOM   =$0000001f;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D5_VSYNC_NOM   =$00000020;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D5_VSYNC_NOM   =$00000021;
 DCIO_GPU_TIMER_READ_SELECT_LOWER_D6_VSYNC_NOM   =$00000022;
 DCIO_GPU_TIMER_READ_SELECT_UPPER_D6_VSYNC_NOM   =$00000023;
 // DCIO_DC_GPU_TIMER_START_POSITION
 DCIO_GPU_TIMER_START_0_END_27                   =$00000000;
 DCIO_GPU_TIMER_START_1_END_28                   =$00000001;
 DCIO_GPU_TIMER_START_2_END_29                   =$00000002;
 DCIO_GPU_TIMER_START_3_END_30                   =$00000003;
 DCIO_GPU_TIMER_START_4_END_31                   =$00000004;
 DCIO_GPU_TIMER_START_6_END_33                   =$00000005;
 DCIO_GPU_TIMER_START_8_END_35                   =$00000006;
 DCIO_GPU_TIMER_START_10_END_37                  =$00000007;
 // DCIO_DC_PAD_EXTERN_SIG_MVP_PIXEL_SRC_STATUS
 DCIO_MVP_PIXEL_SRC_STATUS_HSYNCA                =$00000000;
 DCIO_MVP_PIXEL_SRC_STATUS_HSYNCA_DUPLICATE      =$00000001;
 DCIO_MVP_PIXEL_SRC_STATUS_CRTC                  =$00000002;
 DCIO_MVP_PIXEL_SRC_STATUS_LB                    =$00000003;
 // DCIO_DC_PAD_EXTERN_SIG_SEL
 DCIO_DC_PAD_EXTERN_SIG_SEL_MVP                  =$00000000;
 DCIO_DC_PAD_EXTERN_SIG_SEL_VSYNCA               =$00000001;
 DCIO_DC_PAD_EXTERN_SIG_SEL_GENLK_CLK            =$00000002;
 DCIO_DC_PAD_EXTERN_SIG_SEL_GENLK_VSYNC          =$00000003;
 DCIO_DC_PAD_EXTERN_SIG_SEL_GENERICA             =$00000004;
 DCIO_DC_PAD_EXTERN_SIG_SEL_GENERICB             =$00000005;
 DCIO_DC_PAD_EXTERN_SIG_SEL_GENERICC             =$00000006;
 DCIO_DC_PAD_EXTERN_SIG_SEL_HPD1                 =$00000007;
 DCIO_DC_PAD_EXTERN_SIG_SEL_HPD2                 =$00000008;
 DCIO_DC_PAD_EXTERN_SIG_SEL_DDC1CLK              =$00000009;
 DCIO_DC_PAD_EXTERN_SIG_SEL_DDC1DATA             =$0000000a;
 DCIO_DC_PAD_EXTERN_SIG_SEL_DDC2CLK              =$0000000b;
 DCIO_DC_PAD_EXTERN_SIG_SEL_DDC2DATA             =$0000000c;
 DCIO_DC_PAD_EXTERN_SIG_SEL_VHAD1                =$0000000d;
 DCIO_DC_PAD_EXTERN_SIG_SEL_VHAD0                =$0000000e;
 DCIO_DC_PAD_EXTERN_SIG_SEL_VPHCTL               =$0000000f;
 // DCIO_DC_REF_CLK_CNTL_GENLK_CLK_OUTPUT_SEL
 DCIO_GENLK_CLK_OUTPUT_SEL_DISABLE               =$00000000;
 DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1                 =$00000001;
 DCIO_GENLK_CLK_OUTPUT_SEL_PPLL2                 =$00000002;
 DCIO_GENLK_CLK_OUTPUT_SEL_RESERVED_VALUE3       =$00000003;
 // DCIO_DC_REF_CLK_CNTL_HSYNCA_OUTPUT_SEL
 DCIO_HSYNCA_OUTPUT_SEL_DISABLE                  =$00000000;
 DCIO_HSYNCA_OUTPUT_SEL_PPLL1                    =$00000001;
 DCIO_HSYNCA_OUTPUT_SEL_PPLL2                    =$00000002;
 DCIO_HSYNCA_OUTPUT_SEL_RESERVED                 =$00000003;
 // DCIO_DPHY_LANE_SEL
 DCIO_DPHY_LANE_SEL_LANE0                        =$00000000;
 DCIO_DPHY_LANE_SEL_LANE1                        =$00000001;
 DCIO_DPHY_LANE_SEL_LANE2                        =$00000002;
 DCIO_DPHY_LANE_SEL_LANE3                        =$00000003;
 // DCIO_DSYNC_SOFT_RESET
 DCIO_DSYNC_SOFT_RESET_DEASSERT                  =$00000000;
 DCIO_DSYNC_SOFT_RESET_ASSERT                    =$00000001;
 // DCIO_GENLK_CLK_GSL_MASK
 DCIO_GENLK_CLK_GSL_MASK_NO                      =$00000000;
 DCIO_GENLK_CLK_GSL_MASK_TIMING                  =$00000001;
 DCIO_GENLK_CLK_GSL_MASK_STEREO                  =$00000002;
 // DCIO_GENLK_VSYNC_GSL_MASK
 DCIO_GENLK_VSYNC_GSL_MASK_NO                    =$00000000;
 DCIO_GENLK_VSYNC_GSL_MASK_TIMING                =$00000001;
 DCIO_GENLK_VSYNC_GSL_MASK_STEREO                =$00000002;
 // DCIO_GSL0_GLOBAL_UNLOCK_SEL
 DCIO_GSL0_GLOBAL_UNLOCK_SEL_INVERSION           =$00000000;
 DCIO_GSL0_GLOBAL_UNLOCK_SEL_GENCLK_VSYNC        =$00000001;
 DCIO_GSL0_GLOBAL_UNLOCK_SEL_GENLK_CLK           =$00000002;
 DCIO_GSL0_GLOBAL_UNLOCK_SEL_SWAPLOCK_A          =$00000003;
 DCIO_GSL0_GLOBAL_UNLOCK_SEL_SWAPLOCK_B          =$00000004;
 // DCIO_GSL0_TIMING_SYNC_SEL
 DCIO_GSL0_TIMING_SYNC_SEL_PIPE                  =$00000000;
 DCIO_GSL0_TIMING_SYNC_SEL_GENCLK_VSYNC          =$00000001;
 DCIO_GSL0_TIMING_SYNC_SEL_GENCLK_CLK            =$00000002;
 DCIO_GSL0_TIMING_SYNC_SEL_SWAPLOCK_A            =$00000003;
 DCIO_GSL0_TIMING_SYNC_SEL_SWAPLOCK_B            =$00000004;
 // DCIO_GSL1_GLOBAL_UNLOCK_SEL
 DCIO_GSL1_GLOBAL_UNLOCK_SEL_INVERSION           =$00000000;
 DCIO_GSL1_GLOBAL_UNLOCK_SEL_GENCLK_VSYNC        =$00000001;
 DCIO_GSL1_GLOBAL_UNLOCK_SEL_GENLK_CLK           =$00000002;
 DCIO_GSL1_GLOBAL_UNLOCK_SEL_SWAPLOCK_A          =$00000003;
 DCIO_GSL1_GLOBAL_UNLOCK_SEL_SWAPLOCK_B          =$00000004;
 // DCIO_GSL1_TIMING_SYNC_SEL
 DCIO_GSL1_TIMING_SYNC_SEL_PIPE                  =$00000000;
 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_VSYNC          =$00000001;
 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK            =$00000002;
 DCIO_GSL1_TIMING_SYNC_SEL_SWAPLOCK_A            =$00000003;
 DCIO_GSL1_TIMING_SYNC_SEL_SWAPLOCK_B            =$00000004;
 // DCIO_GSL2_GLOBAL_UNLOCK_SEL
 DCIO_GSL2_GLOBAL_UNLOCK_SEL_INVERSION           =$00000000;
 DCIO_GSL2_GLOBAL_UNLOCK_SEL_GENCLK_VSYNC        =$00000001;
 DCIO_GSL2_GLOBAL_UNLOCK_SEL_GENLK_CLK           =$00000002;
 DCIO_GSL2_GLOBAL_UNLOCK_SEL_SWAPLOCK_A          =$00000003;
 DCIO_GSL2_GLOBAL_UNLOCK_SEL_SWAPLOCK_B          =$00000004;
 // DCIO_GSL2_TIMING_SYNC_SEL
 DCIO_GSL2_TIMING_SYNC_SEL_PIPE                  =$00000000;
 DCIO_GSL2_TIMING_SYNC_SEL_GENCLK_VSYNC          =$00000001;
 DCIO_GSL2_TIMING_SYNC_SEL_GENCLK_CLK            =$00000002;
 DCIO_GSL2_TIMING_SYNC_SEL_SWAPLOCK_A            =$00000003;
 DCIO_GSL2_TIMING_SYNC_SEL_SWAPLOCK_B            =$00000004;
 // DCIO_GSL_SEL
 DCIO_GSL_SEL_GROUP_0                            =$00000000;
 DCIO_GSL_SEL_GROUP_1                            =$00000001;
 DCIO_GSL_SEL_GROUP_2                            =$00000002;
 // DCIO_GSL_VSYNC_SEL
 DCIO_GSL_VSYNC_SEL_PIPE0                        =$00000000;
 DCIO_GSL_VSYNC_SEL_PIPE1                        =$00000001;
 DCIO_GSL_VSYNC_SEL_PIPE2                        =$00000002;
 DCIO_GSL_VSYNC_SEL_PIPE3                        =$00000003;
 DCIO_GSL_VSYNC_SEL_PIPE4                        =$00000004;
 DCIO_GSL_VSYNC_SEL_PIPE5                        =$00000005;
 // DCIO_IMPCAL_STEP_DELAY
 DCIO_IMPCAL_STEP_DELAY_1us                      =$00000000;
 DCIO_IMPCAL_STEP_DELAY_2us                      =$00000001;
 DCIO_IMPCAL_STEP_DELAY_3us                      =$00000002;
 DCIO_IMPCAL_STEP_DELAY_4us                      =$00000003;
 DCIO_IMPCAL_STEP_DELAY_5us                      =$00000004;
 DCIO_IMPCAL_STEP_DELAY_6us                      =$00000005;
 DCIO_IMPCAL_STEP_DELAY_7us                      =$00000006;
 DCIO_IMPCAL_STEP_DELAY_8us                      =$00000007;
 DCIO_IMPCAL_STEP_DELAY_9us                      =$00000008;
 DCIO_IMPCAL_STEP_DELAY_10us                     =$00000009;
 DCIO_IMPCAL_STEP_DELAY_11us                     =$0000000a;
 DCIO_IMPCAL_STEP_DELAY_12us                     =$0000000b;
 DCIO_IMPCAL_STEP_DELAY_13us                     =$0000000c;
 DCIO_IMPCAL_STEP_DELAY_14us                     =$0000000d;
 DCIO_IMPCAL_STEP_DELAY_15us                     =$0000000e;
 DCIO_IMPCAL_STEP_DELAY_16us                     =$0000000f;
 // DCIO_LVTMA_PWRSEQ_CNTL_DISABLE_SYNCEN_CONTROL_OF_TX_EN
 // DCIO_LVTMA_PWRSEQ_CNTL_LVTMA_BLON
 DCIO_LVTMA_BLON_OFF                             =$00000000;
 DCIO_LVTMA_BLON_ON                              =$00000001;
 // DCIO_LVTMA_PWRSEQ_CNTL_LVTMA_BLON_POL
 DCIO_LVTMA_BLON_POL_NON_INVERT                  =$00000000;
 DCIO_LVTMA_BLON_POL_INVERT                      =$00000001;
 // DCIO_LVTMA_PWRSEQ_CNTL_LVTMA_DIGON
 DCIO_LVTMA_DIGON_OFF                            =$00000000;
 DCIO_LVTMA_DIGON_ON                             =$00000001;
 // DCIO_LVTMA_PWRSEQ_CNTL_LVTMA_DIGON_POL
 DCIO_LVTMA_DIGON_POL_NON_INVERT                 =$00000000;
 DCIO_LVTMA_DIGON_POL_INVERT                     =$00000001;
 // DCIO_LVTMA_PWRSEQ_CNTL_LVTMA_SYNCEN_POL
 DCIO_LVTMA_SYNCEN_POL_NON_INVERT                =$00000000;
 DCIO_LVTMA_SYNCEN_POL_INVERT                    =$00000001;
 // DCIO_LVTMA_PWRSEQ_CNTL_TARGET_STATE
 DCIO_LVTMA_PWRSEQ_TARGET_STATE_LCD_OFF          =$00000000;
 DCIO_LVTMA_PWRSEQ_TARGET_STATE_LCD_ON           =$00000001;
 // DCIO_LVTMA_PWRSEQ_DELAY2_LVTMA_VARY_BL_OVERRIDE_EN
 DCIO_LVTMA_VARY_BL_OVERRIDE_EN_BLON             =$00000000;
 DCIO_LVTMA_VARY_BL_OVERRIDE_EN_SEPARATE         =$00000001;
 // DCIO_SWAPLOCK_A_GSL_MASK
 DCIO_SWAPLOCK_A_GSL_MASK_NO                     =$00000000;
 DCIO_SWAPLOCK_A_GSL_MASK_TIMING                 =$00000001;
 DCIO_SWAPLOCK_A_GSL_MASK_STEREO                 =$00000002;
 // DCIO_SWAPLOCK_B_GSL_MASK
 DCIO_SWAPLOCK_B_GSL_MASK_NO                     =$00000000;
 DCIO_SWAPLOCK_B_GSL_MASK_TIMING                 =$00000001;
 DCIO_SWAPLOCK_B_GSL_MASK_STEREO                 =$00000002;
 // DCIO_UNIPHY_CHANNEL_XBAR_SOURCE
 DCIO_UNIPHY_CHANNEL_XBAR_SOURCE_CH0             =$00000000;
 DCIO_UNIPHY_CHANNEL_XBAR_SOURCE_CH1             =$00000001;
 DCIO_UNIPHY_CHANNEL_XBAR_SOURCE_CH2             =$00000002;
 DCIO_UNIPHY_CHANNEL_XBAR_SOURCE_CH3             =$00000003;
 // DCIO_UNIPHY_IMPCAL_SEL
 DCIO_UNIPHY_IMPCAL_SEL_TEMPERATURE              =$00000000;
 DCIO_UNIPHY_IMPCAL_SEL_BINARY                   =$00000001;
 // DCIO_UNIPHY_LINK_CNTL_CHANNEL_INVERT
 DCIO_UNIPHY_CHANNEL_NO_INVERSION                =$00000000;
 DCIO_UNIPHY_CHANNEL_INVERTED                    =$00000001;
 // DCIO_UNIPHY_LINK_CNTL_ENABLE_HPD_MASK
 DCIO_UNIPHY_LINK_ENABLE_HPD_MASK_DISALLOW       =$00000000;
 DCIO_UNIPHY_LINK_ENABLE_HPD_MASK_ALLOW          =$00000001;
 DCIO_UNIPHY_LINK_ENABLE_HPD_MASK_ALLOW_DEBOUNCED=$00000002;
 // DCIO_UNIPHY_LINK_CNTL_MINIMUM_PIXVLD_LOW_DURATION
 DCIO_UNIPHY_MINIMUM_PIXVLD_LOW_DURATION_3_CLOCKS=$00000000;
 DCIO_UNIPHY_MINIMUM_PIXVLD_LOW_DURATION_7_CLOCKS=$00000001;
 // ENUM_NUM_SIMD_PER_CU
 NUM_SIMD_PER_CU                                 =$00000004;
 // GATCL1RequestType
 GATCL1_TYPE_NORMAL                              =$00000000;
 GATCL1_TYPE_SHOOTDOWN                           =$00000001;
 GATCL1_TYPE_BYPASS                              =$00000002;
 // MEM_PWR_DIS_CTRL
 ENABLE_MEM_PWR_CTRL                             =$00000000;
 DISABLE_MEM_PWR_CTRL                            =$00000001;
 // MEM_PWR_FORCE_CTRL
 NO_FORCE_REQUEST                                =$00000000;
 FORCE_LIGHT_SLEEP_REQUEST                       =$00000001;
 FORCE_DEEP_SLEEP_REQUEST                        =$00000002;
 FORCE_SHUT_DOWN_REQUEST                         =$00000003;
 // MEM_PWR_FORCE_CTRL2
 NO_FORCE_REQ                                    =$00000000;
 FORCE_LIGHT_SLEEP_REQ                           =$00000001;
 // MEM_PWR_SEL_CTRL
 DYNAMIC_SHUT_DOWN_ENABLE                        =$00000000;
 DYNAMIC_DEEP_SLEEP_ENABLE                       =$00000001;
 DYNAMIC_LIGHT_SLEEP_ENABLE                      =$00000002;
 // MEM_PWR_SEL_CTRL2
 DYNAMIC_DEEP_SLEEP_EN                           =$00000000;
 DYNAMIC_LIGHT_SLEEP_EN                          =$00000001;
 // MTYPE
 MTYPE_NC_NV                                     =$00000000;
 MTYPE_NC                                        =$00000001;
 MTYPE_CC                                        =$00000002;
 MTYPE_UC                                        =$00000003;
 // SEM_PERF_SEL
 SEM_PERF_SEL_CYCLE                              =$00000000;
 SEM_PERF_SEL_IDLE                               =$00000001;
 SEM_PERF_SEL_SDMA0_REQ_SIGNAL                   =$00000002;
 SEM_PERF_SEL_SDMA1_REQ_SIGNAL                   =$00000003;
 SEM_PERF_SEL_UVD_REQ_SIGNAL                     =$00000004;
 SEM_PERF_SEL_VCE0_REQ_SIGNAL                    =$00000005;
 SEM_PERF_SEL_ACP_REQ_SIGNAL                     =$00000006;
 SEM_PERF_SEL_ISP_REQ_SIGNAL                     =$00000007;
 SEM_PERF_SEL_VCE1_REQ_SIGNAL                    =$00000008;
 SEM_PERF_SEL_VP8_REQ_SIGNAL                     =$00000009;
 SEM_PERF_SEL_CPG_E0_REQ_SIGNAL                  =$0000000a;
 SEM_PERF_SEL_CPG_E1_REQ_SIGNAL                  =$0000000b;
 SEM_PERF_SEL_CPC1_IMME_E0_REQ_SIGNAL            =$0000000c;
 SEM_PERF_SEL_CPC1_IMME_E1_REQ_SIGNAL            =$0000000d;
 SEM_PERF_SEL_CPC1_IMME_E2_REQ_SIGNAL            =$0000000e;
 SEM_PERF_SEL_CPC1_IMME_E3_REQ_SIGNAL            =$0000000f;
 SEM_PERF_SEL_CPC2_IMME_E0_REQ_SIGNAL            =$00000010;
 SEM_PERF_SEL_CPC2_IMME_E1_REQ_SIGNAL            =$00000011;
 SEM_PERF_SEL_CPC2_IMME_E2_REQ_SIGNAL            =$00000012;
 SEM_PERF_SEL_CPC2_IMME_E3_REQ_SIGNAL            =$00000013;
 SEM_PERF_SEL_SDMA0_REQ_WAIT                     =$00000014;
 SEM_PERF_SEL_SDMA1_REQ_WAIT                     =$00000015;
 SEM_PERF_SEL_UVD_REQ_WAIT                       =$00000016;
 SEM_PERF_SEL_VCE0_REQ_WAIT                      =$00000017;
 SEM_PERF_SEL_ACP_REQ_WAIT                       =$00000018;
 SEM_PERF_SEL_ISP_REQ_WAIT                       =$00000019;
 SEM_PERF_SEL_VCE1_REQ_WAIT                      =$0000001a;
 SEM_PERF_SEL_VP8_REQ_WAIT                       =$0000001b;
 SEM_PERF_SEL_CPG_E0_REQ_WAIT                    =$0000001c;
 SEM_PERF_SEL_CPG_E1_REQ_WAIT                    =$0000001d;
 SEM_PERF_SEL_CPC1_IMME_E0_REQ_WAIT              =$0000001e;
 SEM_PERF_SEL_CPC1_IMME_E1_REQ_WAIT              =$0000001f;
 SEM_PERF_SEL_CPC1_IMME_E2_REQ_WAIT              =$00000020;
 SEM_PERF_SEL_CPC1_IMME_E3_REQ_WAIT              =$00000021;
 SEM_PERF_SEL_CPC2_IMME_E0_REQ_WAIT              =$00000022;
 SEM_PERF_SEL_CPC2_IMME_E1_REQ_WAIT              =$00000023;
 SEM_PERF_SEL_CPC2_IMME_E2_REQ_WAIT              =$00000024;
 SEM_PERF_SEL_CPC2_IMME_E3_REQ_WAIT              =$00000025;
 SEM_PERF_SEL_CPC1_OFFL_E0_REQ_WAIT              =$00000026;
 SEM_PERF_SEL_CPC1_OFFL_E1_REQ_WAIT              =$00000027;
 SEM_PERF_SEL_CPC1_OFFL_E2_REQ_WAIT              =$00000028;
 SEM_PERF_SEL_CPC1_OFFL_E3_REQ_WAIT              =$00000029;
 SEM_PERF_SEL_CPC1_OFFL_E4_REQ_WAIT              =$0000002a;
 SEM_PERF_SEL_CPC1_OFFL_E5_REQ_WAIT              =$0000002b;
 SEM_PERF_SEL_CPC1_OFFL_E6_REQ_WAIT              =$0000002c;
 SEM_PERF_SEL_CPC1_OFFL_E7_REQ_WAIT              =$0000002d;
 SEM_PERF_SEL_CPC1_OFFL_E8_REQ_WAIT              =$0000002e;
 SEM_PERF_SEL_CPC1_OFFL_E9_REQ_WAIT              =$0000002f;
 SEM_PERF_SEL_CPC1_OFFL_E10_REQ_WAIT             =$00000030;
 SEM_PERF_SEL_CPC1_OFFL_E11_REQ_WAIT             =$00000031;
 SEM_PERF_SEL_CPC1_OFFL_E12_REQ_WAIT             =$00000032;
 SEM_PERF_SEL_CPC1_OFFL_E13_REQ_WAIT             =$00000033;
 SEM_PERF_SEL_CPC1_OFFL_E14_REQ_WAIT             =$00000034;
 SEM_PERF_SEL_CPC1_OFFL_E15_REQ_WAIT             =$00000035;
 SEM_PERF_SEL_CPC1_OFFL_E16_REQ_WAIT             =$00000036;
 SEM_PERF_SEL_CPC1_OFFL_E17_REQ_WAIT             =$00000037;
 SEM_PERF_SEL_CPC1_OFFL_E18_REQ_WAIT             =$00000038;
 SEM_PERF_SEL_CPC1_OFFL_E19_REQ_WAIT             =$00000039;
 SEM_PERF_SEL_CPC1_OFFL_E20_REQ_WAIT             =$0000003a;
 SEM_PERF_SEL_CPC1_OFFL_E21_REQ_WAIT             =$0000003b;
 SEM_PERF_SEL_CPC1_OFFL_E22_REQ_WAIT             =$0000003c;
 SEM_PERF_SEL_CPC1_OFFL_E23_REQ_WAIT             =$0000003d;
 SEM_PERF_SEL_CPC1_OFFL_E24_REQ_WAIT             =$0000003e;
 SEM_PERF_SEL_CPC1_OFFL_E25_REQ_WAIT             =$0000003f;
 SEM_PERF_SEL_CPC1_OFFL_E26_REQ_WAIT             =$00000040;
 SEM_PERF_SEL_CPC1_OFFL_E27_REQ_WAIT             =$00000041;
 SEM_PERF_SEL_CPC1_OFFL_E28_REQ_WAIT             =$00000042;
 SEM_PERF_SEL_CPC1_OFFL_E29_REQ_WAIT             =$00000043;
 SEM_PERF_SEL_CPC1_OFFL_E30_REQ_WAIT             =$00000044;
 SEM_PERF_SEL_CPC1_OFFL_E31_REQ_WAIT             =$00000045;
 SEM_PERF_SEL_CPC2_OFFL_E0_REQ_WAIT              =$00000046;
 SEM_PERF_SEL_CPC2_OFFL_E1_REQ_WAIT              =$00000047;
 SEM_PERF_SEL_CPC2_OFFL_E2_REQ_WAIT              =$00000048;
 SEM_PERF_SEL_CPC2_OFFL_E3_REQ_WAIT              =$00000049;
 SEM_PERF_SEL_CPC2_OFFL_E4_REQ_WAIT              =$0000004a;
 SEM_PERF_SEL_CPC2_OFFL_E5_REQ_WAIT              =$0000004b;
 SEM_PERF_SEL_CPC2_OFFL_E6_REQ_WAIT              =$0000004c;
 SEM_PERF_SEL_CPC2_OFFL_E7_REQ_WAIT              =$0000004d;
 SEM_PERF_SEL_CPC2_OFFL_E8_REQ_WAIT              =$0000004e;
 SEM_PERF_SEL_CPC2_OFFL_E9_REQ_WAIT              =$0000004f;
 SEM_PERF_SEL_CPC2_OFFL_E10_REQ_WAIT             =$00000050;
 SEM_PERF_SEL_CPC2_OFFL_E11_REQ_WAIT             =$00000051;
 SEM_PERF_SEL_CPC2_OFFL_E12_REQ_WAIT             =$00000052;
 SEM_PERF_SEL_CPC2_OFFL_E13_REQ_WAIT             =$00000053;
 SEM_PERF_SEL_CPC2_OFFL_E14_REQ_WAIT             =$00000054;
 SEM_PERF_SEL_CPC2_OFFL_E15_REQ_WAIT             =$00000055;
 SEM_PERF_SEL_CPC2_OFFL_E16_REQ_WAIT             =$00000056;
 SEM_PERF_SEL_CPC2_OFFL_E17_REQ_WAIT             =$00000057;
 SEM_PERF_SEL_CPC2_OFFL_E18_REQ_WAIT             =$00000058;
 SEM_PERF_SEL_CPC2_OFFL_E19_REQ_WAIT             =$00000059;
 SEM_PERF_SEL_CPC2_OFFL_E20_REQ_WAIT             =$0000005a;
 SEM_PERF_SEL_CPC2_OFFL_E21_REQ_WAIT             =$0000005b;
 SEM_PERF_SEL_CPC2_OFFL_E22_REQ_WAIT             =$0000005c;
 SEM_PERF_SEL_CPC2_OFFL_E23_REQ_WAIT             =$0000005d;
 SEM_PERF_SEL_CPC2_OFFL_E24_REQ_WAIT             =$0000005e;
 SEM_PERF_SEL_CPC2_OFFL_E25_REQ_WAIT             =$0000005f;
 SEM_PERF_SEL_CPC2_OFFL_E26_REQ_WAIT             =$00000060;
 SEM_PERF_SEL_CPC2_OFFL_E27_REQ_WAIT             =$00000061;
 SEM_PERF_SEL_CPC2_OFFL_E28_REQ_WAIT             =$00000062;
 SEM_PERF_SEL_CPC2_OFFL_E29_REQ_WAIT             =$00000063;
 SEM_PERF_SEL_CPC2_OFFL_E30_REQ_WAIT             =$00000064;
 SEM_PERF_SEL_CPC2_OFFL_E31_REQ_WAIT             =$00000065;
 SEM_PERF_SEL_CPC1_OFFL_E0_POLL_WAIT             =$00000066;
 SEM_PERF_SEL_CPC1_OFFL_E1_POLL_WAIT             =$00000067;
 SEM_PERF_SEL_CPC1_OFFL_E2_POLL_WAIT             =$00000068;
 SEM_PERF_SEL_CPC1_OFFL_E3_POLL_WAIT             =$00000069;
 SEM_PERF_SEL_CPC1_OFFL_E4_POLL_WAIT             =$0000006a;
 SEM_PERF_SEL_CPC1_OFFL_E5_POLL_WAIT             =$0000006b;
 SEM_PERF_SEL_CPC1_OFFL_E6_POLL_WAIT             =$0000006c;
 SEM_PERF_SEL_CPC1_OFFL_E7_POLL_WAIT             =$0000006d;
 SEM_PERF_SEL_CPC1_OFFL_E8_POLL_WAIT             =$0000006e;
 SEM_PERF_SEL_CPC1_OFFL_E9_POLL_WAIT             =$0000006f;
 SEM_PERF_SEL_CPC1_OFFL_E10_POLL_WAIT            =$00000070;
 SEM_PERF_SEL_CPC1_OFFL_E11_POLL_WAIT            =$00000071;
 SEM_PERF_SEL_CPC1_OFFL_E12_POLL_WAIT            =$00000072;
 SEM_PERF_SEL_CPC1_OFFL_E13_POLL_WAIT            =$00000073;
 SEM_PERF_SEL_CPC1_OFFL_E14_POLL_WAIT            =$00000074;
 SEM_PERF_SEL_CPC1_OFFL_E15_POLL_WAIT            =$00000075;
 SEM_PERF_SEL_CPC1_OFFL_E16_POLL_WAIT            =$00000076;
 SEM_PERF_SEL_CPC1_OFFL_E17_POLL_WAIT            =$00000077;
 SEM_PERF_SEL_CPC1_OFFL_E18_POLL_WAIT            =$00000078;
 SEM_PERF_SEL_CPC1_OFFL_E19_POLL_WAIT            =$00000079;
 SEM_PERF_SEL_CPC1_OFFL_E20_POLL_WAIT            =$0000007a;
 SEM_PERF_SEL_CPC1_OFFL_E21_POLL_WAIT            =$0000007b;
 SEM_PERF_SEL_CPC1_OFFL_E22_POLL_WAIT            =$0000007c;
 SEM_PERF_SEL_CPC1_OFFL_E23_POLL_WAIT            =$0000007d;
 SEM_PERF_SEL_CPC1_OFFL_E24_POLL_WAIT            =$0000007e;
 SEM_PERF_SEL_CPC1_OFFL_E25_POLL_WAIT            =$0000007f;
 SEM_PERF_SEL_CPC1_OFFL_E26_POLL_WAIT            =$00000080;
 SEM_PERF_SEL_CPC1_OFFL_E27_POLL_WAIT            =$00000081;
 SEM_PERF_SEL_CPC1_OFFL_E28_POLL_WAIT            =$00000082;
 SEM_PERF_SEL_CPC1_OFFL_E29_POLL_WAIT            =$00000083;
 SEM_PERF_SEL_CPC1_OFFL_E30_POLL_WAIT            =$00000084;
 SEM_PERF_SEL_CPC1_OFFL_E31_POLL_WAIT            =$00000085;
 SEM_PERF_SEL_CPC2_OFFL_E0_POLL_WAIT             =$00000086;
 SEM_PERF_SEL_CPC2_OFFL_E1_POLL_WAIT             =$00000087;
 SEM_PERF_SEL_CPC2_OFFL_E2_POLL_WAIT             =$00000088;
 SEM_PERF_SEL_CPC2_OFFL_E3_POLL_WAIT             =$00000089;
 SEM_PERF_SEL_CPC2_OFFL_E4_POLL_WAIT             =$0000008a;
 SEM_PERF_SEL_CPC2_OFFL_E5_POLL_WAIT             =$0000008b;
 SEM_PERF_SEL_CPC2_OFFL_E6_POLL_WAIT             =$0000008c;
 SEM_PERF_SEL_CPC2_OFFL_E7_POLL_WAIT             =$0000008d;
 SEM_PERF_SEL_CPC2_OFFL_E8_POLL_WAIT             =$0000008e;
 SEM_PERF_SEL_CPC2_OFFL_E9_POLL_WAIT             =$0000008f;
 SEM_PERF_SEL_CPC2_OFFL_E10_POLL_WAIT            =$00000090;
 SEM_PERF_SEL_CPC2_OFFL_E11_POLL_WAIT            =$00000091;
 SEM_PERF_SEL_CPC2_OFFL_E12_POLL_WAIT            =$00000092;
 SEM_PERF_SEL_CPC2_OFFL_E13_POLL_WAIT            =$00000093;
 SEM_PERF_SEL_CPC2_OFFL_E14_POLL_WAIT            =$00000094;
 SEM_PERF_SEL_CPC2_OFFL_E15_POLL_WAIT            =$00000095;
 SEM_PERF_SEL_CPC2_OFFL_E16_POLL_WAIT            =$00000096;
 SEM_PERF_SEL_CPC2_OFFL_E17_POLL_WAIT            =$00000097;
 SEM_PERF_SEL_CPC2_OFFL_E18_POLL_WAIT            =$00000098;
 SEM_PERF_SEL_CPC2_OFFL_E19_POLL_WAIT            =$00000099;
 SEM_PERF_SEL_CPC2_OFFL_E20_POLL_WAIT            =$0000009a;
 SEM_PERF_SEL_CPC2_OFFL_E21_POLL_WAIT            =$0000009b;
 SEM_PERF_SEL_CPC2_OFFL_E22_POLL_WAIT            =$0000009c;
 SEM_PERF_SEL_CPC2_OFFL_E23_POLL_WAIT            =$0000009d;
 SEM_PERF_SEL_CPC2_OFFL_E24_POLL_WAIT            =$0000009e;
 SEM_PERF_SEL_CPC2_OFFL_E25_POLL_WAIT            =$0000009f;
 SEM_PERF_SEL_CPC2_OFFL_E26_POLL_WAIT            =$000000a0;
 SEM_PERF_SEL_CPC2_OFFL_E27_POLL_WAIT            =$000000a1;
 SEM_PERF_SEL_CPC2_OFFL_E28_POLL_WAIT            =$000000a2;
 SEM_PERF_SEL_CPC2_OFFL_E29_POLL_WAIT            =$000000a3;
 SEM_PERF_SEL_CPC2_OFFL_E30_POLL_WAIT            =$000000a4;
 SEM_PERF_SEL_CPC2_OFFL_E31_POLL_WAIT            =$000000a5;
 SEM_PERF_SEL_MC_RD_REQ                          =$000000a6;
 SEM_PERF_SEL_MC_RD_RET                          =$000000a7;
 SEM_PERF_SEL_MC_WR_REQ                          =$000000a8;
 SEM_PERF_SEL_MC_WR_RET                          =$000000a9;
 SEM_PERF_SEL_ATC_REQ                            =$000000aa;
 SEM_PERF_SEL_ATC_RET                            =$000000ab;
 SEM_PERF_SEL_ATC_XNACK                          =$000000ac;
 SEM_PERF_SEL_ATC_INVALIDATION                   =$000000ad;
 // SH_MEM_ADDRESS_MODE
 SH_MEM_ADDRESS_MODE_GPUVM64                     =$00000000;
 SH_MEM_ADDRESS_MODE_GPUVM32                     =$00000001;
 SH_MEM_ADDRESS_MODE_HSA64                       =$00000002;
 SH_MEM_ADDRESS_MODE_HSA32                       =$00000003;
 // SQ_EDC_INFO_SOURCE
 SQ_EDC_INFO_SOURCE_INVALID                      =$00000000;
 SQ_EDC_INFO_SOURCE_INST                         =$00000001;
 SQ_EDC_INFO_SOURCE_SGPR                         =$00000002;
 SQ_EDC_INFO_SOURCE_VGPR                         =$00000003;
 SQ_EDC_INFO_SOURCE_LDS                          =$00000004;
 SQ_EDC_INFO_SOURCE_GDS                          =$00000005;
 SQ_EDC_INFO_SOURCE_TA                           =$00000006;
 // SQ_THREAD_TRACE_WAVE_START_COUNT_PREFIX
 SQ_THREAD_TRACE_WAVE_START_COUNT_PREFIX_WREXEC  =$00000018;
 SQ_THREAD_TRACE_WAVE_START_COUNT_PREFIX_RESTORE =$00000019;
 // SRBM_GFX_CNTL_SEL
 SRBM_GFX_CNTL_BIF                               =$00000000;
 SRBM_GFX_CNTL_SDMA0                             =$00000001;
 SRBM_GFX_CNTL_SDMA1                             =$00000002;
 SRBM_GFX_CNTL_GRBM                              =$00000003;
 SRBM_GFX_CNTL_UVD                               =$00000004;
 SRBM_GFX_CNTL_VCE0                              =$00000005;
 SRBM_GFX_CNTL_VCE1                              =$00000006;
 SRBM_GFX_CNTL_ACP                               =$00000007;
 SRBM_GFX_CNTL_SMU                               =$00000008;
 SRBM_GFX_CNTL_SAMMSP                            =$00000009;
 SRBM_GFX_CNTL_SAMSCP                            =$0000000a;
 SRBM_GFX_CNTL_ISP                               =$0000000b;
 SRBM_GFX_CNTL_TST                               =$0000000c;
 SRBM_GFX_CNTL_SDMA2                             =$0000000d;
 SRBM_GFX_CNTL_SDMA3                             =$0000000e;
 // SX_BLEND_OPT
 BLEND_OPT_PRESERVE_NONE_IGNORE_ALL              =$00000000;
 BLEND_OPT_PRESERVE_ALL_IGNORE_NONE              =$00000001;
 BLEND_OPT_PRESERVE_C1_IGNORE_C0                 =$00000002;
 BLEND_OPT_PRESERVE_C0_IGNORE_C1                 =$00000003;
 BLEND_OPT_PRESERVE_A1_IGNORE_A0                 =$00000004;
 BLEND_OPT_PRESERVE_A0_IGNORE_A1                 =$00000005;
 BLEND_OPT_PRESERVE_NONE_IGNORE_A0               =$00000006;
 BLEND_OPT_PRESERVE_NONE_IGNORE_NONE             =$00000007;
 // SX_DOWNCONVERT_FORMAT
 SX_RT_EXPORT_NO_CONVERSION                      =$00000000;
 SX_RT_EXPORT_32_R                               =$00000001;
 SX_RT_EXPORT_32_A                               =$00000002;
 SX_RT_EXPORT_10_11_11                           =$00000003;
 SX_RT_EXPORT_2_10_10_10                         =$00000004;
 SX_RT_EXPORT_8_8_8_8                            =$00000005;
 SX_RT_EXPORT_5_6_5                              =$00000006;
 SX_RT_EXPORT_1_5_5_5                            =$00000007;
 SX_RT_EXPORT_4_4_4_4                            =$00000008;
 SX_RT_EXPORT_16_16_GR                           =$00000009;
 SX_RT_EXPORT_16_16_AR                           =$0000000a;
 // SX_OPT_COMB_FCN
 OPT_COMB_NONE                                   =$00000000;
 OPT_COMB_ADD                                    =$00000001;
 OPT_COMB_SUBTRACT                               =$00000002;
 OPT_COMB_MIN                                    =$00000003;
 OPT_COMB_MAX                                    =$00000004;
 OPT_COMB_REVSUBTRACT                            =$00000005;
 OPT_COMB_BLEND_DISABLED                         =$00000006;
 OPT_COMB_SAFE_ADD                               =$00000007;
 // SYS_GRBM_GFX_INDEX_SEL
 GRBM_GFX_INDEX_BIF                              =$00000000;
 GRBM_GFX_INDEX_SDMA0                            =$00000001;
 GRBM_GFX_INDEX_SDMA1                            =$00000002;
 RESEVERED0                                      =$00000003;
 GRBM_GFX_INDEX_UVD                              =$00000004;
 GRBM_GFX_INDEX_VCE0                             =$00000005;
 GRBM_GFX_INDEX_VCE1                             =$00000006;
 GRBM_GFX_INDEX_ACP                              =$00000007;
 GRBM_GFX_INDEX_SMU                              =$00000008;
 GRBM_GFX_INDEX_SAMMSP                           =$00000009;
 GRBM_GFX_INDEX_SAMSCP                           =$0000000a;
 GRBM_GFX_INDEX_ISP                              =$0000000b;
 GRBM_GFX_INDEX_TST                              =$0000000c;
 GRBM_GFX_INDEX_SDMA2                            =$0000000d;
 GRBM_GFX_INDEX_SDMA3                            =$0000000e;
 // TCP_DSM_DATA_SEL
 TCP_DSM_DISABLE                                 =$00000000;
 TCP_DSM_SEL0                                    =$00000001;
 TCP_DSM_SEL1                                    =$00000002;
 TCP_DSM_SEL_BOTH                                =$00000003;
 // TCP_DSM_SINGLE_WRITE
 TCP_DSM_SINGLE_WRITE_EN                         =$00000001;
 // VGT_DIST_MODE
 NO_DIST                                         =$00000000;
 PATCHES                                         =$00000001;
 DONUTS                                          =$00000002;
 TRAPEZOIDS                                      =$00000003;
 // WD_IA_DRAW_SOURCE
 WD_IA_DRAW_SOURCE_DMA                           =$00000000;
 WD_IA_DRAW_SOURCE_IMMD                          =$00000001;
 WD_IA_DRAW_SOURCE_AUTO                          =$00000002;
 WD_IA_DRAW_SOURCE_OPAQ                          =$00000003;

implementation

end.

