123 lines
4.8 KiB
C
123 lines
4.8 KiB
C
// ******************************************************************
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// *
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// * proj : OpenXDK
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// *
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// * desc : Open Source XBox Development Kit
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// *
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// * file : xvga_internal.h
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// *
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// * note : XBox VGA
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// *
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// ******************************************************************
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#ifndef XVGA_DEF_H
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#define XVGA_DEF_H
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#include "openxdk.h"
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#if defined(__cplusplus)
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extern "C"
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{
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#endif
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// ******************************************************************
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// * vga register flat addresses
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// ******************************************************************
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static volatile char * const P_ATTR_REG_INDEX = (char * const)0xFD6013c0;
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static volatile char * const P_ATTR_REG_DATA = (char * const)0xFD6013c1;
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static volatile char * const P_CRTC_REG_INDEX = (char * const)0xFD6013d4;
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static volatile char * const P_CRTC_REG_DATA = (char * const)0xFD6013d5;
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static volatile char * const P_VERTICAL_BLANK = (char * const)0xFD6013DA;
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static volatile char * const P_GRA_REG_INDEX = (char * const)0xFD0c03ce;
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static volatile char * const P_GRA_REG_DATA = (char * const)0xFD0c03cf;
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static volatile char * const P_SEQ_REG_INDEX = (char * const)0xFD0c03c4;
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static volatile char * const P_SEQ_REG_DATA = (char * const)0xFD0c03c5;
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static volatile char * const P_MISC_REG = (char * const)0xFD0c03c2;
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// ******************************************************************
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// * vga_reg
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// ******************************************************************
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typedef struct _vga_reg
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{
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unsigned short port;
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unsigned char index;
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unsigned char value;
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}
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vga_reg;
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// ******************************************************************
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// * vga mode definitions
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// ******************************************************************
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extern vga_reg xvga_mode_256x240[];
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extern vga_reg xvga_mode_320x240[];
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extern vga_reg xvga_mode_320x200[];
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// ******************************************************************
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// * mode sizes
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// ******************************************************************
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extern uint32 MODE256x240SIZE;
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extern uint32 MODE320x240SIZE;
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extern uint32 MODE320x200SIZE;
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// ******************************************************************
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// * NVidia registers base / offsets
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// ******************************************************************
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#define NV_REGBASE (0xFD000000)
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#define NV_PMC (0x00000000)
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#define NV_PFIFO (0x00002000)
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#define NV_FB (0x00100000)
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#define NV_EXTDEV (0x00101000)
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#define NV_CRTC (0x00600000)
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#define NV_RAMDAC (0x00680000)
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#define NV_FIFO (0x00800000)
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#define NV_MISC (0x000C0000)
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// ******************************************************************
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// * vga registers
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// ******************************************************************
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static const int ATTR_REG_INDEX = 0x13c0;
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static const int ATTR_REG_DATA = 0x13c1;
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static const int CRTC_REG_INDEX = 0x13d4;
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static const int CRTC_REG_DATA = 0x13d5;
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static const int FB_REG = 0x0800;
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static const int VERTICAL_BLANK = 0x13DA;
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static const int GRA_REG_INDEX = 0x03ce;
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static const int GRA_REG_DATA = 0x03cf;
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static const int SEQ_REG_INDEX = 0x03c4;
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static const int SEQ_REG_DATA = 0x03c5;
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static const int MISC_REG = 0x03c2;
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// ******************************************************************
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// * CRTC register accessors
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// ******************************************************************
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#define CRTC_READ(a) (*((volatile uint08*)(NV_REGBASE + NV_CRTC + (a))))
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#define CRTC_READL(a) (*((volatile uint32*)(NV_REGBASE + NV_CRTC + (a))))
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#define CRTC_WRITE(a,b) *((volatile uint08*)(NV_REGBASE + NV_CRTC + (a))) = (b)
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#define CRTC_WRITEL(a,b) *((volatile uint32*)(NV_REGBASE + NV_CRTC + (a))) = (b)
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// ******************************************************************
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// * ATTR register accessors
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// ******************************************************************
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#define ATTR_READ(a) (*((volatile uint08*)(NV_REGBASE + NV_CRTC + (a))))
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#define ATTR_READL(a) (*((volatile uint32*)(NV_REGBASE + NV_CRTC + (a))))
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#define ATTR_WRITE(a,b) *((volatile uint08*)(NV_REGBASE + NV_CRTC + (a))) = (b)
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#define ATTR_WRITEL(a,b) *((volatile uint32*)(NV_REGBASE + NV_CRTC + (a))) = (b)
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// ******************************************************************
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// * MISC register accessors
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// ******************************************************************
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#define MISC_READ(a) (*((volatile uint08*)(NV_REGBASE + NV_MISC + (a))))
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#define MISC_READL(a) (*((volatile uint32*)(NV_REGBASE + NV_MISC + (a))))
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#define MISC_WRITE(a,b) *((volatile uint08*)(NV_REGBASE + NV_MISC + (a))) = (b)
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#define MISC_WRITEL(a,b) *((volatile uint32*)(NV_REGBASE + NV_MISC + (a))) = (b)
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// ******************************************************************
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// * frame buffer
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// ******************************************************************
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#define FRAMEBUFFER ((void*)(0xF0040240))
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#if defined(__cplusplus)
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}
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#endif
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#endif
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