Removed one unnecessary intermediate vertex shader decoding layer
This commit is contained in:
patrickvl
parent
5fe0a16cc6
commit
eeced5f0a9
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@ -204,45 +204,6 @@ typedef enum _VSH_MAC
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}
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VSH_MAC;
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typedef struct _VSH_PARAMETER
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{
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VSH_PARAMETER_TYPE ParameterType; // Parameter type, R, V or C
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bool Neg; // true if negated, false if not
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VSH_SWIZZLE Swizzle[4]; // The four swizzles
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int16_t Address; // Register address
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}
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VSH_PARAMETER;
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typedef struct _VSH_OUTPUT
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{
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// Output register
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VSH_OUTPUT_MUX OutputMux; // MAC or ILU used as output
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VSH_OUTPUT_TYPE OutputType; // C or O
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int8_t OutputMask;
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int16_t OutputAddress;
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// MAC output Mask
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int8_t MACRMask;
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// ILU output mask
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int8_t ILURMask;
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// MAC,ILU output R register
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int16_t RAddress;
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}
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VSH_OUTPUT;
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// The raw, parsed shader instruction (can be many combined [paired] instructions)
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typedef struct _VSH_SHADER_INSTRUCTION
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{
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VSH_ILU ILU;
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VSH_MAC MAC;
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VSH_OUTPUT Output;
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VSH_PARAMETER A;
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VSH_PARAMETER B;
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VSH_PARAMETER C;
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bool a0x;
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bool Final;
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}
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VSH_SHADER_INSTRUCTION;
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typedef enum _VSH_IMD_INSTRUCTION_TYPE
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{
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IMD_MAC,
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@ -260,8 +221,11 @@ VSH_IMD_OUTPUT;
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typedef struct _VSH_IMD_PARAMETER
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{
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bool Active;
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VSH_PARAMETER Parameter;
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bool Active;
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VSH_PARAMETER_TYPE ParameterType; // Parameter type, R, V or C
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bool Neg; // true if negated, false if not
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VSH_SWIZZLE Swizzle[4]; // The four swizzles
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int16_t Address; // Register address
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}
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VSH_IMD_PARAMETER;
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@ -373,188 +337,183 @@ static inline int16_t ConvertCRegister(const int16_t CReg)
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{
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return ((((CReg >> 5) & 7) - 3) * 32) + (CReg & 31);
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}
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static void VshParseInstruction(
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uint32_t *pShaderToken,
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VSH_SHADER_INSTRUCTION *pInstruction)
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{
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// First get the instruction(s).
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pInstruction->ILU = (VSH_ILU)VshGetField(pShaderToken, FLD_ILU);
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pInstruction->MAC = (VSH_MAC)VshGetField(pShaderToken, FLD_MAC);
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// Get parameter A
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pInstruction->A.ParameterType = (VSH_PARAMETER_TYPE)VshGetField(pShaderToken, FLD_A_MUX);
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switch(pInstruction->A.ParameterType)
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{
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case PARAM_R:
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pInstruction->A.Address = VshGetField(pShaderToken, FLD_A_R);
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break;
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case PARAM_V:
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pInstruction->A.Address = VshGetField(pShaderToken, FLD_V);
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break;
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case PARAM_C:
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pInstruction->A.Address = ConvertCRegister(VshGetField(pShaderToken, FLD_CONST));
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break;
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default:
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EmuLog(LOG_LEVEL::WARNING, "Invalid instruction, parameter A type unknown %d", pInstruction->A.ParameterType);
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return;
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}
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pInstruction->A.Neg = VshGetField(pShaderToken, FLD_A_NEG);
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pInstruction->A.Swizzle[0] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_A_SWZ_X);
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pInstruction->A.Swizzle[1] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_A_SWZ_Y);
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pInstruction->A.Swizzle[2] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_A_SWZ_Z);
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pInstruction->A.Swizzle[3] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_A_SWZ_W);
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// Get parameter B
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pInstruction->B.ParameterType = (VSH_PARAMETER_TYPE)VshGetField(pShaderToken, FLD_B_MUX);
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switch(pInstruction->B.ParameterType)
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{
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case PARAM_R:
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pInstruction->B.Address = VshGetField(pShaderToken, FLD_B_R);
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break;
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case PARAM_V:
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pInstruction->B.Address = VshGetField(pShaderToken, FLD_V);
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break;
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case PARAM_C:
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pInstruction->B.Address = ConvertCRegister(VshGetField(pShaderToken, FLD_CONST));
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break;
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default:
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DbgVshPrintf("Invalid instruction, parameter B type unknown %d\n", pInstruction->B.ParameterType);
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return;
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}
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pInstruction->B.Neg = VshGetField(pShaderToken, FLD_B_NEG);
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pInstruction->B.Swizzle[0] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_B_SWZ_X);
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pInstruction->B.Swizzle[1] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_B_SWZ_Y);
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pInstruction->B.Swizzle[2] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_B_SWZ_Z);
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pInstruction->B.Swizzle[3] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_B_SWZ_W);
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// Get parameter C
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pInstruction->C.ParameterType = (VSH_PARAMETER_TYPE)VshGetField(pShaderToken, FLD_C_MUX);
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switch(pInstruction->C.ParameterType)
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{
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case PARAM_R:
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pInstruction->C.Address = VshGetField(pShaderToken, FLD_C_R_HIGH) << 2 |
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VshGetField(pShaderToken, FLD_C_R_LOW);
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break;
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case PARAM_V:
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pInstruction->C.Address = VshGetField(pShaderToken, FLD_V);
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break;
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case PARAM_C:
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pInstruction->C.Address = ConvertCRegister(VshGetField(pShaderToken, FLD_CONST));
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break;
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default:
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DbgVshPrintf("Invalid instruction, parameter C type unknown %d\n", pInstruction->C.ParameterType);
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return;
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}
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pInstruction->C.Neg = VshGetField(pShaderToken, FLD_C_NEG);
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pInstruction->C.Swizzle[0] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_C_SWZ_X);
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pInstruction->C.Swizzle[1] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_C_SWZ_Y);
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pInstruction->C.Swizzle[2] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_C_SWZ_Z);
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pInstruction->C.Swizzle[3] = (VSH_SWIZZLE)VshGetField(pShaderToken, FLD_C_SWZ_W);
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// Get output
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// Output register
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pInstruction->Output.OutputType = (VSH_OUTPUT_TYPE)VshGetField(pShaderToken, FLD_OUT_ORB);
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switch(pInstruction->Output.OutputType)
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{
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case OUTPUT_C:
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pInstruction->Output.OutputAddress = ConvertCRegister(VshGetField(pShaderToken, FLD_OUT_ADDRESS));
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break;
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case OUTPUT_O:
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pInstruction->Output.OutputAddress = VshGetField(pShaderToken, FLD_OUT_ADDRESS) & 0xF;
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break;
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}
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pInstruction->Output.OutputMux = (VSH_OUTPUT_MUX)VshGetField(pShaderToken, FLD_OUT_MUX);
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pInstruction->Output.OutputMask = VshGetField(pShaderToken, FLD_OUT_O_MASK);
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pInstruction->Output.MACRMask = VshGetField(pShaderToken, FLD_OUT_MAC_MASK);
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pInstruction->Output.ILURMask = VshGetField(pShaderToken, FLD_OUT_ILU_MASK);
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pInstruction->Output.RAddress = VshGetField(pShaderToken, FLD_OUT_R);
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// Finally, get a0.x indirect constant addressing
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pInstruction->a0x = VshGetField(pShaderToken, FLD_A0X);
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pInstruction->Final = VshGetField(pShaderToken, FLD_FINAL);
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}
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static void VshAddIntermediateOpcode(
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VSH_SHADER_INSTRUCTION* pInstruction,
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VSH_XBOX_SHADER* pShader,
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VSH_IMD_INSTRUCTION_TYPE instr_type,
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VSH_IMD_OUTPUT_TYPE output_type,
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int16_t output_address,
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int8_t output_mask)
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{
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// Is the output mask set?
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if (output_mask == 0) {
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return;
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static void VshConvertIntermediateParam(VSH_IMD_PARAMETER& Param,
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uint32_t* pShaderToken,
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VSH_FIELD_NAME FLD_MUX,
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VSH_FIELD_NAME FLD_NEG,
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uint16_t R,
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uint16_t V,
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uint16_t C)
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{
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Param.Active = true;
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Param.ParameterType = (VSH_PARAMETER_TYPE)VshGetField(pShaderToken, FLD_MUX);
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switch (Param.ParameterType) {
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case PARAM_R:
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Param.Address = R;
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break;
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case PARAM_V:
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Param.Address = V;
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break;
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case PARAM_C:
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Param.Address = C;
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break;
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default:
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LOG_TEST_CASE("parameter type unknown");
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}
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if(pShader->IntermediateCount >= VSH_MAX_INTERMEDIATE_COUNT) {
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CxbxKrnlCleanup("Shader exceeds conversion buffer!");
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}
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VSH_MAC MAC = (instr_type == IMD_MAC) ? pInstruction->MAC : MAC_NOP;
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VSH_ILU ILU = (instr_type == IMD_ILU) ? pInstruction->ILU : ILU_NOP;
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VSH_INTERMEDIATE_FORMAT* pIntermediate = &pShader->Intermediate[pShader->IntermediateCount++];
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int d = FLD_NEG - FLD_A_NEG;
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Param.Neg = VshGetField(pShaderToken, (VSH_FIELD_NAME)(d + FLD_A_NEG));
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Param.Swizzle[0] = (VSH_SWIZZLE)VshGetField(pShaderToken, (VSH_FIELD_NAME)(d + FLD_A_SWZ_X));
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Param.Swizzle[1] = (VSH_SWIZZLE)VshGetField(pShaderToken, (VSH_FIELD_NAME)(d + FLD_A_SWZ_Y));
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Param.Swizzle[2] = (VSH_SWIZZLE)VshGetField(pShaderToken, (VSH_FIELD_NAME)(d + FLD_A_SWZ_Z));
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Param.Swizzle[3] = (VSH_SWIZZLE)VshGetField(pShaderToken, (VSH_FIELD_NAME)(d + FLD_A_SWZ_W));
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}
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pIntermediate->InstructionType = instr_type;
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pIntermediate->MAC = MAC;
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pIntermediate->ILU = ILU;
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pIntermediate->Output.Type = output_type;
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pIntermediate->Output.Address = output_address;
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pIntermediate->Output.Mask = output_mask;
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pIntermediate->IndexesWithA0_X = pInstruction->a0x;
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static void VshConvertIntermediateParams(
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VSH_INTERMEDIATE_FORMAT *pIntermediate,
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uint32_t* pShaderToken)
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{
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// Get a0.x indirect constant addressing
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pIntermediate->IndexesWithA0_X = VshGetField(pShaderToken, FLD_A0X) > 0;
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int16_t R;
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int16_t V = VshGetField(pShaderToken, FLD_V);
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int16_t C = ConvertCRegister(VshGetField(pShaderToken, FLD_CONST));
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uint8_t ParamCount = 0;
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// Parameters[0].Active will always be set, but [1] and [2] may not, so reset them:
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pIntermediate->Parameters[1].Active = false;
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pIntermediate->Parameters[2].Active = false;
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uint8_t ParamCount = 0;
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if(MAC >= MAC_MOV) {
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pIntermediate->Parameters[ParamCount].Parameter = pInstruction->A;
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pIntermediate->Parameters[ParamCount++].Active = true;
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if(pIntermediate->MAC >= MAC_MOV) {
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// Get parameter A
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R = VshGetField(pShaderToken, FLD_A_R);
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VshConvertIntermediateParam(pIntermediate->Parameters[ParamCount++], pShaderToken, FLD_A_MUX, FLD_A_NEG, R, V, C);
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}
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if((MAC == MAC_MUL) || ((MAC >= MAC_MAD) && (MAC <= MAC_SGE))) {
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pIntermediate->Parameters[ParamCount].Parameter = pInstruction->B;
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pIntermediate->Parameters[ParamCount++].Active = true;
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if((pIntermediate->MAC == MAC_MUL) || ((pIntermediate->MAC >= MAC_MAD) && (pIntermediate->MAC <= MAC_SGE))) {
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// Get parameter B
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R = VshGetField(pShaderToken, FLD_B_R);
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VshConvertIntermediateParam(pIntermediate->Parameters[ParamCount++], pShaderToken, FLD_B_MUX, FLD_B_NEG, R, V, C);
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}
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if((ILU >= ILU_MOV) || (MAC == MAC_ADD) || (MAC == MAC_MAD)) {
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pIntermediate->Parameters[ParamCount].Parameter = pInstruction->C;
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pIntermediate->Parameters[ParamCount++].Active = true;
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if((pIntermediate->ILU >= ILU_MOV) || (pIntermediate->MAC == MAC_ADD) || (pIntermediate->MAC == MAC_MAD)) {
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// Get parameter C
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R = VshGetField(pShaderToken, FLD_C_R_HIGH) << 2 | VshGetField(pShaderToken, FLD_C_R_LOW);
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VshConvertIntermediateParam(pIntermediate->Parameters[ParamCount++], pShaderToken, FLD_C_MUX, FLD_C_NEG, R, V, C);
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}
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}
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static void VshConvertToIntermediate(
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VSH_SHADER_INSTRUCTION *pInstruction,
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VSH_XBOX_SHADER *pShader)
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static VSH_INTERMEDIATE_FORMAT* VshAddIntermediateInstruction(
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VSH_XBOX_SHADER* pShader,
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VSH_IMD_OUTPUT_TYPE output_type,
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int16_t output_address,
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int8_t output_mask)
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{
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// Is the output mask set?
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if (output_mask == 0) {
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return nullptr;
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}
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if (pShader->IntermediateCount >= VSH_MAX_INTERMEDIATE_COUNT) {
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CxbxKrnlCleanup("Shader exceeds conversion buffer!");
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}
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VSH_INTERMEDIATE_FORMAT* pIntermediate = &(pShader->Intermediate[pShader->IntermediateCount++]);
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pIntermediate->Output.Type = output_type;
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pIntermediate->Output.Address = output_address;
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pIntermediate->Output.Mask = output_mask;
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return pIntermediate;
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}
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static void VshAddIntermediateMACOpcode(
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VSH_XBOX_SHADER* pShader,
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uint32_t* pShaderToken,
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VSH_MAC MAC,
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VSH_IMD_OUTPUT_TYPE output_type,
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int16_t output_address,
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int8_t output_mask)
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{
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VSH_INTERMEDIATE_FORMAT* pIntermediate = VshAddIntermediateInstruction(pShader, output_type, output_address, output_mask);
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if (!pIntermediate) return;
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pIntermediate->InstructionType = IMD_MAC;
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pIntermediate->MAC = MAC;
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pIntermediate->ILU = ILU_NOP;
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VshConvertIntermediateParams(pIntermediate, pShaderToken);
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}
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static void VshAddIntermediateILUOpcode(
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VSH_XBOX_SHADER* pShader,
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uint32_t* pShaderToken,
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VSH_ILU ILU,
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VSH_IMD_OUTPUT_TYPE output_type,
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int16_t output_address,
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int8_t output_mask)
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{
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VSH_INTERMEDIATE_FORMAT* pIntermediate = VshAddIntermediateInstruction(pShader, output_type, output_address, output_mask);
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if (!pIntermediate) return;
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pIntermediate->InstructionType = IMD_ILU;
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pIntermediate->MAC = MAC_NOP;
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pIntermediate->ILU = ILU;
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VshConvertIntermediateParams(pIntermediate, pShaderToken);
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}
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static bool VshConvertToIntermediate(
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VSH_XBOX_SHADER *pShader,
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uint32_t *pShaderToken)
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{
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// First get the instruction(s).
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VSH_ILU ILU = (VSH_ILU)VshGetField(pShaderToken, FLD_ILU);
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VSH_MAC MAC = (VSH_MAC)VshGetField(pShaderToken, FLD_MAC);
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// Output register
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VSH_IMD_OUTPUT_TYPE OutputType;
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int16_t OutputAddress = VshGetField(pShaderToken, FLD_OUT_ADDRESS);
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if ((VSH_OUTPUT_TYPE)VshGetField(pShaderToken, FLD_OUT_ORB) == OUTPUT_C) {
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OutputType = IMD_OUTPUT_C;
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OutputAddress = ConvertCRegister(OutputAddress);
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} else { // OUTPUT_O:
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OutputType = IMD_OUTPUT_O;
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OutputAddress = OutputAddress & 0xF;
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}
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// MAC,ILU output R register
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int16_t RAddress = VshGetField(pShaderToken, FLD_OUT_R);
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// Test for paired opcodes
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bool bIsPaired = (pInstruction->MAC != MAC_NOP) && (pInstruction->ILU != ILU_NOP);
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VSH_IMD_OUTPUT_TYPE OutputType2 = pInstruction->Output.OutputType == OUTPUT_C ? IMD_OUTPUT_C : IMD_OUTPUT_O;
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bool bIsPaired = (MAC != MAC_NOP) && (ILU != ILU_NOP);
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// Check if there's a MAC opcode
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if (pInstruction->MAC > MAC_NOP && pInstruction->MAC <= MAC_ARL) {
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if (bIsPaired && pInstruction->Output.RAddress == 1) {
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if (MAC > MAC_NOP && MAC <= MAC_ARL) {
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if (bIsPaired && RAddress == 1) {
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// Ignore paired MAC opcodes that write to R1
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} else {
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if (pInstruction->MAC == MAC_ARL) {
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VshAddIntermediateOpcode(pInstruction, pShader, IMD_MAC, IMD_OUTPUT_A0X, 0, MASK_X);
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if (MAC == MAC_ARL) {
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VshAddIntermediateMACOpcode(pShader, pShaderToken, MAC, IMD_OUTPUT_A0X, 0, MASK_X);
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} else {
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VshAddIntermediateOpcode(pInstruction, pShader, IMD_MAC, IMD_OUTPUT_R, pInstruction->Output.RAddress, pInstruction->Output.MACRMask);
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VshAddIntermediateMACOpcode(pShader, pShaderToken, MAC, IMD_OUTPUT_R, RAddress, VshGetField(pShaderToken, FLD_OUT_MAC_MASK));
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}
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}
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// Check if we must add a muxed MAC opcode as well
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if (pInstruction->Output.OutputMux == OMUX_MAC) {
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VshAddIntermediateOpcode(pInstruction, pShader, IMD_MAC, OutputType2, pInstruction->Output.OutputAddress, pInstruction->Output.OutputMask);
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if ((VSH_OUTPUT_MUX)VshGetField(pShaderToken, FLD_OUT_MUX) == OMUX_MAC) {
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VshAddIntermediateMACOpcode(pShader, pShaderToken, MAC, OutputType, OutputAddress, VshGetField(pShaderToken, FLD_OUT_O_MASK));
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}
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}
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// Check if there's an ILU opcode
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if (pInstruction->ILU != ILU_NOP) {
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||||
if (ILU != ILU_NOP) {
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// Paired ILU opcodes will only write to R1
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VshAddIntermediateOpcode(pInstruction, pShader, IMD_ILU, IMD_OUTPUT_R, bIsPaired ? 1 : pInstruction->Output.RAddress, pInstruction->Output.ILURMask);
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VshAddIntermediateILUOpcode(pShader, pShaderToken, ILU, IMD_OUTPUT_R, bIsPaired ? 1 : RAddress, VshGetField(pShaderToken, FLD_OUT_ILU_MASK));
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// Check if we must add a muxed ILU opcode as well
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if (pInstruction->Output.OutputMux == OMUX_ILU) {
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VshAddIntermediateOpcode(pInstruction, pShader, IMD_ILU, OutputType2, pInstruction->Output.OutputAddress, pInstruction->Output.OutputMask);
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||||
if ((VSH_OUTPUT_MUX)VshGetField(pShaderToken, FLD_OUT_MUX) == OMUX_ILU) {
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VshAddIntermediateILUOpcode(pShader, pShaderToken, ILU, OutputType, OutputAddress, VshGetField(pShaderToken, FLD_OUT_O_MASK));
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}
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}
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||||
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return VshGetField(pShaderToken, FLD_FINAL);
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}
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||||
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#define D3DDECLUSAGE_UNSUPPORTED ((D3DDECLUSAGE)-1)
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|
|
@ -1601,7 +1560,7 @@ static void OutputHlsl(std::stringstream& hlsl, VSH_IMD_OUTPUT& dest)
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|||
if (dest.Mask & MASK_W) hlsl << "w";
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}
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||||
|
||||
static void ParameterHlsl(std::stringstream& hlsl, VSH_IMD_PARAMETER& paramMeta, bool IndexesWithA0_X)
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||||
static void ParameterHlsl(std::stringstream& hlsl, VSH_IMD_PARAMETER& param, bool IndexesWithA0_X)
|
||||
{
|
||||
// Print functions
|
||||
static char* RegisterName[/*VSH_PARAMETER_TYPE*/] = {
|
||||
|
|
@ -1612,8 +1571,6 @@ static void ParameterHlsl(std::stringstream& hlsl, VSH_IMD_PARAMETER& paramMeta,
|
|||
"oPos" // PARAM_O // = 0??
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||||
};
|
||||
|
||||
auto param = paramMeta.Parameter;
|
||||
|
||||
if (param.Neg) {
|
||||
hlsl << "-";
|
||||
}
|
||||
|
|
@ -1699,22 +1656,22 @@ static void BuildShader(std::stringstream& hlsl, VSH_XBOX_SHADER* pShader)
|
|||
};
|
||||
|
||||
for (int i = 0; i < pShader->IntermediateCount; i++) {
|
||||
VSH_INTERMEDIATE_FORMAT& xboxInstruction = pShader->Intermediate[i];
|
||||
VSH_INTERMEDIATE_FORMAT& IntermediateInstruction = pShader->Intermediate[i];
|
||||
|
||||
std::string str = "";
|
||||
if (xboxInstruction.InstructionType == IMD_MAC) {
|
||||
str = VSH_MAC_HLSL[xboxInstruction.MAC];
|
||||
} else if (xboxInstruction.InstructionType == IMD_ILU) {
|
||||
str = VSH_ILU_HLSL[xboxInstruction.ILU];
|
||||
if (IntermediateInstruction.InstructionType == IMD_MAC) {
|
||||
str = VSH_MAC_HLSL[IntermediateInstruction.MAC];
|
||||
} else if (IntermediateInstruction.InstructionType == IMD_ILU) {
|
||||
str = VSH_ILU_HLSL[IntermediateInstruction.ILU];
|
||||
}
|
||||
|
||||
assert(!str.empty());
|
||||
hlsl << "\n " << str << "("; // opcode
|
||||
OutputHlsl(hlsl, xboxInstruction.Output);
|
||||
OutputHlsl(hlsl, IntermediateInstruction.Output);
|
||||
for (int i = 0; i < 3; i++) {
|
||||
if (xboxInstruction.Parameters[i].Active) {
|
||||
if (IntermediateInstruction.Parameters[i].Active) {
|
||||
hlsl << ", ";
|
||||
ParameterHlsl(hlsl, xboxInstruction.Parameters[i], xboxInstruction.IndexesWithA0_X);
|
||||
ParameterHlsl(hlsl, IntermediateInstruction.Parameters[i], IntermediateInstruction.IndexesWithA0_X);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1794,11 +1751,7 @@ extern HRESULT EmuRecompileVshFunction
|
|||
auto hlsl_stream = std::stringstream();
|
||||
|
||||
for (pToken = (DWORD*)((uint8_t*)pXboxFunction + sizeof(XTL::X_VSH_SHADER_HEADER)); !EOI; pToken += X_VSH_INSTRUCTION_SIZE) {
|
||||
VSH_SHADER_INSTRUCTION Inst;
|
||||
|
||||
VshParseInstruction((uint32_t*)pToken, &Inst);
|
||||
VshConvertToIntermediate(&Inst, pShader);
|
||||
EOI = Inst.Final;
|
||||
EOI = VshConvertToIntermediate(pShader, (uint32_t*)pToken);
|
||||
}
|
||||
|
||||
// The size of the shader is
|
||||
|
|
|
|||
Loading…
Reference in New Issue