diff --git a/src/CxbxKrnl/EmuNV2A.cpp b/src/CxbxKrnl/EmuNV2A.cpp index 988f91ac1..c7ecaa455 100644 --- a/src/CxbxKrnl/EmuNV2A.cpp +++ b/src/CxbxKrnl/EmuNV2A.cpp @@ -874,11 +874,11 @@ DEBUG_START(USER) -#define DEBUG_READ32(DEV) DbgPrintf("EmuX86 Read32 NV2A " #DEV "(0x%08X) = 0x%08X [Handle%s]\n", addr, result, DebugNV_##DEV##(addr)) -#define DEBUG_READ32_UNHANDLED(DEV) { DbgPrintf("EmuX86 Read32 NV2A " #DEV "(0x%08X) = 0x%08X [Unhandle%s]\n", addr, result, DebugNV_##DEV##(addr)); return result; } +#define DEBUG_READ32(DEV) DbgPrintf("X86 : Rd32 NV2A " #DEV "(0x%08X) = 0x%08X [Handled %s]\n", addr, result, DebugNV_##DEV##(addr)) +#define DEBUG_READ32_UNHANDLED(DEV) { DbgPrintf("X86 : Rd32 NV2A " #DEV "(0x%08X) = 0x%08X [Unhandled %s]\n", addr, result, DebugNV_##DEV##(addr)); return result; } -#define DEBUG_WRITE32(DEV) DbgPrintf("EmuX86 Write32 NV2A " #DEV "(0x%08X, 0x%08X) [Handle%s]\n", addr, value, DebugNV_##DEV##(addr)) -#define DEBUG_WRITE32_UNHANDLED(DEV) { DbgPrintf("EmuX86 Write32 NV2A " #DEV "(0x%08X, 0x%08X) [Unhandle%s]\n", addr, value, DebugNV_##DEV##(addr)); return; } +#define DEBUG_WRITE32(DEV) DbgPrintf("X86 : Wr32 NV2A " #DEV "(0x%08X, 0x%08X) [Handled %s]\n", addr, value, DebugNV_##DEV##(addr)) +#define DEBUG_WRITE32_UNHANDLED(DEV) { DbgPrintf("X86 : Wr32 NV2A " #DEV "(0x%08X, 0x%08X) [Unhandled %s]\n", addr, value, DebugNV_##DEV##(addr)); return; } #define DEVICE_READ32(DEV) uint32_t EmuNV2A_##DEV##_Read32(xbaddr addr) #define DEVICE_READ32_SWITCH() uint32_t result = 0; switch (addr) @@ -3394,11 +3394,11 @@ uint32_t EmuNV2A_Read(xbaddr addr, int size) if (block != nullptr) { switch (size) { - case 8: + case sizeof(uint8_t): return block->read(addr - block->offset) & 0xFF; - case 16: + case sizeof(uint16_t) : return block->read(addr - block->offset) & 0xFFFF; - case 32: + case sizeof(uint32_t) : return block->read(addr - block->offset); default: EmuWarning("EmuNV2A_Read: Invalid read size: %d", size); @@ -3420,7 +3420,7 @@ void EmuNV2A_Write(xbaddr addr, uint32_t value, int size) uint32_t aligned_value = 0; uint32_t mask = 0; switch (size) { - case 8: + case sizeof(uint8_t) : shift = (addr & 3) * 8; aligned_addr = addr & ~3; aligned_value = block->read(aligned_addr - block->offset); @@ -3429,7 +3429,7 @@ void EmuNV2A_Write(xbaddr addr, uint32_t value, int size) // TODO : Must the second byte be written to the next DWORD? block->write(aligned_addr - block->offset, (aligned_value & ~mask) | (value << shift)); return; - case 16: + case sizeof(uint16_t) : assert((addr & 1) == 0); shift = (addr & 2) * 16; @@ -3440,7 +3440,7 @@ void EmuNV2A_Write(xbaddr addr, uint32_t value, int size) // TODO : Must the second byte be written to the next DWORD? block->write(aligned_addr - block->offset, (aligned_value & ~mask) | (value << shift)); return; - case 32: + case sizeof(uint32_t) : block->write(addr - block->offset, value); return; default: diff --git a/src/CxbxKrnl/EmuX86.cpp b/src/CxbxKrnl/EmuX86.cpp index 82b0e0fd4..3d893c630 100644 --- a/src/CxbxKrnl/EmuX86.cpp +++ b/src/CxbxKrnl/EmuX86.cpp @@ -178,7 +178,7 @@ uint32_t EmuX86_Read(xbaddr addr, int size) if (addr >= NV2A_ADDR && addr < NV2A_ADDR + NV2A_SIZE) { // Access NV2A regardless weither HLE is disabled or not (ignoring bLLE_GPU) - value = EmuNV2A_Read(addr - NV2A_ADDR, size * 8); // Tmp: Correct nr of bytes into nr of bits + value = EmuNV2A_Read(addr - NV2A_ADDR, size); // Note : EmuNV2A_Read does it's own logging } else if (addr >= XBOX_FLASH_ROM_BASE) { // 0xFFF00000 - 0xFFFFFFF value = EmuFlash_Read32(addr - XBOX_FLASH_ROM_BASE); // TODO : Make flash access size-aware @@ -211,7 +211,7 @@ bool EmuX86_Write(xbaddr addr, uint32_t value, int size) if (addr >= NV2A_ADDR && addr < NV2A_ADDR + NV2A_SIZE) { // Access NV2A regardless weither HLE is disabled or not (ignoring bLLE_GPU) - EmuNV2A_Write(addr - NV2A_ADDR, value, size * 8); // Tmp: Correct nr of bytes into nr of bits + EmuNV2A_Write(addr - NV2A_ADDR, value, size); // Note : EmuNV2A_Write does it's own logging return true; // Assume successfull NV2A write } @@ -942,7 +942,7 @@ bool EmuX86_Opcode_OUT(LPEXCEPTION_POINTERS e, _DInst& info) // Note : OUT instructions never update CPU flags - return false; + return true; } bool EmuX86_Opcode_SUB(LPEXCEPTION_POINTERS e, _DInst& info)