replace hardcode addresses to macro for AddressRanges files
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RadWolfie
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2ead1e0fe0
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32001136ae
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@ -47,26 +47,26 @@ const _XboxAddressRanges XboxAddressRanges[] = {
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#endif
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// See http://xboxdevwiki.net/Memory
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// and http://xboxdevwiki.net/Boot_Process#Paging
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// Entry : Start , End , Size , Protect , RangeFlags , Comment
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RANGE_ENTRY(0x00010000, 0x03FFFFFF, MB( 64) - KB(64), PROT_XRW, SYSTEM_ALL | MAY_FAIL, "MemLowVirtual (General Xbox type) lower 64 MB Optional (already reserved via virtual_memory_placeholder)"),
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RANGE_ENTRY(0x04000000, 0x07FFFFFF, MB( 64) , PROT_XRW, SYSTEM_128MB | MAY_FAIL, "MemLowVirtual (Chihiro / DevKit) ^ + upper 64 MB"),
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RANGE_ENTRY(0x80000000, 0x83FFFFFF, MB( 64) , PROT_UNH, SYSTEM_ALL , "MemPhysical (General Xbox type) lower 64 MB"),
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RANGE_ENTRY(0x84000000, 0x87FFFFFF, MB( 64) , PROT_UNH, SYSTEM_128MB , "MemPhysical (Chihiro / DevKit) ^ + upper 64 MB"),
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RANGE_ENTRY(0xB0000000, 0xBFFFFFFF, MB(256) , PROT_NAC, SYSTEM_DEVKIT , "DevKitMemory"), // TODO : Check reserved range (might behave like MemTiled)
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RANGE_ENTRY(0xC0000000, 0xC03FFFFF, MB( 4) , PROT_RW, SYSTEM_ALL , "MemPageTable"), // See PAGE_TABLES_SIZE, which contains one 4 byte entry per PAGE_SIZE
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RANGE_ENTRY(0xD0000000, 0xEFFFFFFF, MB(512) , PROT_RW, SYSTEM_ALL | MAY_FAIL, "SystemMemory Optional"), // TODO : Check reserved range (might behave like MemTiled)
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RANGE_ENTRY(0xF0000000, 0xF3FFFFFF, MB( 64) , PROT_UNH, SYSTEM_ALL , "MemTiled Optional (even though it can't be reserved, MapViewOfFileEx to this range still works!?)"),
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RANGE_ENTRY(0xFD000000, 0xFD6FFFFF, MB( 7) , PROT_NAC, SYSTEM_ALL , "DeviceNV2A_a (GPU)"),
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RANGE_ENTRY(0xFD700000, 0xFD7FFFFF, MB( 1) , PROT_RW, SYSTEM_ALL , "MemNV2APRAMIN"),
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RANGE_ENTRY(0xFD800000, 0xFDFFFFFF, MB( 8) , PROT_NAC, SYSTEM_ALL , "DeviceNV2A_b (GPU)"),
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RANGE_ENTRY(0xFE800000, 0xFE87FFFF, KB(512) , PROT_NAC, SYSTEM_ALL , "DeviceAPU"),
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RANGE_ENTRY(0xFEC00000, 0xFEC00FFF, KB( 4) , PROT_NAC, SYSTEM_ALL , "DeviceAC97 (ACI)"),
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RANGE_ENTRY(0xFED00000, 0xFED00FFF, KB( 4) , PROT_NAC, SYSTEM_ALL , "DeviceUSB"),
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RANGE_ENTRY(0xFEF00000, 0xFEF003FF, KB( 1) , PROT_NAC, SYSTEM_ALL , "DeviceNVNet"),
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RANGE_ENTRY(0xFF000000, 0xFF3FFFFF, MB( 4) , PROT_NAC, SYSTEM_ALL , "DeviceFlash_a (Flash mirror 1)"),
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RANGE_ENTRY(0xFF400000, 0xFF7FFFFF, MB( 4) , PROT_NAC, SYSTEM_ALL , "DeviceFlash_b (Flash mirror 2)"),
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RANGE_ENTRY(0xFF800000, 0xFFBFFFFF, MB( 4) , PROT_NAC, SYSTEM_ALL , "DeviceFlash_c (Flash mirror 3)"),
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RANGE_ENTRY(0xFFC00000, 0xFFFFFFFF, MB( 4) , PROT_NAC, SYSTEM_ALL | MAY_FAIL, "DeviceFlash_d (Flash mirror 4) Optional (will probably fail reservation, which is acceptable - the 3 other mirrors work just fine"),
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// Entry : Start , End , Size , Protect , RangeFlags , Comment
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RANGE_ENTRY(USER_ADDRESS1_BASE, USER_ADDRESS1_END, USER_ADDRESS1_SIZE, PROT_XRW, SYSTEM_ALL | MAY_FAIL, "MemLowVirtual (General Xbox type) lower 64 MB Optional (already reserved via virtual_memory_placeholder)"),
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RANGE_ENTRY(USER_ADDRESS2_BASE, USER_ADDRESS2_END, USER_ADDRESS2_SIZE, PROT_XRW, SYSTEM_128MB | MAY_FAIL, "MemLowVirtual (Chihiro / DevKit) ^ + upper 64 MB"),
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RANGE_ENTRY(PHYSICAL_MAP1_BASE, PHYSICAL_MAP1_END, PHYSICAL_MAP1_SIZE, PROT_UNH, SYSTEM_ALL , "MemPhysical (General Xbox type) lower 64 MB"),
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RANGE_ENTRY(PHYSICAL_MAP2_BASE, PHYSICAL_MAP2_END, PHYSICAL_MAP2_SIZE, PROT_UNH, SYSTEM_128MB , "MemPhysical (Chihiro / DevKit) ^ + upper 64 MB"),
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RANGE_ENTRY(DEVKIT_MEMORY_BASE, DEVKIT_MEMORY_END, DEVKIT_MEMORY_SIZE, PROT_NAC, SYSTEM_DEVKIT , "DevKitMemory"), // TODO : Check reserved range (might behave like MemTiled)
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RANGE_ENTRY(PAGE_TABLES_BASE , PAGE_TABLES_END , PAGE_TABLES_SIZE , PROT_RW , SYSTEM_ALL , "MemPageTable"), // See PAGE_TABLES_SIZE, which contains one 4 byte entry per PAGE_SIZE
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RANGE_ENTRY(SYSTEM_MEMORY_BASE, SYSTEM_MEMORY_END, SYSTEM_MEMORY_SIZE, PROT_RW , SYSTEM_ALL | MAY_FAIL, "SystemMemory Optional"), // TODO : Check reserved range (might behave like MemTiled)
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RANGE_ENTRY(TILED_MEMORY_BASE , TILED_MEMORY_END , TILED_MEMORY_SIZE , PROT_UNH, SYSTEM_ALL , "MemTiled Optional (even though it can't be reserved, MapViewOfFileEx to this range still works!?)"),
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RANGE_ENTRY(NV2A_DEVICE1_BASE , NV2A_DEVICE1_END , NV2A_DEVICE1_SIZE , PROT_NAC, SYSTEM_ALL , "DeviceNV2A_a (GPU)"),
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RANGE_ENTRY(NV2A_PRAMIN_BASE , NV2A_PRAMIN_END , NV2A_PRAMIN_SIZE1 , PROT_RW , SYSTEM_ALL , "MemNV2APRAMIN"),
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RANGE_ENTRY(NV2A_DEVICE2_BASE , NV2A_DEVICE2_END , NV2A_DEVICE2_SIZE , PROT_NAC, SYSTEM_ALL , "DeviceNV2A_b (GPU)"),
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RANGE_ENTRY(APU_DEVICE_BASE , APU_DEVICE_END , APU_DEVICE_SIZE , PROT_NAC, SYSTEM_ALL , "DeviceAPU"),
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RANGE_ENTRY(AC97_DEVICE_BASE , AC97_DEVICE_END , AC97_DEVICE_SIZE , PROT_NAC, SYSTEM_ALL , "DeviceAC97 (ACI)"),
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RANGE_ENTRY(USB_DEVICE_BASE , USB_DEVICE_END , USB_DEVICE_SIZE , PROT_NAC, SYSTEM_ALL , "DeviceUSB"),
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RANGE_ENTRY(NVNET_DEVICE_BASE , NVNET_DEVICE_END , NVNET_DEVICE_SIZE , PROT_NAC, SYSTEM_ALL , "DeviceNVNet"),
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RANGE_ENTRY(FLASH_DEVICE1_BASE, FLASH_DEVICE1_END, FLASH_DEVICEN_SIZE, PROT_NAC, SYSTEM_ALL , "DeviceFlash_a (Flash mirror 1)"),
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RANGE_ENTRY(FLASH_DEVICE2_BASE, FLASH_DEVICE2_END, FLASH_DEVICEN_SIZE, PROT_NAC, SYSTEM_ALL , "DeviceFlash_b (Flash mirror 2)"),
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RANGE_ENTRY(FLASH_DEVICE3_BASE, FLASH_DEVICE3_END, FLASH_DEVICEN_SIZE, PROT_NAC, SYSTEM_ALL , "DeviceFlash_c (Flash mirror 3)"),
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RANGE_ENTRY(FLASH_DEVICE4_BASE, FLASH_DEVICE4_END, FLASH_DEVICEN_SIZE, PROT_NAC, SYSTEM_ALL | MAY_FAIL, "DeviceFlash_d (Flash mirror 4) Optional (will probably fail reservation, which is acceptable - the 3 other mirrors work just fine"),
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#undef RANGE_ENTRY
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};
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@ -32,6 +32,14 @@
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#define KB(x) ((x) * 1024 ) // = 0x00000400
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#define MB(x) ((x) * KB(1024)) // = 0x00100000
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#define USER_ADDRESS1_BASE 0x00010000
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#define USER_ADDRESS1_SIZE (MB(64) - KB(64)) // = 0x03FF0000
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#define USER_ADDRESS1_END (USER_ADDRESS1_BASE + USER_ADDRESS1_SIZE - 1) // 0x03FFFFFF
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#define USER_ADDRESS2_BASE 0x04000000
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#define USER_ADDRESS2_SIZE (MB(64)) // = 0x04000000
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#define USER_ADDRESS2_END (USER_ADDRESS2_BASE + USER_ADDRESS2_SIZE - 1) // 0x07FFFFFF
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// Base addresses of various components
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#define KSEG0_BASE 0x80000000
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@ -39,6 +47,14 @@
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#define PHYSICAL_MAP_SIZE (MB(256)) // = 0x10000000
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#define PHYSICAL_MAP_END (PHYSICAL_MAP_BASE + PHYSICAL_MAP_SIZE - 1) // 0x8FFFFFFF
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#define PHYSICAL_MAP1_BASE 0x80000000
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#define PHYSICAL_MAP1_SIZE (MB(64)) // = 0x04000000
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#define PHYSICAL_MAP1_END (PHYSICAL_MAP1_BASE + PHYSICAL_MAP1_SIZE - 1) // 0x83FFFFFF
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#define PHYSICAL_MAP2_BASE 0x84000000
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#define PHYSICAL_MAP2_SIZE (MB(64)) // = 0x04000000
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#define PHYSICAL_MAP2_END (PHYSICAL_MAP2_BASE + PHYSICAL_MAP2_SIZE - 1) // 0x8FFFFFFF
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#define CONTIGUOUS_MEMORY_BASE KSEG0_BASE // = 0x80000000
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#define XBOX_CONTIGUOUS_MEMORY_SIZE (MB(64))
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#define CHIHIRO_CONTIGUOUS_MEMORY_SIZE (MB(128))
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@ -55,6 +71,10 @@
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#define SYSTEM_MEMORY_SIZE (MB(512)) // = 0x20000000
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#define SYSTEM_MEMORY_END (SYSTEM_MEMORY_BASE + SYSTEM_MEMORY_SIZE - 1) // 0xEFFFFFFF
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#define TILED_MEMORY_BASE 0xF0000000
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#define TILED_MEMORY_SIZE (MB(64)) // = 0x04000000
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#define TILED_MEMORY_END (TILED_MEMORY_BASE + TILED_MEMORY_SIZE - 1) // 0xF3FFFFFF
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#define XBOX_WRITE_COMBINED_BASE 0xF0000000 // WC (The WC memory is another name of the tiled memory)
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#define XBOX_WRITE_COMBINED_SIZE (MB(128)) // = 0x08000000
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#define XBOX_WRITE_COMBINED_END (XBOX_WRITE_COMBINED_BASE + XBOX_WRITE_COMBINED_SIZE - 1) // 0xF7FFFFFF
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@ -63,10 +83,51 @@
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#define XBOX_UNCACHED_SIZE (MB(128 - 4)) // = 0x07C00000
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#define XBOX_UNCACHED_END (XBOX_UNCACHED_BASE + XBOX_UNCACHED_SIZE - 1) // - 0xFFBFFFFF
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#define NV2A_DEVICE1_BASE 0xFD000000
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#define NV2A_DEVICE1_SIZE (MB(7)) // = 0x00700000
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#define NV2A_DEVICE1_END (NV2A_DEVICE1_BASE + NV2A_DEVICE1_SIZE - 1) // 0xFD6FFFFF
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#define NV2A_PRAMIN_BASE 0xFD700000
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#define NV2A_PRAMIN_SIZE1 (MB(1)) // = 0x00100000 // TODO: Might be best to merge PCIDevice.h's address ranges into this header file.
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#define NV2A_PRAMIN_END (NV2A_PRAMIN_BASE + NV2A_PRAMIN_SIZE1 - 1) // 0xFD7FFFFF
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#define NV2A_DEVICE2_BASE 0xFD800000
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#define NV2A_DEVICE2_SIZE (MB(8)) // = 0x00800000
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#define NV2A_DEVICE2_END (NV2A_DEVICE2_BASE + NV2A_DEVICE2_SIZE - 1) // 0xFDFFFFFF
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#define APU_DEVICE_BASE 0xFE800000
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#define APU_DEVICE_SIZE (KB(512)) // = 0x00080000
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#define APU_DEVICE_END (APU_DEVICE_BASE + APU_DEVICE_SIZE - 1) // 0xFE87FFFF
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#define AC97_DEVICE_BASE 0xFEC00000
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#define AC97_DEVICE_SIZE (KB(4)) // = 0x0001000
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#define AC97_DEVICE_END (AC97_DEVICE_BASE + AC97_DEVICE_SIZE - 1) // 0xFEC00FFF
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#define USB_DEVICE_BASE 0xFED00000
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#define USB_DEVICE_SIZE (KB(4)) // = 0x0001000
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#define USB_DEVICE_END (USB_DEVICE_BASE + USB_DEVICE_SIZE - 1) // 0xFED00FFF
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#define NVNET_DEVICE_BASE 0xFEF00000
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#define NVNET_DEVICE_SIZE (KB(1)) // = 0x00000400
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#define NVNET_DEVICE_END (NVNET_DEVICE_BASE + NVNET_DEVICE_SIZE - 1) // 0xFEF003FF
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#define XBOX_FLASH_ROM_BASE 0xFFF00000
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#define XBOX_FLASH_ROM_SIZE (MB(1)) // = 0x00100000
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#define XBOX_FLASH_ROM_END (XBOX_FLASH_ROM_BASE + XBOX_FLASH_ROM_SIZE - 1) // - 0xFFFFFFF
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#define FLASH_DEVICEN_SIZE (MB(4)) // = 0x00400000
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#define FLASH_DEVICE1_BASE 0xFF000000
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#define FLASH_DEVICE1_END (FLASH_DEVICE1_BASE + FLASH_DEVICEN_SIZE - 1) // 0xFF3FFFFF
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#define FLASH_DEVICE2_BASE 0xFF400000
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#define FLASH_DEVICE2_END (FLASH_DEVICE2_BASE + FLASH_DEVICEN_SIZE - 1) // 0xFF7FFFFF
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#define FLASH_DEVICE3_BASE 0xFF800000
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#define FLASH_DEVICE3_END (FLASH_DEVICE3_BASE + FLASH_DEVICEN_SIZE - 1) // 0xFFBFFFFF
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#define FLASH_DEVICE4_BASE 0xFFC00000
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#define FLASH_DEVICE4_END (FLASH_DEVICE4_BASE + FLASH_DEVICEN_SIZE - 1) // 0xFFFFFFFF
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// Miscellaneous base addresses
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#define XBE_IMAGE_BASE 0x00010000
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#define PAGE_DIRECTORY_BASE 0xC0300000
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