630 lines
15 KiB
C++
630 lines
15 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "ArmJit.h"
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#include "Common/CPUDetect.h"
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using namespace MIPSAnalyst;
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#define _RS ((op>>21) & 0x1F)
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#define _RT ((op>>16) & 0x1F)
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#define _RD ((op>>11) & 0x1F)
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#define _FS ((op>>11) & 0x1F)
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#define _FT ((op>>16) & 0x1F)
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#define _FD ((op>>6 ) & 0x1F)
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#define _SA ((op>>6 ) & 0x1F)
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#define _POS ((op>>6 ) & 0x1F)
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#define _SIZE ((op>>11 ) & 0x1F)
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// All functions should have CONDITIONAL_DISABLE, so we can narrow things down to a file quickly.
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// Currently known non working ones should have DISABLE.
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//#define CONDITIONAL_DISABLE { Comp_Generic(op); return; }
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#define CONDITIONAL_DISABLE ;
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#define DISABLE { Comp_Generic(op); return; }
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namespace MIPSComp
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{
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static u32 EvalOr(u32 a, u32 b) { return a | b; }
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static u32 EvalEor(u32 a, u32 b) { return a ^ b; }
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static u32 EvalAnd(u32 a, u32 b) { return a & b; }
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static u32 EvalAdd(u32 a, u32 b) { return a + b; }
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static u32 EvalSub(u32 a, u32 b) { return a - b; }
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void Jit::CompImmLogic(int rs, int rt, u32 uimm, void (ARMXEmitter::*arith)(ARMReg dst, ARMReg src, Operand2 op2), u32 (*eval)(u32 a, u32 b))
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{
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if (gpr.IsImm(rs)) {
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gpr.SetImm(rt, (*eval)(gpr.GetImm(rs), uimm));
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} else {
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gpr.MapDirtyIn(rt, rs);
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// TODO: Special case when uimm can be represented as an Operand2
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Operand2 op2;
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if (TryMakeOperand2(uimm, op2)) {
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(this->*arith)(gpr.R(rt), gpr.R(rs), op2);
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} else {
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MOVI2R(R0, (u32)uimm);
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(this->*arith)(gpr.R(rt), gpr.R(rs), R0);
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}
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}
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}
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void Jit::Comp_IType(u32 op)
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{
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CONDITIONAL_DISABLE;
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s32 simm = (s32)(s16)(op & 0xFFFF); // sign extension
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u32 uimm = op & 0xFFFF;
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u32 suimm = (u32)(s32)simm;
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int rt = _RT;
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int rs = _RS;
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// noop, won't write to ZERO.
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if (rt == 0)
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return;
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switch (op >> 26)
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{
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case 8: // same as addiu?
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case 9: // R(rt) = R(rs) + simm; break; //addiu
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{
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if (gpr.IsImm(rs)) {
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gpr.SetImm(rt, gpr.GetImm(rs) + simm);
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} else {
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gpr.MapDirtyIn(rt, rs);
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ADDI2R(gpr.R(rt), gpr.R(rs), simm, R0);
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}
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break;
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}
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case 12: CompImmLogic(rs, rt, uimm, &ARMXEmitter::AND, &EvalAnd); break;
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case 13: CompImmLogic(rs, rt, uimm, &ARMXEmitter::ORR, &EvalOr); break;
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case 14: CompImmLogic(rs, rt, uimm, &ARMXEmitter::EOR, &EvalEor); break;
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case 10: // R(rt) = (s32)R(rs) < simm; break; //slti
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{
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gpr.MapDirtyIn(rt, rs);
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CMPI2R(gpr.R(rs), simm, R0);
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SetCC(CC_LT);
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MOVI2R(gpr.R(rt), 1);
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SetCC(CC_GE);
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MOVI2R(gpr.R(rt), 0);
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SetCC(CC_AL);
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}
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break;
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case 11: // R(rt) = R(rs) < uimm; break; //sltiu
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{
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gpr.MapDirtyIn(rt, rs);
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CMPI2R(gpr.R(rs), suimm, R0);
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SetCC(CC_LO);
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MOVI2R(gpr.R(rt), 1);
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SetCC(CC_HS);
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MOVI2R(gpr.R(rt), 0);
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SetCC(CC_AL);
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}
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break;
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case 15: // R(rt) = uimm << 16; //lui
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gpr.SetImm(rt, uimm << 16);
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break;
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default:
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Comp_Generic(op);
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break;
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}
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}
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void Jit::Comp_RType2(u32 op)
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{
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CONDITIONAL_DISABLE;
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int rs = _RS;
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int rd = _RD;
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// Don't change $zr.
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if (rd == 0)
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return;
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switch (op & 63)
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{
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case 22: //clz
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gpr.MapDirtyIn(rd, rs);
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CLZ(gpr.R(rd), gpr.R(rs));
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break;
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case 23: //clo
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gpr.MapDirtyIn(rd, rs);
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MVN(R0, gpr.R(rs));
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CLZ(gpr.R(rd), R0);
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break;
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default:
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DISABLE;
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}
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}
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void Jit::CompType3(int rd, int rs, int rt, void (ARMXEmitter::*arith)(ARMReg dst, ARMReg rm, Operand2 rn), u32 (*eval)(u32 a, u32 b), bool isSub)
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{
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if (gpr.IsImm(rs) && gpr.IsImm(rt)) {
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gpr.SetImm(rd, (*eval)(gpr.GetImm(rs), gpr.GetImm(rt)));
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} else if (gpr.IsImm(rt)) {
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u32 rtImm = gpr.GetImm(rt);
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gpr.MapDirtyIn(rd, rs);
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Operand2 op2;
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if (TryMakeOperand2(rtImm, op2)) {
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(this->*arith)(gpr.R(rd), gpr.R(rs), op2);
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} else {
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MOVI2R(R0, rtImm);
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(this->*arith)(gpr.R(rd), gpr.R(rs), R0);
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}
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} else if (gpr.IsImm(rs)) {
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u32 rsImm = gpr.GetImm(rs);
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gpr.MapDirtyIn(rd, rt);
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// TODO: Special case when rsImm can be represented as an Operand2
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MOVI2R(R0, rsImm);
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(this->*arith)(gpr.R(rd), R0, gpr.R(rt));
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} else {
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// Generic solution
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gpr.MapDirtyInIn(rd, rs, rt);
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(this->*arith)(gpr.R(rd), gpr.R(rs), gpr.R(rt));
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}
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}
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void Jit::Comp_RType3(u32 op)
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{
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CONDITIONAL_DISABLE;
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int rt = _RT;
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int rs = _RS;
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int rd = _RD;
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// noop, won't write to ZERO.
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if (rd == 0)
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return;
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switch (op & 63)
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{
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case 10: //if (!R(rt)) R(rd) = R(rs); break; //movz
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if (rd == rs)
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break;
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if (!gpr.IsImm(rt))
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{
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gpr.MapDirtyInIn(rd, rt, rs, false);
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CMP(gpr.R(rt), Operand2(0));
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SetCC(CC_EQ);
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MOV(gpr.R(rd), Operand2(gpr.R(rs)));
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SetCC(CC_AL);
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}
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else if (gpr.GetImm(rt) == 0)
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{
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// Yes, this actually happens.
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if (gpr.IsImm(rs))
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gpr.SetImm(rd, gpr.GetImm(rs));
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else
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{
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gpr.MapDirtyIn(rd, rs);
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MOV(gpr.R(rd), Operand2(gpr.R(rs)));
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}
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}
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break;
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case 11:// if (R(rt)) R(rd) = R(rs); break; //movn
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if (rd == rs)
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break;
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if (!gpr.IsImm(rt))
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{
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gpr.MapDirtyInIn(rd, rt, rs, false);
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CMP(gpr.R(rt), Operand2(0));
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SetCC(CC_NEQ);
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MOV(gpr.R(rd), Operand2(gpr.R(rs)));
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SetCC(CC_AL);
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}
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else if (gpr.GetImm(rt) != 0)
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{
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// Yes, this actually happens.
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if (gpr.IsImm(rs))
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gpr.SetImm(rd, gpr.GetImm(rs));
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else
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{
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gpr.MapDirtyIn(rd, rs);
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MOV(gpr.R(rd), Operand2(gpr.R(rs)));
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}
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}
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break;
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case 32: //R(rd) = R(rs) + R(rt); break; //add
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case 33: //R(rd) = R(rs) + R(rt); break; //addu
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// Some optimized special cases
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if (gpr.IsImm(rs) && gpr.GetImm(rs) == 0) {
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gpr.MapDirtyIn(rd, rt);
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MOV(gpr.R(rd), gpr.R(rt));
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} else if (gpr.IsImm(rt) && gpr.GetImm(rt) == 0) {
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gpr.MapDirtyIn(rd, rs);
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MOV(gpr.R(rd), gpr.R(rs));
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} else {
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CompType3(rd, rs, rt, &ARMXEmitter::ADD, &EvalAdd);
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}
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break;
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case 34: //R(rd) = R(rs) - R(rt); break; //sub
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case 35: //R(rd) = R(rs) - R(rt); break; //subu
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CompType3(rd, rs, rt, &ARMXEmitter::SUB, &EvalSub, true);
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break;
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case 36: //R(rd) = R(rs) & R(rt); break; //and
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CompType3(rd, rs, rt, &ARMXEmitter::AND, &EvalAnd);
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break;
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case 37: //R(rd) = R(rs) | R(rt); break; //or
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CompType3(rd, rs, rt, &ARMXEmitter::ORR, &EvalOr);
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break;
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case 38: //R(rd) = R(rs) ^ R(rt); break; //xor/eor
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CompType3(rd, rs, rt, &ARMXEmitter::EOR, &EvalEor);
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break;
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case 39: // R(rd) = ~(R(rs) | R(rt)); break; //nor
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if (gpr.IsImm(rt) && gpr.GetImm(rt) == 0) {
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gpr.MapDirtyIn(rd, rs);
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MVN(gpr.R(rd), gpr.R(rs));
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} else {
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gpr.MapDirtyInIn(rd, rs, rt);
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ORR(gpr.R(rd), gpr.R(rs), gpr.R(rt));
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MVN(gpr.R(rd), gpr.R(rd));
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}
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break;
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case 42: //R(rd) = (int)R(rs) < (int)R(rt); break; //slt
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gpr.MapDirtyInIn(rd, rs, rt);
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CMP(gpr.R(rs), gpr.R(rt));
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SetCC(CC_LT);
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MOVI2R(gpr.R(rd), 1);
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SetCC(CC_GE);
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MOVI2R(gpr.R(rd), 0);
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SetCC(CC_AL);
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break;
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case 43: //R(rd) = R(rs) < R(rt); break; //sltu
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gpr.MapDirtyInIn(rd, rs, rt);
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CMP(gpr.R(rs), gpr.R(rt));
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SetCC(CC_LO);
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MOVI2R(gpr.R(rd), 1);
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SetCC(CC_HS);
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MOVI2R(gpr.R(rd), 0);
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SetCC(CC_AL);
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break;
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case 44: //R(rd) = max(R(rs), R(rt); break; //max
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gpr.MapDirtyInIn(rd, rs, rt);
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CMP(gpr.R(rs), gpr.R(rt));
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SetCC(CC_GT);
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MOV(gpr.R(rd), gpr.R(rs));
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SetCC(CC_LE);
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MOV(gpr.R(rd), gpr.R(rt));
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SetCC(CC_AL);
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break;
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case 45: //R(rd) = min(R(rs), R(rt)); break; //min
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gpr.MapDirtyInIn(rd, rs, rt);
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CMP(gpr.R(rs), gpr.R(rt));
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SetCC(CC_LT);
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MOV(gpr.R(rd), gpr.R(rs));
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SetCC(CC_GE);
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MOV(gpr.R(rd), gpr.R(rt));
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SetCC(CC_AL);
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break;
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default:
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Comp_Generic(op);
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break;
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}
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}
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void Jit::CompShiftImm(u32 op, ArmGen::ShiftType shiftType)
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{
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int rd = _RD;
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int rt = _RT;
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int sa = _SA;
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gpr.MapDirtyIn(rd, rt);
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MOV(gpr.R(rd), Operand2(gpr.R(rt), shiftType, sa));
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}
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void Jit::CompShiftVar(u32 op, ArmGen::ShiftType shiftType)
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{
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int rd = _RD;
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int rt = _RT;
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int rs = _RS;
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if (gpr.IsImm(rs))
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{
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int sa = gpr.GetImm(rs) & 0x1F;
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gpr.MapDirtyIn(rd, rt);
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MOV(gpr.R(rd), Operand2(gpr.R(rt), shiftType, sa));
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return;
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}
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gpr.MapDirtyInIn(rd, rs, rt);
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AND(R0, gpr.R(rs), Operand2(0x1F));
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MOV(gpr.R(rd), Operand2(gpr.R(rt), shiftType, R0));
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}
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void Jit::Comp_ShiftType(u32 op)
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{
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CONDITIONAL_DISABLE;
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int rs = _RS;
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int rd = _RD;
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int fd = _FD;
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// noop, won't write to ZERO.
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if (rd == 0)
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return;
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// WARNING : ROTR
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switch (op & 0x3f)
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{
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case 0: CompShiftImm(op, ST_LSL); break; //sll
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case 2: CompShiftImm(op, rs == 1 ? ST_ROR : ST_LSR); break; //srl
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case 3: CompShiftImm(op, ST_ASR); break; //sra
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case 4: CompShiftVar(op, ST_LSL); break; //sllv
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case 6: CompShiftVar(op, fd == 1 ? ST_ROR : ST_LSR); break; //srlv
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case 7: CompShiftVar(op, ST_ASR); break; //srav
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default:
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Comp_Generic(op);
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break;
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}
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}
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void Jit::Comp_Special3(u32 op)
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{
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CONDITIONAL_DISABLE;
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int rs = _RS;
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int rt = _RT;
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int pos = _POS;
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int size = _SIZE + 1;
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u32 mask = 0xFFFFFFFFUL >> (32 - size);
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// Don't change $zr.
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if (rt == 0)
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return;
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switch (op & 0x3f)
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{
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case 0x0: //ext
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if (gpr.IsImm(rs))
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{
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gpr.SetImm(rt, (gpr.GetImm(rs) >> pos) & mask);
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return;
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}
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gpr.MapDirtyIn(rt, rs);
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if (cpu_info.bArmV7) {
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UBFX(gpr.R(rt), gpr.R(rs), pos, size);
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} else {
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MOV(gpr.R(rt), Operand2(gpr.R(rs), ST_LSR, pos));
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ANDI2R(gpr.R(rt), gpr.R(rt), mask, R0);
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}
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break;
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case 0x4: //ins
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{
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u32 sourcemask = mask >> pos;
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u32 destmask = ~(sourcemask << pos);
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if (gpr.IsImm(rs))
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{
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u32 inserted = (gpr.GetImm(rs) & sourcemask) << pos;
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if (gpr.IsImm(rt))
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{
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gpr.SetImm(rt, (gpr.GetImm(rt) & destmask) | inserted);
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return;
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}
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gpr.MapReg(rt, MAP_DIRTY);
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ANDI2R(gpr.R(rt), gpr.R(rt), destmask, R0);
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ORI2R(gpr.R(rt), gpr.R(rt), inserted, R0);
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}
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else
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{
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if (cpu_info.bArmV7) {
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gpr.MapDirtyIn(rt, rs, false);
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BFI(gpr.R(rt), gpr.R(rs), pos, size-pos);
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} else {
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gpr.MapDirtyIn(rt, rs, false);
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ANDI2R(R0, gpr.R(rs), sourcemask, R1);
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MOV(R0, Operand2(R0, ST_LSL, pos));
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ANDI2R(gpr.R(rt), gpr.R(rt), destmask, R1);
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ORR(gpr.R(rt), gpr.R(rt), R0);
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}
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}
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}
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break;
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}
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}
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void Jit::Comp_Allegrex(u32 op)
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{
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CONDITIONAL_DISABLE;
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int rt = _RT;
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int rd = _RD;
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// Don't change $zr.
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if (rd == 0)
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return;
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switch ((op >> 6) & 31)
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{
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case 16: // seb // R(rd) = (u32)(s32)(s8)(u8)R(rt);
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if (gpr.IsImm(rt))
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{
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gpr.SetImm(rd, (s32)(s8)(u8)gpr.GetImm(rt));
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return;
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}
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gpr.MapDirtyIn(rd, rt);
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SXTB(gpr.R(rd), gpr.R(rt));
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break;
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case 24: // seh
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if (gpr.IsImm(rt))
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{
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gpr.SetImm(rd, (s32)(s16)(u16)gpr.GetImm(rt));
|
|
return;
|
|
}
|
|
gpr.MapDirtyIn(rd, rt);
|
|
SXTH(gpr.R(rd), gpr.R(rt));
|
|
break;
|
|
|
|
case 20: //bitrev
|
|
if (gpr.IsImm(rt))
|
|
{
|
|
// http://graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
|
|
u32 v = gpr.GetImm(rt);
|
|
v = ((v >> 1) & 0x55555555) | ((v & 0x55555555) << 1); // odd<->even
|
|
v = ((v >> 2) & 0x33333333) | ((v & 0x33333333) << 2); // pair<->pair
|
|
v = ((v >> 4) & 0x0F0F0F0F) | ((v & 0x0F0F0F0F) << 4); // nibb<->nibb
|
|
v = ((v >> 8) & 0x00FF00FF) | ((v & 0x00FF00FF) << 8); // byte<->byte
|
|
v = ( v >> 16 ) | ( v << 16); // hword<->hword
|
|
gpr.SetImm(rd, v);
|
|
return;
|
|
}
|
|
|
|
if (cpu_info.bArmV7) {
|
|
gpr.MapDirtyIn(rd, rt);
|
|
RBIT(gpr.R(rd), gpr.R(rt));
|
|
} else {
|
|
Comp_Generic(op);
|
|
}
|
|
break;
|
|
default:
|
|
Comp_Generic(op);
|
|
return;
|
|
}
|
|
}
|
|
|
|
void Jit::Comp_Allegrex2(u32 op)
|
|
{
|
|
CONDITIONAL_DISABLE;
|
|
int rt = _RT;
|
|
int rd = _RD;
|
|
// Don't change $zr.
|
|
if (rd == 0)
|
|
return;
|
|
|
|
switch (op & 0x3ff)
|
|
{
|
|
case 0xA0: //wsbh
|
|
if (cpu_info.bArmV7) {
|
|
gpr.MapDirtyIn(rd, rt);
|
|
REV16(gpr.R(rd), gpr.R(rt));
|
|
} else {
|
|
Comp_Generic(op);
|
|
}
|
|
break;
|
|
case 0xE0: //wsbw
|
|
if (cpu_info.bArmV7) {
|
|
gpr.MapDirtyIn(rd, rt);
|
|
REV(gpr.R(rd), gpr.R(rt));
|
|
} else {
|
|
Comp_Generic(op);
|
|
}
|
|
break;
|
|
default:
|
|
Comp_Generic(op);
|
|
break;
|
|
}
|
|
}
|
|
|
|
void Jit::Comp_MulDivType(u32 op)
|
|
{
|
|
CONDITIONAL_DISABLE;
|
|
int rt = _RT;
|
|
int rs = _RS;
|
|
int rd = _RD;
|
|
|
|
switch (op & 63)
|
|
{
|
|
case 16: // R(rd) = HI; //mfhi
|
|
gpr.MapDirtyIn(rd, MIPSREG_HI);
|
|
MOV(gpr.R(rd), gpr.R(MIPSREG_HI));
|
|
break;
|
|
|
|
case 17: // HI = R(rs); //mthi
|
|
gpr.MapDirtyIn(MIPSREG_HI, rs);
|
|
MOV(gpr.R(MIPSREG_HI), gpr.R(rs));
|
|
break;
|
|
|
|
case 18: // R(rd) = LO; break; //mflo
|
|
gpr.MapDirtyIn(rd, MIPSREG_LO);
|
|
MOV(gpr.R(rd), gpr.R(MIPSREG_LO));
|
|
break;
|
|
|
|
case 19: // LO = R(rs); break; //mtlo
|
|
gpr.MapDirtyIn(MIPSREG_LO, rs);
|
|
MOV(gpr.R(MIPSREG_LO), gpr.R(rs));
|
|
break;
|
|
|
|
case 24: //mult (the most popular one). lo,hi = signed mul (rs * rt)
|
|
gpr.MapDirtyDirtyInIn(MIPSREG_LO, MIPSREG_HI, rs, rt);
|
|
SMULL(gpr.R(MIPSREG_LO), gpr.R(MIPSREG_HI), gpr.R(rs), gpr.R(rt));
|
|
break;
|
|
|
|
case 25: //multu (2nd) lo,hi = unsigned mul (rs * rt)
|
|
gpr.MapDirtyDirtyInIn(MIPSREG_LO, MIPSREG_HI, rs, rt);
|
|
UMULL(gpr.R(MIPSREG_LO), gpr.R(MIPSREG_HI), gpr.R(rs), gpr.R(rt));
|
|
break;
|
|
|
|
case 26: //div
|
|
if (cpu_info.bIDIVa)
|
|
{
|
|
gpr.MapDirtyDirtyInIn(MIPSREG_LO, MIPSREG_HI, rs, rt);
|
|
SDIV(gpr.R(MIPSREG_LO), gpr.R(rs), gpr.R(rt));
|
|
MUL(R0, gpr.R(rt), gpr.R(MIPSREG_LO));
|
|
SUB(gpr.R(MIPSREG_HI), gpr.R(rs), Operand2(R0));
|
|
} else {
|
|
DISABLE;
|
|
}
|
|
break;
|
|
|
|
case 27: //divu
|
|
if (cpu_info.bIDIVa)
|
|
{
|
|
gpr.MapDirtyDirtyInIn(MIPSREG_LO, MIPSREG_HI, rs, rt);
|
|
UDIV(gpr.R(MIPSREG_LO), gpr.R(rs), gpr.R(rt));
|
|
MUL(R0, gpr.R(rt), gpr.R(MIPSREG_LO));
|
|
SUB(gpr.R(MIPSREG_HI), gpr.R(rs), Operand2(R0));
|
|
} else {
|
|
DISABLE;
|
|
}
|
|
break;
|
|
|
|
case 28: //madd
|
|
gpr.MapDirtyDirtyInIn(MIPSREG_LO, MIPSREG_HI, rs, rt, false);
|
|
SMLAL(gpr.R(MIPSREG_LO), gpr.R(MIPSREG_HI), gpr.R(rs), gpr.R(rt));
|
|
break;
|
|
|
|
case 29: //maddu
|
|
gpr.MapDirtyDirtyInIn(MIPSREG_LO, MIPSREG_HI, rs, rt, false);
|
|
UMLAL(gpr.R(MIPSREG_LO), gpr.R(MIPSREG_HI), gpr.R(rs), gpr.R(rt));
|
|
break;
|
|
|
|
case 46: // msub
|
|
DISABLE;
|
|
gpr.MapDirtyDirtyInIn(MIPSREG_LO, MIPSREG_HI, rs, rt, false);
|
|
break;
|
|
|
|
case 47: // msubu
|
|
DISABLE;
|
|
gpr.MapDirtyDirtyInIn(MIPSREG_LO, MIPSREG_HI, rs, rt, false);
|
|
break;
|
|
|
|
default:
|
|
DISABLE;
|
|
}
|
|
}
|
|
|
|
}
|