236 lines
5.5 KiB
C
236 lines
5.5 KiB
C
/*
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This file is part of Emu-Pizza
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Emu-Pizza is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Emu-Pizza is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Emu-Pizza. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdio.h>
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#include <string.h>
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#include "cartridge.h"
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#include "sound.h"
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#include "mmu.h"
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#include "cycles.h"
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#include "gpu.h"
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#include "global.h"
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#include "input.h"
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#include "timer.h"
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#include "serial.h"
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#include "utils.h"
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#include "z80_gameboy_regs.h"
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#include "z80_gameboy.h"
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char gameboy_inited = 0;
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void gameboy_init()
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{
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/* init z80 */
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z80_init();
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/* init cycles syncronizer */
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cycles_init();
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/* init timer */
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timer_init();
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/* init serial */
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serial_init();
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/* init sound (this will start audio thread) */
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sound_init();
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/* reset GPU counters */
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gpu_reset();
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/* reset to default values */
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mmu_write_no_cyc(0xFF05, 0x00);
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mmu_write_no_cyc(0xFF06, 0x00);
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mmu_write_no_cyc(0xFF07, 0x00);
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mmu_write_no_cyc(0xFF10, 0x80);
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mmu_write_no_cyc(0xFF11, 0xBF);
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mmu_write_no_cyc(0xFF12, 0xF3);
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mmu_write_no_cyc(0xFF14, 0xBF);
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mmu_write_no_cyc(0xFF16, 0x3F);
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mmu_write_no_cyc(0xFF17, 0x00);
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mmu_write_no_cyc(0xFF19, 0xBF);
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mmu_write_no_cyc(0xFF1A, 0x7F);
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mmu_write_no_cyc(0xFF1B, 0xFF);
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mmu_write_no_cyc(0xFF1C, 0x9F);
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mmu_write_no_cyc(0xFF1E, 0xBF);
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mmu_write_no_cyc(0xFF20, 0xFF);
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mmu_write_no_cyc(0xFF21, 0x00);
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mmu_write_no_cyc(0xFF22, 0x00);
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mmu_write_no_cyc(0xFF23, 0xBF);
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mmu_write_no_cyc(0xFF24, 0x77);
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mmu_write_no_cyc(0xFF25, 0xF3);
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mmu_write_no_cyc(0xFF26, 0xF1);
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mmu_write_no_cyc(0xFF40, 0x91);
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mmu_write_no_cyc(0xFF41, 0x80);
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mmu_write_no_cyc(0xFF42, 0x00);
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mmu_write_no_cyc(0xFF43, 0x00);
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mmu_write_no_cyc(0xFF44, 0x00);
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mmu_write_no_cyc(0xFF45, 0x00);
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mmu_write_no_cyc(0xFF47, 0xFC);
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mmu_write_no_cyc(0xFF48, 0xFF);
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mmu_write_no_cyc(0xFF49, 0xFF);
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mmu_write_no_cyc(0xFF4A, 0x00);
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mmu_write_no_cyc(0xFF4B, 0x00);
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mmu_write_no_cyc(0xFF98, 0xDC);
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mmu_write_no_cyc(0xFFFF, 0x00);
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mmu_write_no_cyc(0xC000, 0x08);
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mmu_write_no_cyc(0xFFFE, 0x69);
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if (global_cgb)
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state.a = 0x11;
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else
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state.a = 0x00;
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state.b = 0x00;
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state.c = 0x13;
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state.d = 0x00;
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state.e = 0xd8;
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state.h = 0x01;
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state.l = 0x4d;
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state.pc = 0x0100;
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state.sp = 0xFFFE;
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*state.f = 0xB0;
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/* reset counter */
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cycles.cnt = 0;
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/* start at normal speed */
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global_cpu_double_speed = 0;
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/* mark as inited */
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gameboy_inited = 1;
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return;
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}
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void gameboy_run(uint64_t target)
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{
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uint8_t op;
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/* get interrupt flags and interrupt enables */
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uint8_t *int_e;
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uint8_t *int_f;
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/* pointers to memory location of interrupt enables/flags */
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int_e = mmu_addr(0xFFFF);
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int_f = mmu_addr(0xFF0F);
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/* run stuff! */
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/* mechanism is simple. */
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/* 1) execute instruction 2) update cycles counter 3) check interrupts */
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/* and repeat forever */
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while (cycles.sampleclock < target)
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{
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/* get op */
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op = mmu_read(state.pc);
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/* print out CPU state if enabled by debug flag */
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if (global_debug)
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{
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utils_log("OP: %02x F: %02x PC: %04x:%02x:%02x SP: %04x:%02x:%02x ",
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op, *state.f & 0xd0, state.pc,
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mmu_read_no_cyc(state.pc + 1),
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mmu_read_no_cyc(state.pc + 2), state.sp,
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mmu_read_no_cyc(state.sp),
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mmu_read_no_cyc(state.sp + 1));
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utils_log("A: %02x BC: %04x DE: %04x HL: %04x FF41: %02x "
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"FF44: %02x ENAB: %02x INTE: %02x INTF: %02x\n",
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state.a, *state.bc,
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*state.de, *state.hl,
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mmu_read_no_cyc(0xFF41),
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mmu_read_no_cyc(0xFF44),
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state.int_enable,
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*int_e, *int_f);
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}
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/* execute instruction by the GB Z80 version */
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z80_execute(op);
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/* if last op was Interrupt Enable (0xFB) */
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/* we need to check for INTR on next cycle */
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if (op == 0xFB)
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continue;
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/* interrupts filtered by enable flags */
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uint8_t int_r = (*int_f & *int_e);
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/* check for interrupts */
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if ((state.int_enable || op == 0x76) && (int_r != 0))
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{
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/* discard useless bits */
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if ((int_r & 0x1F) == 0x00)
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continue;
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/* beware of instruction that doesn't move PC! */
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/* like HALT (0x76) */
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if (op == 0x76)
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{
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state.pc++;
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if (state.int_enable == 0)
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continue;
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}
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/* reset int-enable flag, it will be restored after a RETI op */
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state.int_enable = 0;
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if ((int_r & 0x01) == 0x01)
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{
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/* vblank interrupt triggers RST 5 */
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/* reset flag */
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*int_f &= 0xFE;
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/* handle the interrupt */
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z80_intr(0x0040);
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}
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else if ((int_r & 0x02) == 0x02)
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{
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/* LCD Stat interrupt */
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/* reset flag */
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*int_f &= 0xFD;
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/* handle the interrupt! */
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z80_intr(0x0048);
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}
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else if ((int_r & 0x04) == 0x04)
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{
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/* timer interrupt */
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/* reset flag */
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*int_f &= 0xFB;
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/* handle the interrupt! */
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z80_intr(0x0050);
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}
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else if ((int_r & 0x08) == 0x08)
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{
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/* serial interrupt */
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/* reset flag */
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*int_f &= 0xF7;
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/* handle the interrupt! */
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z80_intr(0x0058);
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}
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}
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}
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}
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