429 lines
10 KiB
C#
429 lines
10 KiB
C#
#region Disch's Notes
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/*
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* Here are Disch's original notes:
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========================
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= Mapper 105 =
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========================
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aka
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--------------------------
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NES-EVENT
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Example Game:
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--------------------------
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Nintendo World Championships 1990
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Notes:
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---------------------------
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This mapper is an MMC1 with crazy wiring and a huge 30-bit CPU cycle driven IRQ counter. Registers are all
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internal and not directly accessable -- and the latch must be written to 1 bit at a time -- just like on a
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normal MMC1. For details on how regs are written to, see mapper 001.
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This mapper has 8k CHR-RAM, and it is not swappable.
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Registers:
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---------------------------
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Note that like a normal MMC1, registers are internal and not accessed directly.
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$8000-9FFF: [.... PSMM] Same as MMC1 (but CHR mode bit isn't used)
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$A000-BFFF: [...I OAA.]
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I = IRQ control / initialization toggle
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O = PRG Mode/Chip select
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A = PRG Reg 'A'
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$C000-DFFF: [.... ....] Unused
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$E000-FFFF: [...W BBBB]
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W = WRAM disable (same as MMC1)
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B = PRG Reg 'B'
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Powerup / Reset / Initialization:
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---------------------------
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On powerup and reset, the first 32k of PRG (from the first PRG chip) is selected at $8000 *no matter what*.
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PRG cannot be swapped until the mapper has been "initialized" by setting the 'I' bit to 0, then to '1'. This
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toggling will "unlock" PRG swapping on the mapper.
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Note 'I' also controls the IRQ counter (see below)
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PRG Setup:
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---------------------------
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There are 2 PRG chips, each 128k. The 'O' bit selects between the chips, and also determines which PRG Reg
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is used to select the page.
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O=0: Use first PRG chip (first 128k), use 'A' PRG Reg, 32k swap
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O=1: Use second PRG chip (second 128k), use 'B' PRG Reg, MMC1 style swap
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In addition, if the mapper has not been "unlocked", the first 32k of the first chip is always selected
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regardless (as if $A000 contained $00).
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Modes as listed below:
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$8000 $A000 $C000 $E000
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+-------------------------------+
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Uninitialized: | { 0 } | <-- use first 128k
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+-------------------------------+
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O=0: | $A000 | <-- use first 128k
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+-------------------------------+
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O=1, P=0: | <$E000> | <-- use second 128k
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+-------------------------------+
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O=1, P=1, S=0: | { 0 } | $E000 | <-- use second 128k
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+---------------+---------------+
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O=1, P=1, S=1: | $E000 | {$07} | <-- use second 128k
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+---------------+---------------+
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IRQ Counter:
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---------------------------
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The 'I' bit in $A000 controls the IRQ counter. When cleared, the IRQ counter counts up every cycle. When
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set, the IRQ counter is reset to 0 and stays there (does not count), and the pending IRQ is acknowledged.
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The cart has 4 dipswitches which control how high the counter must reach for an IRQ to be generated.
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The IRQ counter is 30 bits wide.. when it reaches the following value, an IRQ is fired:
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[1D CBAx xxxx xxxx xxxx xxxx xxxx xxxx]
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^ ^^^
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either 0 or 1, depending on the corresponding dipswitch.
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So if all dipswitches are open (use '0' above), the counter must reach $20000000.
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If all dipswitches are closed (use '1' above), the counter must reach $3E000000.
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etc
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In the official tournament, 'C' was closed, and the others were open, so the counter had to reach $2800000.
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*/
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#endregion
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using System.Collections.Generic;
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using System.Linq;
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using BizHawk.Common;
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using BizHawk.Common.NumberExtensions;
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namespace BizHawk.Emulation.Cores.Nintendo.NES
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{
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//AKA mapper 105
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public sealed class NES_EVENT : NES.NESBoardBase
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{
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//configuration
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int prg_bank_mask_16k;
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//regenerable state
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IntBuffer prg_banks_16k = new IntBuffer(2);
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//state
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MMC1.MMC1_SerialController scnt;
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bool c000_swappable, prg_32k_mode;
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bool irq_enable;
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int prg_a, prg_b;
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int init_sequence;
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bool chip_select;
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bool wram_disable;
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int irq_count;
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int irq_destination;
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bool irq_pending;
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[MapperProp]
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public bool Dipswitch1 = false;
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[MapperProp]
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public bool Dipswitch2 = true;
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[MapperProp]
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public bool Dipswitch3 = false;
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[MapperProp]
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public bool Dipswitch4 = false;
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private List<bool> Switches
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{
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get
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{
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return new List<bool>
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{
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{ Dipswitch1 },
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{ Dipswitch2 },
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{ Dipswitch3 },
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{ Dipswitch4 }
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};
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}
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}
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public int IrqDestination
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{
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get
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{
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SyncIRQDestination();
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return irq_destination;
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}
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}
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private void SyncIRQDestination()
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{
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//0b001D_CBAx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
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int val = 0;
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for (int i = 0; i < Switches.Count; i++)
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{
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val <<= 1;
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if (Switches[i])
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{
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val |= 1;
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}
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}
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irq_destination = 0x20000000 | (val << 25);
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}
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public override void Dispose()
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{
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base.Dispose();
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prg_banks_16k.Dispose();
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}
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public override void SyncState(Serializer ser)
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{
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base.SyncState(ser);
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scnt.SyncState(ser);
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ser.Sync("c000_swappable", ref c000_swappable);
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ser.Sync("prg_16k_mode", ref prg_32k_mode);
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ser.Sync("irq_enable", ref irq_enable);
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ser.Sync("irq_pending", ref irq_pending);
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ser.Sync("irq_count", ref irq_count);
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ser.Sync("prg_a", ref prg_a);
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ser.Sync("prg_b", ref prg_b);
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ser.Sync("init_sequence", ref init_sequence);
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ser.Sync("chip_select", ref chip_select);
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ser.Sync("wram_disable", ref wram_disable);
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ser.Sync("prg_banks_16k", ref prg_banks_16k);
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if (ser.IsReader) Sync();
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}
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public override bool Configure(NES.EDetectionOrigin origin)
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{
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switch (Cart.board_type)
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{
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case "MAPPER105":
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break;
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case "NES-EVENT":
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AssertPrg(256); AssertChr(0); AssertVram(8); AssertWram(8);
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break;
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default:
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return false;
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}
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prg_bank_mask_16k = Cart.prg_size / 16 - 1;
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init_sequence = 0;
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SetMirrorType(EMirrorType.Vertical);
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scnt = new MMC1.MMC1_SerialController();
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scnt.WriteRegister = SerialWriteRegister;
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scnt.Reset = SerialReset;
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InitValues();
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return true;
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}
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void SerialReset()
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{
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prg_32k_mode = true;
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c000_swappable = true;
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}
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void Sync()
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{
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SyncIRQDestination();
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SyncIRQ();
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if (init_sequence != 2)
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{
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// prg banks locked to first 32k of first 128k chip
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prg_banks_16k[0] = 0;
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prg_banks_16k[1] = 1;
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}
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else
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{
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if (!chip_select)
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{
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//use prg banks in first 128k as indicated by prg_a reg
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prg_banks_16k[0] = prg_a * 2;
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prg_banks_16k[1] = prg_a * 2 + 1;
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}
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else
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{
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if (!prg_32k_mode)
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{
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//use prg banks in second 128k (add 8*16k as offset) in 32k mode, as determined by prg_b reg
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prg_banks_16k[0] = ((prg_b & ~1) & 7) + 8;
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prg_banks_16k[1] = ((prg_b & ~1) & 7) + 9;
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}
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else
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{
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//((these arent tested, i think...))
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//"use second 128k"
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if (!c000_swappable)
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{
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prg_banks_16k[0] = 8;
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prg_banks_16k[1] = prg_b + 8;
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}
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else
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{
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prg_banks_16k[0] = prg_b + 8;
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prg_banks_16k[1] = 15; //last bank of second 128k
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}
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}
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}
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}
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prg_banks_16k[0] &= prg_bank_mask_16k;
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prg_banks_16k[1] &= prg_bank_mask_16k;
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}
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public override void WritePPU(int addr, byte value)
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{
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base.WritePPU(addr, value);
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}
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void SerialWriteRegister(int addr, int value)
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{
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switch (addr)
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{
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case 0: //8000-9FFF
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switch (value & 3)
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{
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case 0: SetMirrorType(EMirrorType.OneScreenA); break;
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case 1: SetMirrorType(EMirrorType.OneScreenB); break;
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case 2: SetMirrorType(EMirrorType.Vertical); break;
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case 3: SetMirrorType(EMirrorType.Horizontal); break;
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}
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c000_swappable = value.Bit(2);
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prg_32k_mode = value.Bit(3);
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Sync();
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break;
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case 1: //A000-BFFF
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{
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irq_enable = !value.Bit(4);
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//Acknowledge IRQ
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if (!irq_enable)
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{
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irq_count = 0;
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irq_pending = false;
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}
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if (init_sequence == 0 && irq_enable)
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{
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init_sequence = 1;
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}
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else if (init_sequence == 1 && !irq_enable)
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{
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init_sequence = 2;
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}
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chip_select = value.Bit(3);
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prg_a = (value >> 1) & 3;
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Sync();
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break;
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}
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case 2: //C000-DFFF
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//unused
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break;
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case 3: //E000-FFFF
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prg_b = value & 0xF;
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wram_disable = value.Bit(4);
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Sync();
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break;
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}
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//board.NES.LogLine("mapping.. chr_mode={0}, chr={1},{2}", chr_mode, chr_0, chr_1);
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//board.NES.LogLine("mapping.. prg_mode={0}, prg_slot{1}, prg={2}", prg_mode, prg_slot, prg);
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}
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public override void WriteWRAM(int addr, byte value)
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{
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if (!wram_disable)
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{
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base.WriteWRAM(addr, value);
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}
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}
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public override byte ReadWRAM(int addr)
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{
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return wram_disable ? NES.DB : base.ReadWRAM(addr);
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}
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public override void NESSoftReset()
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{
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InitValues();
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base.NESSoftReset();
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}
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private void InitValues()
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{
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AutoMapperProps.Apply(this);
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irq_enable = false;
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init_sequence = 0;
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irq_count = 0;
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Sync();
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}
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public override void WritePRG(int addr, byte value)
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{
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scnt.Write(addr, value);
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}
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public override byte ReadPRG(int addr)
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{
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int bank_16k = addr >> 14;
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int ofs = addr & ((1 << 14) - 1);
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bank_16k = prg_banks_16k[bank_16k];
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addr = (bank_16k << 14) | ofs;
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return ROM[addr];
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}
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public override void ClockCPU()
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{
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if (irq_enable)
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{
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ClockIRQ();
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}
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}
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private void ClockIRQ()
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{
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irq_count++;
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if (irq_count >= irq_destination)
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{
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irq_enable = false;
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irq_pending = true;
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}
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SyncIRQ();
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}
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private void SyncIRQ()
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{
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SyncIRQ(irq_pending);
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}
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}
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} |