197 lines
5.4 KiB
C#
197 lines
5.4 KiB
C#
using BizHawk.Emulation.Cores.Components.Z80A;
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using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Text;
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using System.Threading.Tasks;
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namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
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{
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public class ZX48 : SpectrumBase
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{
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#region Construction
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/// <summary>
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/// Main constructor
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/// </summary>
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/// <param name="spectrum"></param>
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/// <param name="cpu"></param>
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public ZX48(ZXSpectrum spectrum, Z80A cpu, byte[] file)
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{
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Spectrum = spectrum;
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CPU = cpu;
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// init addressable memory from ROM and RAM banks
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/*
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Memory.Add(0, ROM0);
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Memory.Add(1, RAM0);
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Memory.Add(2, RAM1);
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Memory.Add(3, RAM2);
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*/
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ReInitMemory();
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//RAM = new byte[0x4000 + 0xC000];
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InitScreenConfig();
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InitScreen();
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ResetULACycle();
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BuzzerDevice = new Buzzer(this);
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BuzzerDevice.Init(44100, UlaFrameCycleCount);
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KeyboardDevice = new Keyboard48(this);
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TapeProvider = new DefaultTapeProvider(file);
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TapeDevice = new Tape(TapeProvider);
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TapeDevice.Init(this);
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}
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#endregion
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#region MemoryMapping
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/* 48K Spectrum has NO memory paging
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*
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* 0xffff +--------+
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| Bank 2 |
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0xc000 +--------+
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| Bank 1 |
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0x8000 +--------+
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| Bank 0 |
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| screen |
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0x4000 +--------+
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| ROM 0 |
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0x0000 +--------+
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*/
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/// <summary>
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/// Simulates reading from the bus (no contention)
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/// Paging should be handled here
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/// </summary>
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/// <param name="addr"></param>
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/// <returns></returns>
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public override byte ReadBus(ushort addr)
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{
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int divisor = addr / 0x4000;
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// paging logic goes here
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var bank = Memory[divisor];
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var index = addr % 0x4000;
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return bank[index];
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}
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/// <summary>
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/// Pushes a value onto the data bus that should be valid as long as the interrupt is true
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/// </summary>
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/// <param name="addr"></param>
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/// <returns></returns>
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public override byte PushBus()
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{
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return 0xFF;
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}
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/// <summary>
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/// Simulates writing to the bus (no contention)
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/// Paging should be handled here
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/// </summary>
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/// <param name="addr"></param>
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/// <param name="value"></param>
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public override void WriteBus(ushort addr, byte value)
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{
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int divisor = addr / 0x4000;
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// paging logic goes here
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var bank = Memory[divisor];
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var index = addr % 0x4000;
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bank[index] = value;
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}
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/// <summary>
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/// Reads a byte of data from a specified memory address
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/// (with memory contention if appropriate)
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/// </summary>
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/// <param name="addr"></param>
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/// <returns></returns>
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public override byte ReadMemory(ushort addr)
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{
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var data = ReadBus(addr);
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if ((addr & 0xC000) == 0x4000)
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{
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// addr is in RAM not ROM - apply memory contention if neccessary
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var delay = GetContentionValue(CurrentFrameCycle);
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CPU.TotalExecutedCycles += delay;
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}
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return data;
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}
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/// <summary>
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/// Writes a byte of data to a specified memory address
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/// (with memory contention if appropriate)
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/// </summary>
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/// <param name="addr"></param>
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/// <param name="value"></param>
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public override void WriteMemory(ushort addr, byte value)
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{
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if (addr < 0x4000)
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{
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// Do nothing - we cannot write to ROM
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return;
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}
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else if (addr < 0xC000)
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{
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// possible contended RAM
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var delay = GetContentionValue(CurrentFrameCycle);
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CPU.TotalExecutedCycles += delay;
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}
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WriteBus(addr, value);
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}
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public override void ReInitMemory()
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{
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if (Memory.ContainsKey(0))
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Memory[0] = ROM0;
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else
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Memory.Add(0, ROM0);
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if (Memory.ContainsKey(1))
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Memory[1] = RAM0;
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else
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Memory.Add(1, RAM0);
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if (Memory.ContainsKey(2))
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Memory[2] = RAM1;
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else
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Memory.Add(2, RAM1);
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if (Memory.ContainsKey(3))
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Memory[3] = RAM2;
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else
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Memory.Add(3, RAM2);
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if (Memory.ContainsKey(4))
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Memory[4] = RAM3;
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else
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Memory.Add(4, RAM3);
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}
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#endregion
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}
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}
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