171 lines
7.5 KiB
C
171 lines
7.5 KiB
C
///////////////////////////////////////////////////////////////
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// File: v810_opt.h
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//
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// Description: Defines used in v810_dis.cpp
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//
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#ifndef V810_OPT_H_
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#define V810_OPT_H_
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#define sign_26(num) ((uint32)sign_x_to_s32(26, num))
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#define sign_16(num) ((uint32)(int16)(num))
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#define sign_14(num) ((uint32)sign_x_to_s32(14, num))
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#define sign_12(num) ((uint32)sign_x_to_s32(12, num))
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#define sign_9(num) ((uint32)sign_x_to_s32(9, num))
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#define sign_8(_value) ((uint32)(int8)(_value))
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#define sign_5(num) ((uint32)sign_x_to_s32(5, num))
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///////////////////////////////////////////////////////////////////
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// Define Modes
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#define AM_I 0x01
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#define AM_II 0x02
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#define AM_III 0x03
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#define AM_IV 0x04
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#define AM_V 0x05
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#define AM_VIa 0x06 // Mode6 form1
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#define AM_VIb 0x0A // Mode6 form2
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#define AM_VII 0x07
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#define AM_VIII 0x08
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#define AM_IX 0x09
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#define AM_BSTR 0x0B // Bit String Instructions
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#define AM_FPP 0x0C // Floating Point Instructions
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#define AM_UDEF 0x0D // Unknown/Undefined Instructions
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///////////////////////////////////////////////////////////////////
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// Table of Instructions Address Modes
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static const int addr_mode[80] = {
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AM_I, AM_I, AM_I, AM_I, AM_I, AM_I, AM_I, AM_I,
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AM_I, AM_I, AM_I, AM_I, AM_I, AM_I, AM_I, AM_I,
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AM_II, AM_II, AM_II, AM_II, AM_II, AM_II, AM_II, AM_II,
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AM_II, AM_IX, AM_IX, AM_UDEF, AM_II, AM_II, AM_II, AM_BSTR,
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AM_UDEF, AM_UDEF, AM_UDEF, AM_UDEF, AM_UDEF, AM_UDEF, AM_UDEF, AM_UDEF,
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AM_V, AM_V, AM_IV, AM_IV, AM_V, AM_V, AM_V, AM_V,
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AM_VIa, AM_VIa, AM_UDEF, AM_VIa, AM_VIb, AM_VIb, AM_UDEF, AM_VIb,
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AM_VIa, AM_VIa, AM_VIa, AM_VIa, AM_VIb, AM_VIb, AM_FPP, AM_VIb,
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AM_III, AM_III, AM_III, AM_III, AM_III, AM_III, AM_III, AM_III,
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AM_III, AM_III, AM_III, AM_III, AM_III, AM_III, AM_III, AM_III
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};
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// All instructions greater than 0x50 are undefined (this should not be posible of cource)
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///////////////////////////////////////////////////////////////////
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// Opcodes for V810 Instruction set
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#define MOV 0x00
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#define ADD 0x01
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#define SUB 0x02
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#define CMP 0x03
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#define SHL 0x04
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#define SHR 0x05
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#define JMP 0x06
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#define SAR 0x07
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#define MUL 0x08
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#define DIV 0x09
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#define MULU 0x0A
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#define DIVU 0x0B
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#define OR 0x0C
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#define AND 0x0D
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#define XOR 0x0E
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#define NOT 0x0F
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#define MOV_I 0x10
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#define ADD_I 0x11
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#define SETF 0x12
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#define CMP_I 0x13
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#define SHL_I 0x14
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#define SHR_I 0x15
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#define EI 0x16
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#define SAR_I 0x17
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#define TRAP 0x18
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#define RETI 0x19
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#define HALT 0x1A
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//0x1B
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#define LDSR 0x1C
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#define STSR 0x1D
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#define DI 0x1E
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#define BSTR 0x1F //Special Bit String Inst
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//0x20 - 0x27 // Lost to Branch Instructions
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#define MOVEA 0x28
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#define ADDI 0x29
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#define JR 0x2A
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#define JAL 0x2B
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#define ORI 0x2C
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#define ANDI 0x2D
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#define XORI 0x2E
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#define MOVHI 0x2F
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#define LD_B 0x30
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#define LD_H 0x31
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//0x32
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#define LD_W 0x33
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#define ST_B 0x34
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#define ST_H 0x35
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//0x36
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#define ST_W 0x37
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#define IN_B 0x38
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#define IN_H 0x39
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#define CAXI 0x3A
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#define IN_W 0x3B
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#define OUT_B 0x3C
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#define OUT_H 0x3D
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#define FPP 0x3E //Special Float Inst
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#define OUT_W 0x3F
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// Branch Instructions ( Extended opcode only for Branch command)
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// Common instrcutions commented out
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#define BV 0x40
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#define BL 0x41
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#define BE 0x42
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#define BNH 0x43
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#define BN 0x44
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#define BR 0x45
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#define BLT 0x46
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#define BLE 0x47
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#define BNV 0x48
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#define BNL 0x49
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#define BNE 0x4A
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#define BH 0x4B
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#define BP 0x4C
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#define NOP 0x4D
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#define BGE 0x4E
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#define BGT 0x4F
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//#define BC 0x41
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//#define BZ 0x42
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//#define BNC 0x49
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//#define BNZ 0x4A
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// Bit String Subopcodes
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#define SCH0BSU 0x00
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#define SCH0BSD 0x01
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#define SCH1BSU 0x02
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#define SCH1BSD 0x03
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#define ORBSU 0x08
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#define ANDBSU 0x09
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#define XORBSU 0x0A
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#define MOVBSU 0x0B
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#define ORNBSU 0x0C
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#define ANDNBSU 0x0D
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#define XORNBSU 0x0E
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#define NOTBSU 0x0F
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// Floating Point Subopcodes
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#define CMPF_S 0x00
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#define CVT_WS 0x02
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#define CVT_SW 0x03
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#define ADDF_S 0x04
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#define SUBF_S 0x05
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#define MULF_S 0x06
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#define DIVF_S 0x07
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#define XB 0x08
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#define XH 0x09
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#define REV 0x0A
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#define TRNC_SW 0x0B
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#define MPYHW 0x0C
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#endif //DEFINE_H
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