160 lines
4.6 KiB
C#
160 lines
4.6 KiB
C#
using System;
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using System.Collections.Generic;
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namespace BizHawk.Emulation.Cores.Computers.AmstradCPC
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{
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/// <summary>
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/// The abstract class that all emulated models will inherit from
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/// * Memory *
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/// </summary>
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public abstract partial class CPCBase
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{
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#region Memory Fields & Properties
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/* ROM Banks */
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/// <summary>
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/// Lower: OS ROM
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/// </summary>
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public byte[] ROMLower = new byte[0x4000];
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/// <summary>
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/// Upper: POS 0 (usually BASIC)
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/// </summary>
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public byte[] ROM0 = new byte[0x4000];
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/// <summary>
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/// Upper: POS 7 (usually AMSDOS)
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/// </summary>
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public byte[] ROM7 = new byte[0x4000];
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/* RAM Banks - Lower 64K */
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public byte[] RAM0 = new byte[0x4000];
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public byte[] RAM1 = new byte[0x4000];
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public byte[] RAM2 = new byte[0x4000];
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public byte[] RAM3 = new byte[0x4000];
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/* RAM Banks - Upper 64K */
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public byte[] RAM4 = new byte[0x4000];
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public byte[] RAM5 = new byte[0x4000];
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public byte[] RAM6 = new byte[0x4000];
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public byte[] RAM7 = new byte[0x4000];
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/// <summary>
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/// Signs whether Upper ROM is paged in
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/// </summary>
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public bool UpperROMPaged;
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/// <summary>
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/// The position of the currently paged upper ROM
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/// </summary>
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public int UpperROMPosition;
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/// <summary>
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/// Signs whether Lower ROM is paged in
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/// </summary>
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public bool LowerROMPaged;
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/// <summary>
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/// The currently selected RAM config
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/// </summary>
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public int RAMConfig;
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/// <summary>
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/// Always 0 on a CPC6128
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/// On a machine with more than 128K RAM (standard memory expansion) this selects each additional 64K above the first upper 64K
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/// </summary>
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public int RAM64KBank;
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#endregion
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#region Memory Related Methods
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/// <summary>
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/// Simulates reading from the bus
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/// Paging should be handled here
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/// </summary>
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/// <param name="addr"></param>
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/// <returns></returns>
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public abstract byte ReadBus(ushort addr);
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/// <summary>
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/// Pushes a value onto the data bus that should be valid as long as the interrupt is true
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/// </summary>
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/// <param name="addr"></param>
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/// <returns></returns>
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public virtual byte PushBus()
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{
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return 0xFF;
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}
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/// <summary>
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/// Simulates writing to the bus
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/// Paging should be handled here
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/// </summary>
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/// <param name="addr"></param>
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/// <param name="value"></param>
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public abstract void WriteBus(ushort addr, byte value);
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/// <summary>
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/// Reads a byte of data from a specified memory address
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/// (with memory contention if appropriate)
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/// </summary>
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/// <param name="addr"></param>
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/// <returns></returns>
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public abstract byte ReadMemory(ushort addr);
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/// <summary>
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/// Writes a byte of data to a specified memory address
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/// (with memory contention if appropriate)
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/// </summary>
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/// <param name="addr"></param>
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/// <param name="value"></param>
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public abstract void WriteMemory(ushort addr, byte value);
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/// <summary>
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/// Sets up the ROM
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/// </summary>
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/// <param name="buffer"></param>
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public abstract void InitROM(RomData[] romData);
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/// <summary>
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/// ULA reads the memory at the specified address
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/// (No memory contention)
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/// </summary>
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/// <param name="addr"></param>
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/// <returns></returns>
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public virtual byte FetchScreenMemory(ushort addr)
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{
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int divisor = addr / 0x4000;
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byte result = 0xff;
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switch (divisor)
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{
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// 0x000
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case 0:
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result = RAM0[addr % 0x4000];
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break;
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// 0x4000
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case 1:
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result = RAM1[addr % 0x4000];
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break;
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// 0x8000
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case 2:
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result = RAM2[addr % 0x4000];
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break;
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// 0xc000 or UpperROM
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case 3:
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result = RAM3[addr % 0x4000];
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break;
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default:
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break;
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}
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return result;
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}
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#endregion
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}
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}
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