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BizHawk/BizHawk.Emulation/CPUs/68000
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beirich a1d8e9a209 68000: implement UNLK, RTE, TRAP, ANDI to SR, and EORI to SR 2011-10-09 03:51:57 +00:00
..
Instructions 68000: implement UNLK, RTE, TRAP, ANDI to SR, and EORI to SR 2011-10-09 03:51:57 +00:00
Diassembler.cs 68000: implement UNLK, RTE, TRAP, ANDI to SR, and EORI to SR 2011-10-09 03:51:57 +00:00
M68000.cs 68000: implement UNLK, RTE, TRAP, ANDI to SR, and EORI to SR 2011-10-09 03:51:57 +00:00
Memory.cs 68000: implement AND, OR, EOR. Fix interrupt bug. Fix bug with SR register 2011-10-08 19:57:22 +00:00
OpcodeTable.cs 68000: implement UNLK, RTE, TRAP, ANDI to SR, and EORI to SR 2011-10-09 03:51:57 +00:00
Tables.cs 68000: implement AND, OR, EOR. Fix interrupt bug. Fix bug with SR register 2011-10-08 19:57:22 +00:00