98 lines
3.2 KiB
C#
98 lines
3.2 KiB
C#
namespace BizHawk.Emulation.Cores.Sega.MasterSystem
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{
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public partial class SMS
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{
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// =======================================================================
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// The CodeMasters mapper has 3 banks of 16kb, like the Sega mapper.
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// The differences are that the paging control addresses are different, and the first 1K of ROM is not protected.
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// Bank 0: Control Address $0000 - Maps $0000 - $3FFF
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// Bank 1: Control Address $4000 - Maps $4000 - $7FFF
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// Bank 2: Control Address $8000 - Maps $8000 - $BFFF
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// System RAM is at $C000+ as in the Sega mapper.
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// =======================================================================
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byte ReadMemoryCM(ushort address)
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{
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if (address < 0x4000) return RomData[(RomBank0 * BankSize) + address];
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if (address < 0x8000) return RomData[(RomBank1 * BankSize) + (address & BankSizeMask)];
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if (address < 0xC000) return RomData[(RomBank2 * BankSize) + (address & BankSizeMask)];
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return SystemRam[address & RamSizeMask];
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}
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void WriteMemoryCM(ushort address, byte value)
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{
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if (address >= 0xC000)
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SystemRam[address & RamSizeMask] = value;
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else if (address == 0x0000) RomBank0 = (byte)(value % RomBanks);
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else if (address == 0x4000) RomBank1 = (byte)(value % RomBanks);
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else if (address == 0x8000) RomBank2 = (byte)(value % RomBanks);
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}
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void InitCodeMastersMapper()
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{
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Cpu.ReadMemory = ReadMemoryCM;
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Cpu.WriteMemory = WriteMemoryCM;
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WriteMemoryCM(0x0000, 0);
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WriteMemoryCM(0x4000, 1);
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WriteMemoryCM(0x8000, 0);
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}
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// =======================================================================
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// CodeMasters with on-board volatile RAM
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// =======================================================================
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byte ReadMemoryCMRam(ushort address)
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{
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if (address < 0x4000)
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return RomData[(RomBank0 * BankSize) + address];
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if (address < 0x8000)
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{
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if (address >= 0x6000 && RomBank3 == 1)
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return ExtRam[address & 0x1FFF];
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return RomData[(RomBank1 * BankSize) + (address & BankSizeMask)];
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}
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if (address < 0xC000)
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{
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if (address >= 0xA000 && RomBank3 == 1)
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return ExtRam[address & 0x1FFF];
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return RomData[(RomBank2 * BankSize) + (address & BankSizeMask)];
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}
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return SystemRam[address & RamSizeMask];
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}
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void WriteMemoryCMRam(ushort address, byte value)
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{
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if (address >= 0xC000)
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SystemRam[address & RamSizeMask] = value;
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else if (address == 0x0000)
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RomBank0 = (byte)(value & 0xF);
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else if (address == 0x4000)
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{
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RomBank1 = (byte)(value & 0xF);
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RomBank3 = (byte)(((value & 0x80) != 0) ? 1 : 0);
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}
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else if (address == 0x8000)
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RomBank2 = (byte)(value & 0xF);
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else if (address >= 0x6000 && address < 0x8000 && RomBank3 == 1)
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ExtRam[address & 0x1FFF] = value;
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else if (address >= 0xA000 && address < 0xC000 && RomBank3 == 1)
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ExtRam[address & 0x1FFF] = value;
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}
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void InitCodeMastersMapperRam()
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{
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Cpu.ReadMemory = ReadMemoryCMRam;
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Cpu.WriteMemory = WriteMemoryCMRam;
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WriteMemoryCM(0x0000, 0);
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WriteMemoryCM(0x4000, 1);
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WriteMemoryCM(0x8000, 0);
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ExtRam = new byte[8192];
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RomBank3 = 0;
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}
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}
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}
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