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BizHawk/BizHawk.Emulation.Cores/CPUs/Z80A
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alyosha-tas 81e80acf86 z80: make TotalExecutedCycles long and change related variables accordingly 2018-03-18 09:55:56 -04:00
..
Execute.cs z80: make TotalExecutedCycles long and change related variables accordingly 2018-03-18 09:55:56 -04:00
Interrupts.cs z80: clean up 2018-03-16 17:50:51 -04:00
NewDisassembler.cs z80: clean up 2018-03-16 17:50:51 -04:00
Operations.cs z80: fix port access behaviour 2017-12-01 08:20:18 -05:00
ReadMe.txt z80: clean up 2018-03-16 17:50:51 -04:00
Registers.cs z80: implement data bus 2017-11-29 16:28:08 -05:00
Tables_Direct.cs z80: fix port access behaviour 2017-12-01 08:20:18 -05:00
Tables_Indirect.cs z80: fix port addressing in some cases 2018-03-15 20:47:47 -04:00
Z80A.cs z80: make TotalExecutedCycles long and change related variables accordingly 2018-03-18 09:55:56 -04:00

ReadMe.txt 

TODO: 

Mode 0
Check T-cycle level memory access timing
Check R register 
new tests for WZ Registers
Memory refresh - IR is pushed onto the address bus at instruction start, does anything need this?