124 lines
3.1 KiB
C#
124 lines
3.1 KiB
C#
using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Text;
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namespace BizHawk.Emulation.Consoles.Atari._2600
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{
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/*
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E7 (M-Network)
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-----
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M-network wanted something of their own too, so they came up with what they called
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"Big Game" (this was printed on the prototype ASICs on the prototype carts). It
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can handle up to 16K of ROM and 2K of RAM.
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1000-17FF is selectable
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1800-19FF is RAM
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1A00-1FFF is fixed to the last 1.5K of ROM
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Accessing 1FE0 through 1FE6 selects bank 0 through bank 6 of the ROM into 1000-17FF.
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Accessing 1FE7 enables 1K of the 2K RAM, instead.
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When the RAM is enabled, this 1K appears at 1000-17FF. 1000-13FF is the write port, 1400-17FF
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is the read port.
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1800-19FF also holds RAM. 1800-18FF is the write port, 1900-19FF is the read port.
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Only 256 bytes of RAM is accessable at time, but there are four different 256 byte
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banks making a total of 1K accessable here.
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Accessing 1FE8 through 1FEB select which 256 byte bank shows up.
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*/
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class mE7 : MapperBase
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{
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int toggle = 0;
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int rambank1_toggle = 0;
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ByteBuffer rambank0 = new ByteBuffer(1024);
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ByteBuffer rambank1 = new ByteBuffer(1024);
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bool EnableRam0 = false;
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public override byte ReadMemory(ushort addr)
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{
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Address(addr);
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if (addr < 0x1000) return base.ReadMemory(addr);
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else if (addr < 0x1400)
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{
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if (EnableRam0)
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{
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return rambank0[(addr & 1023)];
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}
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else
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{
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return core.rom[toggle * 2 * 1024 + (addr & 0x7FF)];
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}
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}
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else if (addr < 0x1800) return core.rom[toggle * 2 * 1024 + (addr & 0x7FF)];
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else if (addr < 0x1A00) return rambank1[toggle * 256 + (addr & 0x255)];
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else if (addr < 0x2000)
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return core.rom[14848 + (addr & 0x5FF)]; //Fixed to last 1.5K
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else return base.ReadMemory(addr);
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}
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public override void WriteMemory(ushort addr, byte value)
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{
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Address(addr);
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if (addr < 0x1000) base.WriteMemory(addr, value);
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else if (addr < 0x1400) rambank0[addr & 0x3FF] = value;
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else if (addr >= 0x1800 && addr < 0x2000) rambank0[(addr & 0xFF) + (rambank1_toggle * 0x100)] = value;
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}
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public override void SyncState(Serializer ser)
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{
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base.SyncState(ser);
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ser.Sync("toggle", ref toggle);
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ser.Sync("rambank0", ref rambank0);
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ser.Sync("rambank1", ref rambank1);
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ser.Sync("EnableRam0", ref EnableRam0);
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ser.Sync("rambank1_toggle", ref rambank1_toggle);
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}
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void Address(ushort addr)
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{
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switch (addr)
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{
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case 0x1FE0:
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toggle = 0;
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break;
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case 0x1FE1:
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toggle = 1;
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break;
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case 0x1FE2:
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toggle = 2;
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break;
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case 0x1FE3:
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toggle = 3;
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break;
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case 0x1FE4:
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toggle = 4;
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break;
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case 0x1FE5:
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toggle = 5;
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break;
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case 0x1FE6:
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toggle = 6;
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break;
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case 0x1FE7:
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EnableRam0 = true;
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break;
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case 0x1FE8:
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rambank1_toggle = 0;
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break;
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case 0x1FE9:
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rambank1_toggle = 1;
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break;
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case 0x1FEA:
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rambank1_toggle = 2;
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break;
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case 0x1FEB:
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rambank1_toggle = 3;
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break;
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}
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}
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}
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}
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