34 lines
941 B
C
34 lines
941 B
C
//
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// dsp.h
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//
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#ifndef __DSP_H__
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#define __DSP_H__
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#include "memory.h"
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#define DSP_CONTROL_RAM_BASE 0x00F1A100
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#define DSP_WORK_RAM_BASE 0x00F1B000
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void DSPInit(void);
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void DSPReset(void);
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void DSPExec(int32_t);
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void DSPSetIRQLine(int irqline, int state);
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uint8_t DSPReadByte(uint32_t offset, uint32_t who = UNKNOWN);
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uint16_t DSPReadWord(uint32_t offset, uint32_t who = UNKNOWN);
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uint32_t DSPReadLong(uint32_t offset, uint32_t who = UNKNOWN);
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void DSPWriteByte(uint32_t offset, uint8_t data, uint32_t who = UNKNOWN);
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void DSPWriteWord(uint32_t offset, uint16_t data, uint32_t who = UNKNOWN);
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void DSPWriteLong(uint32_t offset, uint32_t data, uint32_t who = UNKNOWN);
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bool DSPIsRunning(void);
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// Exported vars
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extern uint32_t dsp_reg_bank_0[], dsp_reg_bank_1[];
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// DSP interrupt numbers (in $F1A100, bits 4-8 & 16)
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enum { DSPIRQ_CPU = 0, DSPIRQ_SSI, DSPIRQ_TIMER0, DSPIRQ_TIMER1, DSPIRQ_EXT0, DSPIRQ_EXT1 };
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#endif // __DSP_H__
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