164 lines
4.8 KiB
C
164 lines
4.8 KiB
C
/*
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* The SVP chip emulator, mem I/O stuff
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*
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* Copyright (c) Gražvydas "notaz" Ignotas, 2008
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the organization nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "../../pico_int.h"
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#include "../../memory.h"
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// for wait loop det
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static void PicoWrite16_dram(u32 a, u32 d)
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{
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a &= ~0xfe0000;
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if (d != 0) {
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if (a == 0xfe06) // 30fe06
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svp->ssp1601.emu_status &= ~SSP_WAIT_30FE06;
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else if (a == 0xfe08)
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svp->ssp1601.emu_status &= ~SSP_WAIT_30FE08;
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}
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((u16 *)svp->dram)[a / 2] = d;
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}
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// "cell arrange" 1: 390000-39ffff
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static u32 PicoRead16_svpca1(u32 a)
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{
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// this is 68k code rewritten
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u32 a1 = a >> 1;
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a1 = (a1 & 0x7001) | ((a1 & 0x3e) << 6) | ((a1 & 0xfc0) >> 5);
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return ((u16 *)svp->dram)[a1];
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}
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// "cell arrange" 2: 3a0000-3affff
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static u32 PicoRead16_svpca2(u32 a)
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{
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u32 a1 = a >> 1;
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a1 = (a1 & 0x7801) | ((a1 & 0x1e) << 6) | ((a1 & 0x7e0) >> 4);
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return ((u16 *)svp->dram)[a1];
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}
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// IO/control area (0xa10000 - 0xa1ffff)
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static u32 PicoRead16_svpr(u32 a)
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{
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u32 d = 0;
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// regs
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if ((a & ~0x0f) == 0xa15000) {
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switch (a & 0xf) {
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case 0:
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case 2:
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d = svp->ssp1601.gr[SSP_XST].h;
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break;
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case 4:
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d = svp->ssp1601.gr[SSP_PM0].h;
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svp->ssp1601.gr[SSP_PM0].h &= ~1;
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break;
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}
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#if EL_LOGMASK & EL_SVP
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{
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static int a15004_looping = 0;
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if (a == 0xa15004 && (d & 1))
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a15004_looping = 0;
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if (!a15004_looping)
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elprintf(EL_SVP, "SVP r%i: [%06x] %04x @%06x", realsize, a, d, SekPc);
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if (a == 0xa15004 && !(d&1)) {
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if (!a15004_looping)
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elprintf(EL_SVP, "SVP det TIGHT loop: a15004");
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a15004_looping = 1;
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}
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else
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a15004_looping = 0;
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}
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#endif
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return d;
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}
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//if (a == 0x30fe02 && d == 0)
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// elprintf(EL_ANOMALY, "SVP lag?");
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return PicoRead16_io(a);
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}
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// used in VR test mode
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static u32 PicoRead8_svpr(u32 a)
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{
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u32 d;
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if ((a & ~0x0f) != 0xa15000)
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return PicoRead8_io(a);
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d = PicoRead16_svpr(a & ~1);
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if (!(a & 1))
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d >>= 8;
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return d;
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}
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static void PicoWrite16_svpr(u32 a, u32 d)
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{
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elprintf(EL_SVP, "SVP w16: [%06x] %04x @%06x", a, d, SekPc);
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if ((a & ~0x0f) == 0xa15000) {
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if (a == 0xa15000 || a == 0xa15002) {
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// just guessing here
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svp->ssp1601.gr[SSP_XST].h = d;
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svp->ssp1601.gr[SSP_PM0].h |= 2;
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svp->ssp1601.emu_status &= ~SSP_WAIT_PM0;
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}
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//else if (a == 0xa15006) svp->ssp1601.gr[SSP_PM0].h = d | (d << 1);
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// 0xa15006 probably has 'halt'
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return;
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}
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PicoWrite16_io(a, d);
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}
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void PicoSVPMemSetup(void)
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{
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// 68k memmap:
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// DRAM
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cpu68k_map_set(m68k_read8_map, 0x300000, 0x31ffff, svp->dram, 0);
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cpu68k_map_set(m68k_read16_map, 0x300000, 0x31ffff, svp->dram, 0);
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cpu68k_map_set(m68k_write8_map, 0x300000, 0x31ffff, svp->dram, 0);
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cpu68k_map_set(m68k_write16_map, 0x300000, 0x31ffff, svp->dram, 0);
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cpu68k_map_set(m68k_write16_map, 0x300000, 0x30ffff, PicoWrite16_dram, 1);
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// DRAM (cell arrange)
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cpu68k_map_set(m68k_read16_map, 0x390000, 0x39ffff, PicoRead16_svpca1, 1);
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cpu68k_map_set(m68k_read16_map, 0x3a0000, 0x3affff, PicoRead16_svpca2, 1);
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// regs
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cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_svpr, 1);
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cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_svpr, 1);
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cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1); // PicoWrite8_svpr
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cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_svpr, 1);
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}
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