saxxonpike
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ae8566a0df
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commodore64: made some input changes (more fixes to come later), removed some duplication in pin information between PLA, CPU and cartridge port
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2012-11-30 21:12:23 +00:00 |
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saxxonpike
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c1f9a131d5
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commodore64: add mapper 000B (some educational titles) and mapper 0011 (a couple obscure games), increase PLA memory map efficiency
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2012-11-29 20:15:02 +00:00 |
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saxxonpike
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d05bd47ed0
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commodore64: add cartridge mapper 0005 (Ocean), should cover a few high profile games
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2012-11-29 06:29:42 +00:00 |
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saxxonpike
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1e6fdc2659
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commodore64: VIC reads from proper bank, increased performance
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2012-11-29 02:46:35 +00:00 |
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saxxonpike
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b55d6526d1
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commodore64: PRG loading uses a more robust method
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2012-11-28 17:49:42 +00:00 |
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saxxonpike
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e490d1be04
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commodore64: input added back, this method is closer to the circuitry itself
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2012-11-28 17:26:40 +00:00 |
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saxxonpike
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49a847d8bc
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commodore64: VIC timing fix, implemented new cartridge I/O which handles writes into ROM addresses (apparently some carts use this)
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2012-11-28 03:30:59 +00:00 |
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saxxonpike
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e44c6cfa55
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commodore64: RAM striping 00/FF
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2012-11-27 20:47:03 +00:00 |
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saxxonpike
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ccc332f8e2
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commodore64: unconnected pin values in the 6510 I/O port $01 register fade over time (Aurora90%), need to verify the TTL on that sometime
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2012-11-27 20:23:27 +00:00 |
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saxxonpike
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95d228f413
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commodore64: new core with focus on low-level comm between chips and activity on both phases of the clock
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2012-11-27 05:11:40 +00:00 |