adelikat
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906c0316a6
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namespace changes to BizHawk.Emulation Cpus
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2013-11-14 15:01:32 +00:00 |
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beirich
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5a5a424cc7
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gen: some work on renderer.
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2011-10-18 03:48:37 +00:00 |
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beirich
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5b5c7c2890
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68000: add MULU, MULS, DIVU, DIVS, MOVE to CCR
Some genesis source reorganization
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2011-10-11 03:52:44 +00:00 |
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beirich
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a1d8e9a209
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68000: implement UNLK, RTE, TRAP, ANDI to SR, and EORI to SR
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2011-10-09 03:51:57 +00:00 |
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beirich
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1c38de023e
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68000: implement BSET, BCLR, BCHG, and NOT
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2011-10-08 23:26:29 +00:00 |
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beirich
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18de3c9efc
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68000: implement AND, OR, EOR. Fix interrupt bug. Fix bug with SR register
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2011-10-08 19:57:22 +00:00 |
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beirich
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18a3f3f87a
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68000: more flags fixes, especially N flag calculation. derp. :|
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2011-10-07 05:13:15 +00:00 |
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beirich
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f2ca21759c
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68000 timings and flags fixes, some new opcode handlers
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2011-10-07 03:04:48 +00:00 |
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beirich
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89e4c5a674
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2011-01-11 02:55:51 +00:00 |