beirich
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ac3acfd721
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oops, didn't get rid of all the 1-cycle page boundary penalties
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2011-03-13 02:32:13 +00:00 |
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beirich
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420bad0a2e
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HuC6280: Accepting an interrupt takes 8 cycles; Correcting handling of T flag on RTI and PLP instructions; 1-cycle penalty for accesses across page boundaries does not apply
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2011-03-13 02:22:29 +00:00 |
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beirich
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e07349c582
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[PCE] improve cpu instruction timing
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2011-03-06 06:06:49 +00:00 |
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beirich
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dd109b76da
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[PCE] Implement T-flag operation of AND instruction, mostly fixing Legendary Axe
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2011-02-27 16:41:48 +00:00 |
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beirich
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d381be67a6
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[PCE] Convert memory mappers from 16-bit addressing to 21-bit addressing
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2011-02-26 23:02:34 +00:00 |
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beirich
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89e4c5a674
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2011-01-11 02:55:51 +00:00 |