diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/ReadMe.txt b/BizHawk.Emulation.Cores/CPUs/Z80A/ReadMe.txt
new file mode 100644
index 0000000000..d11f79b637
--- /dev/null
+++ b/BizHawk.Emulation.Cores/CPUs/Z80A/ReadMe.txt
@@ -0,0 +1,8 @@
+TODO: 
+
+Mode 0 and 2 interrupts
+Check T-cycle level memory access timing
+Check R register 
+new tests for WZ Registers
+Memory refresh - IR is pushed onto the address bus at instruction start, does anything need this?
+Data Bus - For mode zero and 2 interrupts, need a system that uses it to test