Merge pull request #1405 from TASVideos/z80_optimzation
Z80A Optimizations - closes #1395
This commit is contained in:
Asnivor
GitHub
commit
fbbdec8610
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@ -24,10 +24,10 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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public int bus_pntr = 0;
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public int mem_pntr = 0;
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public int irq_pntr = 0;
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public ushort[] cur_instr;
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public ushort[] BUSRQ;
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public ushort[] MEMRQ;
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public ushort[] IRQS;
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public ushort[] cur_instr = new ushort[38]; // fixed size - do not change at runtime
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public ushort[] BUSRQ = new ushort[19]; // fixed size - do not change at runtime
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public ushort[] MEMRQ = new ushort[19]; // fixed size - do not change at runtime
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public int IRQS;
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public byte opcode;
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public bool NO_prefix, CB_prefix, IX_prefix, EXTD_prefix, IY_prefix, IXCB_prefix, IYCB_prefix;
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public bool halted;
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@ -36,8 +36,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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private void NMI_()
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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IDLE,
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IDLE,
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@ -47,11 +47,11 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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WR_DEC, SPl, SPh, PCh,
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TR16, PCl, PCh, NMI_V, ZERO,
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WAIT,
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WR, SPl, SPh, ALU };
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WR, SPl, SPh, ALU);
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BUSRQ = new ushort[] { 0, 0, 0, 0, 0, SPh, 0, 0, SPh, 0, 0 };
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MEMRQ = new ushort[] { 0, 0, 0, 0, 0, SPh, 0, 0, SPh, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
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PopulateBUSRQ(0, 0, 0, 0, 0, SPh, 0, 0, SPh, 0, 0);
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PopulateMEMRQ(0, 0, 0, 0, 0, SPh, 0, 0, SPh, 0, 0);
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IRQS = 11;
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}
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// Mode 0 interrupts only take effect if a CALL or RST is on the data bus
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@ -61,25 +61,25 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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//NOTE: TODO: When a CALL is present on the data bus, adjust WZ accordingly
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private void INTERRUPT_0(ushort src)
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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IORQ,
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WAIT,
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IDLE,
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WAIT,
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RD_INC, ALU, PCl, PCh };
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RD_INC, ALU, PCl, PCh);
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BUSRQ = new ushort[] { 0, 0, 0, 0, PCh, 0, 0 };
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MEMRQ = new ushort[] { 0, 0, 0, 0, PCh, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 1 };
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PopulateBUSRQ(0, 0, 0, 0, PCh, 0, 0);
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PopulateMEMRQ(0, 0, 0, 0, PCh, 0, 0);
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IRQS = 7;
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}
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// Just jump to $0038
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private void INTERRUPT_1()
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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IORQ,
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WAIT,
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@ -91,25 +91,25 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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WR_DEC, SPl, SPh, PCh,
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TR16, PCl, PCh, IRQ_V, ZERO,
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WAIT,
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WR, SPl, SPh, ALU };
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WR, SPl, SPh, ALU);
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BUSRQ = new ushort[] { 0, 0, 0, 0, I, 0, 0, SPh, 0, 0, SPh, 0, 0 };
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MEMRQ = new ushort[] { 0, 0, 0, 0, I, 0, 0, SPh, 0, 0, SPh, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
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PopulateBUSRQ(0, 0, 0, 0, I, 0, 0, SPh, 0, 0, SPh, 0, 0);
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PopulateMEMRQ(0, 0, 0, 0, I, 0, 0, SPh, 0, 0, SPh, 0, 0);
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IRQS = 13;
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}
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// Interrupt mode 2 uses the I vector combined with a byte on the data bus
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private void INTERRUPT_2()
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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IORQ,
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WAIT,
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FTCH_DB,
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IDLE,
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DEC16, SPl, SPh,
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TR16, Z, W, DB, I,
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TR16, Z, W, DB, I,
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WAIT,
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WR_DEC, SPl, SPh, PCh,
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IDLE,
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@ -120,11 +120,11 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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RD_INC, PCl, Z, W,
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IDLE,
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WAIT,
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RD, PCh, Z, W };
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RD, PCh, Z, W);
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BUSRQ = new ushort[] { 0, 0, 0, 0, I, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, W, 0 ,0 };
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MEMRQ = new ushort[] { 0, 0, 0, 0, I, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, W, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
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PopulateBUSRQ(0, 0, 0, 0, I, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, W, 0, 0);
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PopulateMEMRQ(0, 0, 0, 0, I, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, W, 0, 0);
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IRQS = 19;
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}
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private void ResetInterrupts()
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@ -9,111 +9,111 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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private void NOP_()
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{
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cur_instr = new ushort[]
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{IDLE };
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PopulateCURINSTR
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(IDLE);
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BUSRQ = new ushort[] { 0 };
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MEMRQ = new ushort[] { 0 };
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IRQS = new ushort[] { 1 };
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PopulateBUSRQ(0);
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PopulateMEMRQ(0);
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IRQS = 1;
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}
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// NOTE: In a real Z80, this operation just flips a switch to choose between 2 registers
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// but it's simpler to emulate just by exchanging the register with it's shadow
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private void EXCH_()
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{
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cur_instr = new ushort[]
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{EXCH };
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PopulateCURINSTR
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(EXCH);
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BUSRQ = new ushort[] { 0 };
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MEMRQ = new ushort[] { 0 };
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IRQS = new ushort[] { 1 };
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PopulateBUSRQ(0);
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PopulateMEMRQ(0);
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IRQS = 1;
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}
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private void EXX_()
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{
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cur_instr = new ushort[]
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{EXX };
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PopulateCURINSTR
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(EXX);
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BUSRQ = new ushort[] { 0 };
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MEMRQ = new ushort[] { 0 };
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IRQS = new ushort[] { 1 };
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PopulateBUSRQ(0);
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PopulateMEMRQ(0);
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IRQS = 1;
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}
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// this exchanges 2 16 bit registers
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private void EXCH_16_(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
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{
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cur_instr = new ushort[]
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{EXCH_16, dest_l, dest_h, src_l, src_h };
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PopulateCURINSTR
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(EXCH_16, dest_l, dest_h, src_l, src_h);
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BUSRQ = new ushort[] { 0 };
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MEMRQ = new ushort[] { 0 };
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IRQS = new ushort[] { 1 };
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PopulateBUSRQ(0);
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PopulateMEMRQ(0);
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IRQS = 1;
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}
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private void INC_16(ushort src_l, ushort src_h)
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{
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cur_instr = new ushort[]
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{INC16, src_l, src_h,
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PopulateCURINSTR
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(INC16, src_l, src_h,
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IDLE,
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IDLE };
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IDLE);
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BUSRQ = new ushort[] { 0, I, I };
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MEMRQ = new ushort[] { 0, 0, 0 };
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IRQS = new ushort[] { 0, 0, 1 };
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PopulateBUSRQ(0, I, I);
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PopulateMEMRQ(0, 0, 0);
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IRQS = 3;
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}
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private void DEC_16(ushort src_l, ushort src_h)
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{
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cur_instr = new ushort[]
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{DEC16, src_l, src_h,
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PopulateCURINSTR
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(DEC16, src_l, src_h,
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IDLE,
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IDLE };
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IDLE);
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BUSRQ = new ushort[] { 0, I, I };
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MEMRQ = new ushort[] { 0, 0, 0 };
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IRQS = new ushort[] { 0, 0, 1 };
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PopulateBUSRQ(0, I, I);
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PopulateMEMRQ(0, 0, 0);
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IRQS = 3;
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}
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// this is done in two steps technically, but the flags don't work out using existing funcitons
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// so let's use a different function since it's an internal operation anyway
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private void ADD_16(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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TR16, Z, W, dest_l, dest_h,
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IDLE,
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INC16, Z, W,
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IDLE,
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ADD16, dest_l, dest_h, src_l, src_h,
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IDLE,
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IDLE};
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IDLE);
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BUSRQ = new ushort[] { 0, I, I, I, I, I, I, I };
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MEMRQ = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1};
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PopulateBUSRQ(0, I, I, I, I, I, I, I);
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PopulateMEMRQ(0, 0, 0, 0, 0, 0, 0, 0);
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IRQS = 8;
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}
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private void REG_OP(ushort operation, ushort dest, ushort src)
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{
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cur_instr = new ushort[]
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{operation, dest, src };
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PopulateCURINSTR
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(operation, dest, src);
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BUSRQ = new ushort[] { 0 };
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MEMRQ = new ushort[] { 0 };
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IRQS = new ushort[] { 1 };
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PopulateBUSRQ(0);
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PopulateMEMRQ(0);
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IRQS = 1;
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}
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// Operations using the I and R registers take one T-cycle longer
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private void REG_OP_IR(ushort operation, ushort dest, ushort src)
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{
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cur_instr = new ushort[]
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{IDLE,
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SET_FL_IR, dest, src };
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PopulateCURINSTR
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(IDLE,
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SET_FL_IR, dest, src);
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BUSRQ = new ushort[] { 0, I };
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MEMRQ = new ushort[] { 0, 0 };
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IRQS = new ushort[] { 0, 1 };
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PopulateBUSRQ(0, I);
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PopulateMEMRQ(0, 0);
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IRQS = 2;
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}
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// note: do not use DEC here since no flags are affected by this operation
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@ -121,8 +121,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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{
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if ((Regs[B] - 1) != 0)
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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ASGN, B, (ushort)((Regs[B] - 1) & 0xFF),
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WAIT,
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@ -131,43 +131,43 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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IDLE,
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ASGN, W, 0,
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ADDS, PCl, PCh, Z, W,
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TR16, Z, W, PCl, PCh };
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TR16, Z, W, PCl, PCh);
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BUSRQ = new ushort[] { 0, I, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh };
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MEMRQ = new ushort[] { 0, 0, PCh, 0, 0, 0, 0, 0, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
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PopulateBUSRQ(0, I, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh);
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PopulateMEMRQ(0, 0, PCh, 0, 0, 0, 0, 0, 0, 0);
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IRQS = 10;
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}
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else
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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ASGN, B, (ushort)((Regs[B] - 1) & 0xFF),
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WAIT,
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RD_INC, ALU, PCl, PCh };
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RD_INC, ALU, PCl, PCh);
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BUSRQ = new ushort[] { 0, I, PCh, 0, 0 };
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MEMRQ = new ushort[] { 0, 0, PCh, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 1 };
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PopulateBUSRQ(0, I, PCh, 0, 0);
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PopulateMEMRQ(0, 0, PCh, 0, 0);
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IRQS = 5;
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}
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}
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private void HALT_()
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{
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cur_instr = new ushort[]
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{ HALT };
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PopulateCURINSTR
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(HALT);
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BUSRQ = new ushort[] { 0 };
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MEMRQ = new ushort[] { 0 };
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IRQS = new ushort[] { 1 };
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PopulateBUSRQ(0);
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PopulateMEMRQ(0);
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IRQS = 1;
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}
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private void JR_COND(bool cond)
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{
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if (cond)
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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WAIT,
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RD_INC, Z, PCl, PCh,
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@ -175,23 +175,23 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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ASGN, W, 0,
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IDLE,
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ADDS, PCl, PCh, Z, W,
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TR16, Z, W, PCl, PCh };
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TR16, Z, W, PCl, PCh);
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BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh };
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MEMRQ = new ushort[] { 0, PCh, 0, 0, 0, 0, 0, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 1 };
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PopulateBUSRQ(0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh);
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PopulateMEMRQ(0, PCh, 0, 0, 0, 0, 0, 0, 0);
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IRQS = 9;
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}
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else
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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WAIT,
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RD_INC, ALU, PCl, PCh };
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RD_INC, ALU, PCl, PCh);
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BUSRQ = new ushort[] { 0, PCh, 0, 0 };
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MEMRQ = new ushort[] { 0, PCh, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 1 };
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PopulateBUSRQ(0, PCh, 0, 0);
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PopulateMEMRQ(0, PCh, 0, 0);
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IRQS = 4;
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}
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}
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@ -199,82 +199,82 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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{
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if (cond)
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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WAIT,
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RD_INC, Z, PCl, PCh,
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IDLE,
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WAIT,
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RD_INC_TR_PC, Z, W, PCl, PCh};
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RD_INC_TR_PC, Z, W, PCl, PCh);
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BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0 };
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MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 1 };
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PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0);
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PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0);
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IRQS = 7;
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}
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else
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{
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cur_instr = new ushort[]
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{IDLE,
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PopulateCURINSTR
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(IDLE,
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IDLE,
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WAIT,
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RD_INC, Z, PCl, PCh,
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IDLE,
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WAIT,
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RD_INC, W, PCl, PCh };
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RD_INC, W, PCl, PCh);
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BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0 };
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MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0 };
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IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 1 };
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PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0);
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PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0);
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IRQS = 7;
|
||||
}
|
||||
}
|
||||
|
||||
private void RET_()
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, SPl, SPh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC_TR_PC, Z, W, SPl, SPh };
|
||||
RD_INC_TR_PC, Z, W, SPl, SPh);
|
||||
|
||||
BUSRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, SPh, 0, 0, SPh, 0, 0);
|
||||
PopulateMEMRQ(0, SPh, 0, 0, SPh, 0, 0);
|
||||
IRQS = 7;
|
||||
}
|
||||
|
||||
private void RETI_()
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, SPl, SPh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC_TR_PC, Z, W, SPl, SPh };
|
||||
RD_INC_TR_PC, Z, W, SPl, SPh);
|
||||
|
||||
BUSRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, SPh, 0, 0, SPh, 0, 0);
|
||||
PopulateMEMRQ(0, SPh, 0, 0, SPh, 0, 0);
|
||||
IRQS = 7;
|
||||
}
|
||||
|
||||
private void RETN_()
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, SPl, SPh,
|
||||
EI_RETN,
|
||||
WAIT,
|
||||
RD_INC_TR_PC, Z, W, SPl, SPh };
|
||||
RD_INC_TR_PC, Z, W, SPl, SPh);
|
||||
|
||||
BUSRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, SPh, 0, 0, SPh, 0, 0);
|
||||
PopulateMEMRQ(0, SPh, 0, 0, SPh, 0, 0);
|
||||
IRQS = 7;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -282,29 +282,29 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
{
|
||||
if (cond)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, SPl, SPh,
|
||||
IDLE,
|
||||
RD_INC, Z, SPl, SPh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC_TR_PC, Z, W, SPl, SPh};
|
||||
RD_INC_TR_PC, Z, W, SPl, SPh);
|
||||
|
||||
BUSRQ = new ushort[] { 0, I, SPh, 0, 0, SPh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, I, SPh, 0, 0, SPh, 0, 0);
|
||||
PopulateMEMRQ(0, 0, SPh, 0, 0, SPh, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
else
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
IDLE };
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE);
|
||||
|
||||
BUSRQ = new ushort[] { 0, I };
|
||||
MEMRQ = new ushort[] { 0, 0 };
|
||||
IRQS = new ushort[] { 0, 1 };
|
||||
PopulateBUSRQ(0, I);
|
||||
PopulateMEMRQ(0, 0);
|
||||
IRQS = 2;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -312,8 +312,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
{
|
||||
if (cond)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, PCl, PCh,
|
||||
|
|
@ -326,113 +326,113 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
WR_DEC, SPl, SPh, PCh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR_TR_PC, SPl, SPh, PCl };
|
||||
WR_TR_PC, SPl, SPh, PCl);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, PCh, SPh, 0, 0, SPh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, PCh, SPh, 0, 0, SPh, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, 0, SPh, 0, 0, SPh, 0, 0);
|
||||
IRQS = 14;
|
||||
}
|
||||
else
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, PCl, PCh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, W, PCl, PCh};
|
||||
RD_INC, W, PCl, PCh);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0);
|
||||
IRQS = 7;
|
||||
}
|
||||
}
|
||||
|
||||
private void INT_OP(ushort operation, ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{operation, src };
|
||||
PopulateCURINSTR
|
||||
(operation, src);
|
||||
|
||||
BUSRQ = new ushort[] { 0 };
|
||||
MEMRQ = new ushort[] { 0 };
|
||||
IRQS = new ushort[] { 1 };
|
||||
PopulateBUSRQ(0);
|
||||
PopulateMEMRQ(0);
|
||||
IRQS = 1;
|
||||
}
|
||||
|
||||
private void BIT_OP(ushort operation, ushort bit, ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{operation, bit, src };
|
||||
PopulateCURINSTR
|
||||
(operation, bit, src);
|
||||
|
||||
BUSRQ = new ushort[] { 0 };
|
||||
MEMRQ = new ushort[] { 0 };
|
||||
IRQS = new ushort[] { 1 };
|
||||
PopulateBUSRQ(0);
|
||||
PopulateMEMRQ(0);
|
||||
IRQS = 1;
|
||||
}
|
||||
|
||||
private void PUSH_(ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
DEC16, SPl, SPh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR_DEC, SPl, SPh, src_h,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, SPl, SPh, src_l };
|
||||
WR, SPl, SPh, src_l);
|
||||
|
||||
BUSRQ = new ushort[] { 0, I, SPh, 0, 0, SPh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, I, SPh, 0, 0, SPh, 0, 0);
|
||||
PopulateMEMRQ(0, 0, SPh, 0, 0, SPh, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
|
||||
private void POP_(ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, src_l, SPl, SPh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, src_h, SPl, SPh };
|
||||
RD_INC, src_h, SPl, SPh);
|
||||
|
||||
BUSRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
IRQS = new ushort[] {0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, SPh, 0, 0, SPh, 0, 0);
|
||||
PopulateMEMRQ(0, SPh, 0, 0, SPh, 0, 0);
|
||||
IRQS = 7;
|
||||
}
|
||||
|
||||
private void RST_(ushort n)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
DEC16, SPl, SPh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR_DEC, SPl, SPh, PCh,
|
||||
RST, n,
|
||||
WAIT,
|
||||
WR_TR_PC, SPl, SPh, PCl };
|
||||
WR_TR_PC, SPl, SPh, PCl);
|
||||
|
||||
BUSRQ = new ushort[] { 0, I, SPh, 0, 0, SPh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, 0, SPh, 0, 0, SPh, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, I, SPh, 0, 0, SPh, 0, 0);
|
||||
PopulateMEMRQ(0, 0, SPh, 0, 0, SPh, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
private void PREFIX_(ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
PREFIX };
|
||||
PREFIX);
|
||||
|
||||
PRE_SRC = src;
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0 }; // prefix does not get interrupted
|
||||
PopulateBUSRQ(0, PCh, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0);
|
||||
IRQS = -1; // prefix does not get interrupted
|
||||
}
|
||||
|
||||
private void PREFETCH_(ushort src)
|
||||
|
|
@ -448,160 +448,160 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
Regs[Z] = Regs[Iyl];
|
||||
}
|
||||
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, ALU, PCl, PCh,
|
||||
ADDS, Z, W, ALU, ZERO,
|
||||
WAIT,
|
||||
IDLE,
|
||||
PREFIX};
|
||||
PREFIX);
|
||||
|
||||
PRE_SRC = src;
|
||||
|
||||
//Console.WriteLine(TotalExecutedCycles);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, PCh };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0 }; // prefetch does not get interrupted
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, PCh);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, 0);
|
||||
IRQS = -1; // prefetch does not get interrupted
|
||||
}
|
||||
|
||||
private void DI_()
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{DI };
|
||||
PopulateCURINSTR
|
||||
(DI);
|
||||
|
||||
BUSRQ = new ushort[] { 0 };
|
||||
MEMRQ = new ushort[] { 0 };
|
||||
IRQS = new ushort[] { 1 };
|
||||
PopulateBUSRQ(0);
|
||||
PopulateMEMRQ(0);
|
||||
IRQS = 1;
|
||||
}
|
||||
|
||||
private void EI_()
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{EI };
|
||||
PopulateCURINSTR
|
||||
(EI);
|
||||
|
||||
BUSRQ = new ushort[] { 0 };
|
||||
MEMRQ = new ushort[] { 0 };
|
||||
IRQS = new ushort[] { 1 };
|
||||
PopulateBUSRQ(0);
|
||||
PopulateMEMRQ(0);
|
||||
IRQS = 1;
|
||||
}
|
||||
|
||||
private void JP_16(ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{TR16, PCl, PCh, src_l, src_h };
|
||||
PopulateCURINSTR
|
||||
(TR16, PCl, PCh, src_l, src_h);
|
||||
|
||||
BUSRQ = new ushort[] { 0 };
|
||||
MEMRQ = new ushort[] { 0 };
|
||||
IRQS = new ushort[] { 1 };
|
||||
PopulateBUSRQ(0);
|
||||
PopulateMEMRQ(0);
|
||||
IRQS = 1;
|
||||
}
|
||||
|
||||
private void LD_SP_16(ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
TR16, SPl, SPh, src_l, src_h };
|
||||
TR16, SPl, SPh, src_l, src_h);
|
||||
|
||||
BUSRQ = new ushort[] { 0, I, I };
|
||||
MEMRQ = new ushort[] { 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 1 };
|
||||
PopulateBUSRQ(0, I, I);
|
||||
PopulateMEMRQ(0, 0, 0);
|
||||
IRQS = 3;
|
||||
}
|
||||
|
||||
private void OUT_()
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
TR, W, A,
|
||||
WAIT,
|
||||
RD_INC, Z, PCl, PCh,
|
||||
TR, ALU, A,
|
||||
WAIT,
|
||||
TR, ALU, A,
|
||||
WAIT,
|
||||
OUT_INC, Z, ALU, A };
|
||||
WAIT,
|
||||
OUT_INC, Z, ALU, A);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, WIO1, WIO2, WIO3, WIO4 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, WIO1, WIO2, WIO3, WIO4 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1};
|
||||
PopulateBUSRQ(0, PCh, 0, 0, WIO1, WIO2, WIO3, WIO4);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, WIO1, WIO2, WIO3, WIO4);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
private void OUT_REG_(ushort dest, ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
TR16, Z, W, C, B,
|
||||
IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
TR16, Z, W, C, B,
|
||||
IDLE,
|
||||
OUT_INC, Z, W, src };
|
||||
IDLE,
|
||||
OUT_INC, Z, W, src);
|
||||
|
||||
BUSRQ = new ushort[] { 0, BIO1, BIO2, BIO3, BIO4 };
|
||||
MEMRQ = new ushort[] { 0, BIO1, BIO2, BIO3, BIO4 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, BIO1, BIO2, BIO3, BIO4);
|
||||
PopulateMEMRQ(0, BIO1, BIO2, BIO3, BIO4);
|
||||
IRQS = 5;
|
||||
}
|
||||
|
||||
private void IN_()
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
TR, W, A,
|
||||
WAIT,
|
||||
RD_INC, Z, PCl, PCh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WAIT,
|
||||
IN_A_N_INC, A, Z, W };
|
||||
IN_A_N_INC, A, Z, W);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, WIO1, WIO2, WIO3, WIO4 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, WIO1, WIO2, WIO3, WIO4 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, WIO1, WIO2, WIO3, WIO4);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, WIO1, WIO2, WIO3, WIO4);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
private void IN_REG_(ushort dest, ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
TR16, Z, W, C, B,
|
||||
WAIT,
|
||||
WAIT,
|
||||
IN_INC, dest, Z, W };
|
||||
IN_INC, dest, Z, W);
|
||||
|
||||
BUSRQ = new ushort[] { 0, BIO1, BIO2, BIO3, BIO4 };
|
||||
MEMRQ = new ushort[] { 0, BIO1, BIO2, BIO3, BIO4 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, BIO1, BIO2, BIO3, BIO4);
|
||||
PopulateMEMRQ(0, BIO1, BIO2, BIO3, BIO4);
|
||||
IRQS = 5;
|
||||
}
|
||||
|
||||
private void REG_OP_16_(ushort op, ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
IDLE,
|
||||
TR16, Z, W, dest_l, dest_h,
|
||||
INC16, Z, W,
|
||||
IDLE,
|
||||
IDLE,
|
||||
op, dest_l, dest_h, src_l, src_h };
|
||||
op, dest_l, dest_h, src_l, src_h);
|
||||
|
||||
BUSRQ = new ushort[] { 0, I, I, I, I, I, I, I };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, I, I, I, I, I, I, I);
|
||||
PopulateMEMRQ(0, 0, 0, 0, 0, 0, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
private void INT_MODE_(ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{INT_MODE, src };
|
||||
PopulateCURINSTR
|
||||
(INT_MODE, src);
|
||||
|
||||
BUSRQ = new ushort[] { 0 };
|
||||
MEMRQ = new ushort[] { 0 };
|
||||
IRQS = new ushort[] { 1 };
|
||||
PopulateBUSRQ(0);
|
||||
PopulateMEMRQ(0);
|
||||
IRQS = 1;
|
||||
}
|
||||
|
||||
private void RRD_()
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
TR16, Z, W, L, H,
|
||||
WAIT,
|
||||
RD, ALU, Z, W,
|
||||
|
|
@ -611,17 +611,17 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR_INC, Z, W, ALU };
|
||||
WR_INC, Z, W, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, H, 0, 0, H, H, H, H, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, H, 0, 0, 0, 0, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, H, 0, 0, H, H, H, H, W, 0, 0);
|
||||
PopulateMEMRQ(0, H, 0, 0, 0, 0, 0, 0, W, 0, 0);
|
||||
IRQS = 11;
|
||||
}
|
||||
|
||||
private void RLD_()
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
TR16, Z, W, L, H,
|
||||
WAIT,
|
||||
RD, ALU, Z, W,
|
||||
|
|
@ -631,11 +631,11 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR_INC, Z, W, ALU };
|
||||
WR_INC, Z, W, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, H, 0, 0, H, H, H, H, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, H, 0, 0, 0, 0, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, H, 0, 0, H, H, H, H, W, 0, 0);
|
||||
PopulateMEMRQ(0, H, 0, 0, 0, 0, 0, 0, W, 0, 0);
|
||||
IRQS = 11;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,36 +4,36 @@
|
|||
{
|
||||
private void INT_OP_IND(ushort operation, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, src_l, src_h,
|
||||
IDLE,
|
||||
operation, ALU,
|
||||
WAIT,
|
||||
WR, src_l, src_h, ALU };
|
||||
WR, src_l, src_h, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, src_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0, 0, src_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, src_h, 0, 0, src_h, src_h, 0, 0);
|
||||
PopulateMEMRQ(0, src_h, 0, 0, 0, src_h, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
private void BIT_OP_IND(ushort operation, ushort bit, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WAIT,
|
||||
RD, ALU, src_l, src_h,
|
||||
operation, bit, ALU,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, src_l, src_h, ALU };
|
||||
WR, src_l, src_h, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, src_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0, 0, src_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, src_h, 0, 0, src_h, src_h, 0, 0);
|
||||
PopulateMEMRQ(0, src_h, 0, 0, 0, src_h, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
// Note that this operation uses I_BIT, same as indexed BIT.
|
||||
|
|
@ -42,62 +42,62 @@
|
|||
// even though WZ is not assigned to, letting it's value from other operations show through
|
||||
private void BIT_TE_IND(ushort operation, ushort bit, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, src_l, src_h,
|
||||
I_BIT, bit, ALU };
|
||||
I_BIT, bit, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, src_h, 0, 0, src_h);
|
||||
PopulateMEMRQ(0, src_h, 0, 0, 0);
|
||||
IRQS = 5;
|
||||
}
|
||||
|
||||
private void REG_OP_IND_INC(ushort operation, ushort dest, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_OP, 1, ALU, src_l, src_h, operation, dest, ALU };
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_OP, 1, ALU, src_l, src_h, operation, dest, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 1};
|
||||
PopulateBUSRQ(0, src_h, 0, 0);
|
||||
PopulateMEMRQ(0, src_h, 0, 0);
|
||||
IRQS = 4;
|
||||
}
|
||||
|
||||
private void REG_OP_IND(ushort operation, ushort dest, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
TR16, Z, W, src_l, src_h,
|
||||
WAIT,
|
||||
RD_OP, 1, ALU, Z, W, operation, dest, ALU };
|
||||
RD_OP, 1, ALU, Z, W, operation, dest, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, src_h, 0, 0);
|
||||
PopulateMEMRQ(0, src_h, 0, 0);
|
||||
IRQS = 4;
|
||||
}
|
||||
|
||||
// different because HL doesn't effect WZ
|
||||
private void REG_OP_IND_HL(ushort operation, ushort dest)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_OP, 0, ALU, L, H, operation, dest, ALU };
|
||||
RD_OP, 0, ALU, L, H, operation, dest, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, H, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, H, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, H, 0, 0);
|
||||
PopulateMEMRQ(0, H, 0, 0);
|
||||
IRQS = 4;
|
||||
}
|
||||
|
||||
private void LD_16_IND_nn(ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, PCl, PCh,
|
||||
|
|
@ -109,17 +109,17 @@
|
|||
WR_INC, Z, W, src_l,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, Z, W, src_h };
|
||||
WR, Z, W, src_h);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0);
|
||||
IRQS = 13;
|
||||
}
|
||||
|
||||
private void LD_IND_16_nn(ushort dest_l, ushort dest_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, PCl, PCh,
|
||||
|
|
@ -131,17 +131,17 @@
|
|||
RD_INC, dest_l, Z, W,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, dest_h, Z, W };
|
||||
RD, dest_h, Z, W);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0);
|
||||
IRQS = 13;
|
||||
}
|
||||
|
||||
private void LD_8_IND_nn(ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, PCl, PCh,
|
||||
|
|
@ -150,17 +150,17 @@
|
|||
RD_INC, W, PCl, PCh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR_INC_WA, Z, W, src };
|
||||
WR_INC_WA, Z, W, src);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, W, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, W, 0, 0);
|
||||
IRQS = 10;
|
||||
}
|
||||
|
||||
private void LD_IND_8_nn(ushort dest)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, PCl, PCh,
|
||||
|
|
@ -169,172 +169,172 @@
|
|||
RD_INC, W, PCl, PCh,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, dest, Z, W };
|
||||
RD_INC, dest, Z, W);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, W, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, W, 0, 0);
|
||||
IRQS = 10;
|
||||
}
|
||||
|
||||
private void LD_8_IND(ushort dest_l, ushort dest_h, ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
TR16, Z, W, dest_l, dest_h,
|
||||
WAIT,
|
||||
WR_INC_WA, Z, W, src };
|
||||
WR_INC_WA, Z, W, src);
|
||||
|
||||
BUSRQ = new ushort[] { 0, dest_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, dest_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, dest_h, 0, 0);
|
||||
PopulateMEMRQ(0, dest_h, 0, 0);
|
||||
IRQS = 4;
|
||||
}
|
||||
|
||||
// seperate HL needed since it doesn't effect the WZ pair
|
||||
private void LD_8_IND_HL(ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, L, H, src };
|
||||
WR, L, H, src);
|
||||
|
||||
BUSRQ = new ushort[] { 0, H, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, H, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, H, 0, 0);
|
||||
PopulateMEMRQ(0, H, 0, 0);
|
||||
IRQS = 4;
|
||||
}
|
||||
|
||||
private void LD_8_IND_IND(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, ALU, src_l, src_h,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, dest_l, dest_h, ALU };
|
||||
WR, dest_l, dest_h, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, dest_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0, dest_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, src_h, 0, 0, dest_h, 0, 0);
|
||||
PopulateMEMRQ(0, src_h, 0, 0, dest_h, 0, 0);
|
||||
IRQS = 7;
|
||||
}
|
||||
|
||||
private void LD_IND_8_INC(ushort dest, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, dest, src_l, src_h };
|
||||
RD_INC, dest, src_l, src_h);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, src_h, 0, 0);
|
||||
PopulateMEMRQ(0, src_h, 0, 0);
|
||||
IRQS = 4;
|
||||
}
|
||||
|
||||
private void LD_IND_16(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, dest_l, src_l, src_h,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, dest_h, src_l, src_h };
|
||||
RD_INC, dest_h, src_l, src_h);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0, src_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, src_h, 0, 0, src_h, 0, 0);
|
||||
PopulateMEMRQ(0, src_h, 0, 0, src_h, 0, 0);
|
||||
IRQS = 7;
|
||||
}
|
||||
|
||||
private void INC_8_IND(ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WAIT,
|
||||
RD, ALU, src_l, src_h,
|
||||
INC8, ALU,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, src_l, src_h, ALU };
|
||||
WR, src_l, src_h, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, src_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0, 0, src_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, src_h, 0, 0, src_h, src_h, 0, 0);
|
||||
PopulateMEMRQ(0, src_h, 0, 0, 0, src_h, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
private void DEC_8_IND(ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WAIT,
|
||||
RD, ALU, src_l, src_h,
|
||||
DEC8, ALU,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, src_l, src_h, ALU };
|
||||
WR, src_l, src_h, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, src_h, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, src_h, 0, 0, 0, src_h, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, src_h, 0, 0, src_h, src_h, 0, 0);
|
||||
PopulateMEMRQ(0, src_h, 0, 0, 0, src_h, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
// NOTE: WZ implied for the wollowing 3 functions
|
||||
private void I_INT_OP(ushort operation, ushort dest)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, Z, W,
|
||||
operation, ALU,
|
||||
TR, dest, ALU,
|
||||
WAIT,
|
||||
WR, Z, W, ALU };
|
||||
WR, Z, W, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, W, 0, 0, W, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, W, 0, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, W, 0, 0, W, W, 0, 0);
|
||||
PopulateMEMRQ(0, W, 0, 0, 0, W, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
private void I_BIT_OP(ushort operation, ushort bit, ushort dest)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, Z, W,
|
||||
operation, bit, ALU,
|
||||
TR, dest, ALU,
|
||||
WAIT,
|
||||
WR, Z, W, ALU };
|
||||
WR, Z, W, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, W, 0, 0, W, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, W, 0, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 1};
|
||||
PopulateBUSRQ(0, W, 0, 0, W, W, 0, 0);
|
||||
PopulateMEMRQ(0, W, 0, 0, 0, W, 0, 0);
|
||||
IRQS = 8;
|
||||
}
|
||||
|
||||
private void I_BIT_TE(ushort bit)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, Z, W,
|
||||
I_BIT, bit, ALU };
|
||||
I_BIT, bit, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, W, 0, 0, W };
|
||||
MEMRQ = new ushort[] { 0, W, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, W, 0, 0, W);
|
||||
PopulateMEMRQ(0, W, 0, 0, 0);
|
||||
IRQS = 5;
|
||||
}
|
||||
|
||||
private void I_OP_n(ushort operation, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, PCl, PCh,
|
||||
|
|
@ -349,17 +349,17 @@
|
|||
operation, ALU,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, Z, W, ALU };
|
||||
WR, Z, W, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, W, 0, 0, W, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, 0, 0, 0, 0, 0, W, 0, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, W, 0, 0, W, W, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, 0, 0, 0, 0, 0, W, 0, 0, 0, W, 0, 0);
|
||||
IRQS = 16;
|
||||
}
|
||||
|
||||
private void I_OP_n_n(ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
TR16, Z, W, src_l, src_h,
|
||||
WAIT,
|
||||
RD_INC, ALU, PCl, PCh,
|
||||
|
|
@ -370,17 +370,17 @@
|
|||
IDLE,
|
||||
INC16, PCl, PCh,
|
||||
WAIT,
|
||||
WR, Z, W, ALU };
|
||||
WR, Z, W, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, PCh, PCh, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, PCh, PCh, W, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, 0, 0, W, 0, 0);
|
||||
IRQS = 12;
|
||||
}
|
||||
|
||||
private void I_REG_OP_IND_n(ushort operation, ushort dest, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, PCl, PCh,
|
||||
|
|
@ -391,38 +391,38 @@
|
|||
IDLE,
|
||||
INC16, PCl, PCh,
|
||||
WAIT,
|
||||
RD_OP, 0, ALU, Z, W, operation, dest, ALU };
|
||||
RD_OP, 0, ALU, Z, W, operation, dest, ALU);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, W, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, 0, 0, 0, 0, 0, W, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, W, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, 0, 0, 0, 0, 0, W, 0, 0);
|
||||
IRQS = 12;
|
||||
}
|
||||
|
||||
private void I_LD_8_IND_n(ushort dest_l, ushort dest_h, ushort src)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, PCl, PCh,
|
||||
IDLE,
|
||||
IDLE,
|
||||
IDLE,
|
||||
TR16, Z, W, dest_l, dest_h,
|
||||
ADDS, Z, W, ALU, ZERO,
|
||||
IDLE,
|
||||
INC16, PCl, PCh,
|
||||
WAIT,
|
||||
WR, Z, W, src };
|
||||
WR, Z, W, src);
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, Z, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, PCh, 0, 0, 0, 0, 0, 0, 0, Z, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, Z, 0, 0);
|
||||
PopulateMEMRQ(0, PCh, 0, 0, 0, 0, 0, 0, 0, Z, 0, 0);
|
||||
IRQS = 12;
|
||||
}
|
||||
|
||||
private void LD_OP_R(ushort operation, ushort repeat_instr)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, L, H,
|
||||
|
|
@ -430,17 +430,17 @@
|
|||
WAIT,
|
||||
WR, E, D, ALU,
|
||||
IDLE,
|
||||
SET_FL_LD_R, 0, operation, repeat_instr};
|
||||
SET_FL_LD_R, 0, operation, repeat_instr);
|
||||
|
||||
BUSRQ = new ushort[] { 0, H, 0, 0, D, 0, 0, D, D };
|
||||
MEMRQ = new ushort[] { 0, H, 0, 0, D, 0, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, H, 0, 0, D, 0, 0, D, D);
|
||||
PopulateMEMRQ(0, H, 0, 0, D, 0, 0, 0, 0);
|
||||
IRQS = 9;
|
||||
}
|
||||
|
||||
private void CP_OP_R(ushort operation, ushort repeat_instr)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, L, H,
|
||||
|
|
@ -448,17 +448,17 @@
|
|||
DEC16, C, B,
|
||||
operation, Z, W,
|
||||
IDLE,
|
||||
SET_FL_CP_R, 1, operation, repeat_instr};
|
||||
SET_FL_CP_R, 1, operation, repeat_instr);
|
||||
|
||||
BUSRQ = new ushort[] { 0, H, 0, 0, H, H, H, H, H };
|
||||
MEMRQ = new ushort[] { 0, H, 0, 0, 0, 0, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, H, 0, 0, H, H, H, H, H);
|
||||
PopulateMEMRQ(0, H, 0, 0, 0, 0, 0, 0, 0);
|
||||
IRQS = 9;
|
||||
}
|
||||
|
||||
private void IN_OP_R(ushort operation, ushort repeat_instr)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
|
|
@ -466,55 +466,55 @@
|
|||
IN, ALU, C, B,
|
||||
IDLE,
|
||||
WAIT,
|
||||
REP_OP_I, L, H, ALU, operation, 2, operation, repeat_instr };
|
||||
REP_OP_I, L, H, ALU, operation, 2, operation, repeat_instr);
|
||||
|
||||
BUSRQ = new ushort[] { 0, I, BIO1, BIO2, BIO3, BIO4, H, 0, 0};
|
||||
MEMRQ = new ushort[] { 0, 0, BIO1, BIO2, BIO3, BIO4, H, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, I, BIO1, BIO2, BIO3, BIO4, H, 0, 0);
|
||||
PopulateMEMRQ(0, 0, BIO1, BIO2, BIO3, BIO4, H, 0, 0);
|
||||
IRQS = 9;
|
||||
}
|
||||
|
||||
private void OUT_OP_R(ushort operation, ushort repeat_instr)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, ALU, L, H,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WAIT,
|
||||
REP_OP_O, C, B, ALU, operation, 3, operation, repeat_instr };
|
||||
WAIT,
|
||||
REP_OP_O, C, B, ALU, operation, 3, operation, repeat_instr);
|
||||
|
||||
BUSRQ = new ushort[] { 0, I, H, 0, 0, BIO1, BIO2, BIO3, BIO4 };
|
||||
MEMRQ = new ushort[] { 0, 0, H, 0, 0, BIO1, BIO2, BIO3, BIO4 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, I, H, 0, 0, BIO1, BIO2, BIO3, BIO4);
|
||||
PopulateMEMRQ(0, 0, H, 0, 0, BIO1, BIO2, BIO3, BIO4);
|
||||
IRQS = 9;
|
||||
}
|
||||
|
||||
// this is an indirect change of a a 16 bit register with memory
|
||||
private void EXCH_16_IND_(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD_INC, Z, dest_l, dest_h,
|
||||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, W, dest_l, dest_h,
|
||||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR_DEC, dest_l, dest_h, src_h,
|
||||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, dest_l, dest_h, src_l,
|
||||
IDLE,
|
||||
TR16, src_l, src_h, Z, W };
|
||||
TR16, src_l, src_h, Z, W);
|
||||
|
||||
BUSRQ = new ushort[] { 0, dest_h, 0, 0, dest_h, 0, 0, dest_h, dest_h, 0, 0, dest_h, 0, 0, dest_h, dest_h };
|
||||
MEMRQ = new ushort[] { 0, dest_h, 0, 0, dest_h, 0, 0, 0, dest_h, 0, 0, dest_h, 0, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(0, dest_h, 0, 0, dest_h, 0, 0, dest_h, dest_h, 0, 0, dest_h, 0, 0, dest_h, dest_h);
|
||||
PopulateMEMRQ(0, dest_h, 0, 0, dest_h, 0, 0, 0, dest_h, 0, 0, dest_h, 0, 0, 0, 0);
|
||||
IRQS = 16;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -104,14 +104,15 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
ResetRegisters();
|
||||
ResetInterrupts();
|
||||
TotalExecutedCycles = 0;
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
DEC16, F, A,
|
||||
DEC16, SPl, SPh };
|
||||
|
||||
BUSRQ = new ushort[] { 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 1 };
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
DEC16, F, A,
|
||||
DEC16, SPl, SPh);
|
||||
|
||||
PopulateBUSRQ(0, 0, 0);
|
||||
PopulateMEMRQ(0, 0, 0);
|
||||
IRQS = 3;
|
||||
instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0;
|
||||
NO_prefix = true;
|
||||
}
|
||||
|
|
@ -459,16 +460,16 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
|
||||
if (((Regs[C] | (Regs[B] << 8)) != 0) && (Ztemp3 > 0))
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{DEC16, PCl, PCh,
|
||||
PopulateCURINSTR
|
||||
(DEC16, PCl, PCh,
|
||||
DEC16, PCl, PCh,
|
||||
TR16, Z, W, PCl, PCh,
|
||||
INC16, Z, W,
|
||||
Ztemp2, E, D };
|
||||
Ztemp2, E, D);
|
||||
|
||||
BUSRQ = new ushort[] { D, D, D, D, D };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(D, D, D, D, D);
|
||||
PopulateMEMRQ(0, 0, 0, 0, 0);
|
||||
IRQS = 5;
|
||||
|
||||
instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0;
|
||||
I_skip = true;
|
||||
|
|
@ -488,16 +489,17 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
|
||||
if (((Regs[C] | (Regs[B] << 8)) != 0) && (Ztemp3 > 0) && !FlagZ)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{DEC16, PCl, PCh,
|
||||
|
||||
PopulateCURINSTR
|
||||
(DEC16, PCl, PCh,
|
||||
DEC16, PCl, PCh,
|
||||
TR16, Z, W, PCl, PCh,
|
||||
INC16, Z, W,
|
||||
Ztemp2, L, H };
|
||||
INC16, Z, W,
|
||||
Ztemp2, L, H);
|
||||
|
||||
BUSRQ = new ushort[] { H, H, H, H, H };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(H, H, H, H, H);
|
||||
PopulateMEMRQ(0, 0, 0, 0, 0);
|
||||
IRQS = 5;
|
||||
|
||||
instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0;
|
||||
I_skip = true;
|
||||
|
|
@ -562,16 +564,16 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
|
||||
if ((Regs[B] != 0) && (Ztemp3 > 0))
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
DEC16, PCl, PCh,
|
||||
DEC16, PCl, PCh,
|
||||
Ztemp2, L, H };
|
||||
Ztemp2, L, H);
|
||||
|
||||
BUSRQ = new ushort[] { H, H, H, H, H };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(H, H, H, H, H);
|
||||
PopulateMEMRQ(0, 0, 0, 0, 0);
|
||||
IRQS = 5;
|
||||
|
||||
instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0;
|
||||
I_skip = true;
|
||||
|
|
@ -613,16 +615,16 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
|
||||
if ((Regs[B] != 0) && (Ztemp3 > 0))
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
IDLE,
|
||||
DEC16, PCl, PCh,
|
||||
DEC16, PCl, PCh,
|
||||
IDLE };
|
||||
IDLE);
|
||||
|
||||
BUSRQ = new ushort[] { B, B, B, B, B };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(B, B, B, B, B);
|
||||
PopulateMEMRQ(0, 0, 0, 0, 0);
|
||||
IRQS = 5;
|
||||
|
||||
instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0;
|
||||
I_skip = true;
|
||||
|
|
@ -638,7 +640,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
{
|
||||
I_skip = false;
|
||||
}
|
||||
else if (IRQS[irq_pntr++] == 1)
|
||||
else if (++irq_pntr == IRQS)
|
||||
{
|
||||
if (EI_pending > 0)
|
||||
{
|
||||
|
|
@ -707,15 +709,15 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
// otherwise start a new normal access
|
||||
else if (!halted)
|
||||
{
|
||||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
PopulateCURINSTR
|
||||
(IDLE,
|
||||
WAIT,
|
||||
OP_F,
|
||||
OP};
|
||||
OP);
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
IRQS = new ushort[] { 0, 0, 0, 1 };
|
||||
PopulateBUSRQ(PCh, 0, 0, 0);
|
||||
PopulateMEMRQ(PCh, 0, 0, 0);
|
||||
IRQS = 4;
|
||||
|
||||
instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0;
|
||||
}
|
||||
|
|
@ -781,6 +783,59 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
};
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Optimization method to set BUSRQ
|
||||
/// </summary>
|
||||
private void PopulateBUSRQ(ushort d0 = 0, ushort d1 = 0, ushort d2 = 0, ushort d3 = 0, ushort d4 = 0, ushort d5 = 0, ushort d6 = 0, ushort d7 = 0, ushort d8 = 0,
|
||||
ushort d9 = 0, ushort d10 = 0, ushort d11 = 0, ushort d12 = 0, ushort d13 = 0, ushort d14 = 0, ushort d15 = 0, ushort d16 = 0, ushort d17 = 0, ushort d18 = 0)
|
||||
{
|
||||
BUSRQ[0] = d0; BUSRQ[1] = d1; BUSRQ[2] = d2;
|
||||
BUSRQ[3] = d3; BUSRQ[4] = d4; BUSRQ[5] = d5;
|
||||
BUSRQ[6] = d6; BUSRQ[7] = d7; BUSRQ[8] = d8;
|
||||
BUSRQ[9] = d9; BUSRQ[10] = d10; BUSRQ[11] = d11;
|
||||
BUSRQ[12] = d12; BUSRQ[13] = d13; BUSRQ[14] = d14;
|
||||
BUSRQ[15] = d15; BUSRQ[16] = d16; BUSRQ[17] = d17;
|
||||
BUSRQ[18] = d18;
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Optimization method to set MEMRQ
|
||||
/// </summary>
|
||||
private void PopulateMEMRQ(ushort d0 = 0, ushort d1 = 0, ushort d2 = 0, ushort d3 = 0, ushort d4 = 0, ushort d5 = 0, ushort d6 = 0, ushort d7 = 0, ushort d8 = 0,
|
||||
ushort d9 = 0, ushort d10 = 0, ushort d11 = 0, ushort d12 = 0, ushort d13 = 0, ushort d14 = 0, ushort d15 = 0, ushort d16 = 0, ushort d17 = 0, ushort d18 = 0)
|
||||
{
|
||||
MEMRQ[0] = d0; MEMRQ[1] = d1; MEMRQ[2] = d2;
|
||||
MEMRQ[3] = d3; MEMRQ[4] = d4; MEMRQ[5] = d5;
|
||||
MEMRQ[6] = d6; MEMRQ[7] = d7; MEMRQ[8] = d8;
|
||||
MEMRQ[9] = d9; MEMRQ[10] = d10; MEMRQ[11] = d11;
|
||||
MEMRQ[12] = d12; MEMRQ[13] = d13; MEMRQ[14] = d14;
|
||||
MEMRQ[15] = d15; MEMRQ[16] = d16; MEMRQ[17] = d17;
|
||||
MEMRQ[18] = d18;
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Optimization method to set cur_instr
|
||||
/// </summary>
|
||||
private void PopulateCURINSTR(ushort d0 = 0, ushort d1 = 0, ushort d2 = 0, ushort d3 = 0, ushort d4 = 0, ushort d5 = 0, ushort d6 = 0, ushort d7 = 0, ushort d8 = 0,
|
||||
ushort d9 = 0, ushort d10 = 0, ushort d11 = 0, ushort d12 = 0, ushort d13 = 0, ushort d14 = 0, ushort d15 = 0, ushort d16 = 0, ushort d17 = 0, ushort d18 = 0,
|
||||
ushort d19 = 0, ushort d20 = 0, ushort d21 = 0, ushort d22 = 0, ushort d23 = 0, ushort d24 = 0, ushort d25 = 0, ushort d26 = 0, ushort d27 = 0, ushort d28 = 0,
|
||||
ushort d29 = 0, ushort d30 = 0, ushort d31 = 0, ushort d32 = 0, ushort d33 = 0, ushort d34 = 0, ushort d35 = 0, ushort d36 = 0, ushort d37 = 0)
|
||||
{
|
||||
cur_instr[0] = d0; cur_instr[1] = d1; cur_instr[2] = d2;
|
||||
cur_instr[3] = d3; cur_instr[4] = d4; cur_instr[5] = d5;
|
||||
cur_instr[6] = d6; cur_instr[7] = d7; cur_instr[8] = d8;
|
||||
cur_instr[9] = d9; cur_instr[10] = d10; cur_instr[11] = d11;
|
||||
cur_instr[12] = d12; cur_instr[13] = d13; cur_instr[14] = d14;
|
||||
cur_instr[15] = d15; cur_instr[16] = d16; cur_instr[17] = d17;
|
||||
cur_instr[18] = d18; cur_instr[19] = d19; cur_instr[20] = d20;
|
||||
cur_instr[21] = d21; cur_instr[22] = d22; cur_instr[23] = d23;
|
||||
cur_instr[24] = d24; cur_instr[25] = d25; cur_instr[26] = d26;
|
||||
cur_instr[27] = d27; cur_instr[28] = d28; cur_instr[29] = d29;
|
||||
cur_instr[30] = d30; cur_instr[31] = d31; cur_instr[32] = d32;
|
||||
cur_instr[33] = d33; cur_instr[34] = d34; cur_instr[35] = d35;
|
||||
cur_instr[36] = d36; cur_instr[37] = d37;
|
||||
}
|
||||
|
||||
// State Save/Load
|
||||
public void SyncState(Serializer ser)
|
||||
{
|
||||
|
|
@ -802,7 +857,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
ser.Sync("irq_pntr", ref irq_pntr);
|
||||
ser.Sync("cur_instr", ref cur_instr, false);
|
||||
ser.Sync("BUSRQ", ref BUSRQ, false);
|
||||
ser.Sync("IRQS", ref IRQS, false);
|
||||
ser.Sync("IRQS", ref IRQS);
|
||||
ser.Sync("MEMRQ", ref MEMRQ, false);
|
||||
ser.Sync("opcode", ref opcode);
|
||||
ser.Sync("FlagI", ref FlagI);
|
||||
|
|
|
|||
Loading…
Reference in New Issue