finish 0.9.44.1 and misc build fixes

This commit is contained in:
zeromus 2020-04-06 01:38:03 -04:00
parent 165f3db2d8
commit f783a691f9
11 changed files with 67 additions and 77 deletions

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@ -159,4 +159,8 @@
[OK] psx/dma : update GPU api. NOTE: found biz bug here.
[OK] psx/frontio : add cold
[OK] psx/gpu : (big change to make GPU static)
[OK] psx/psx : associated with GPU, add cold; ignored PSF loader cold. NOTE: at smoe point we got RMD_Drive, which I'm not using
[OK] psx/psx : associated with GPU, add cold; ignored PSF loader cold. NOTE: at smoe point we got RMD_Drive, which I'm not using
[NO] psx/input/* : not important cold and device specifications stuff
[OK] psx/mdec : fastcall
[OK] psx/irq : fastcall
[NO] types : extensive work to cold, hot, fastcall, etc. macros for compilers

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@ -1,21 +1,26 @@
/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/******************************************************************************/
/* Mednafen - Multi-system Emulator */
/******************************************************************************/
/* endian.cpp:
** Copyright (C) 2006-2016 Mednafen Team
**
** This program is free software; you can redistribute it and/or
** modify it under the terms of the GNU General Public License
** as published by the Free Software Foundation; either version 2
** of the License, or (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software Foundation, Inc.,
** 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
#include <stdio.h>
#include <stdio.h>
#include <algorithm>
#include "octoshock.h"
#include "endian.h"
@ -115,37 +120,16 @@ void Endian_A64_NE_BE(void *src, uint32 nelements)
#endif
}
static void FlipByteOrder(uint8 *src, uint32 count)
{
uint8 *start=src;
uint8 *end=src+count-1;
if((count&1) || !count) return; /* This shouldn't happen. */
count >>= 1;
while(count--)
{
uint8 tmp;
tmp=*end;
*end=*start;
*start=tmp;
end--;
start++;
}
}
void Endian_V_NE_LE(void *src, uint32 bytesize)
void Endian_V_NE_LE(void* p, size_t len)
{
#ifdef MSB_FIRST
FlipByteOrder((uint8 *)src, bytesize);
std::reverse((uint8*)p, (uint8*)p + len);
#endif
}
void Endian_V_NE_BE(void *src, uint32 bytesize)
void Endian_V_NE_BE(void* p, size_t len)
{
#ifdef LSB_FIRST
FlipByteOrder((uint8 *)src, bytesize);
std::reverse((uint8*)p, (uint8*)p + len);
#endif
}

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@ -261,9 +261,9 @@ static INLINE void ChRW(const unsigned ch, const uint32 CRModeCache, uint32 *V,
case CH_GPU:
if(CRModeCache & 0x1)
GPU->WriteDMA(*V);
GPU_WriteDMA(*V);
else
*V = GPU->ReadDMA();
*V = GPU_ReadDMA();
break;
case CH_CDC:

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@ -1571,7 +1571,7 @@ SYNCFUNC(PS_GPU)
}
void GPU_SetRenderOptions(::ShockRenderOptions* opts)
void PS_GPU::SetRenderOptions(::ShockRenderOptions* opts)
{
hide_hoverscan = opts->renderType == eShockRenderType_ClipOverscan;
dump_framebuffer = opts->renderType == eShockRenderType_Framebuffer;

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@ -67,7 +67,7 @@ void IRQ_Assert(int which, bool status)
}
void IRQ_Write(uint32 A, uint32 V)
MDFN_FASTCALL void IRQ_Write(uint32 A, uint32 V)
{
// FIXME if we ever have "accurate" bus emulation
V <<= (A & 3) * 8;
@ -86,7 +86,7 @@ void IRQ_Write(uint32 A, uint32 V)
}
uint32 IRQ_Read(uint32 A)
MDFN_FASTCALL uint32 IRQ_Read(uint32 A)
{
uint32 ret = 0;

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@ -43,8 +43,8 @@ enum
void IRQ_Power(void) MDFN_COLD;
void IRQ_Assert(int which, bool asserted);
void IRQ_Write(uint32 A, uint32 V);
uint32 IRQ_Read(uint32 A);
MDFN_FASTCALL void IRQ_Write(uint32 A, uint32 V);
MDFN_FASTCALL uint32 IRQ_Read(uint32 A);
enum

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@ -609,7 +609,7 @@ static INLINE void WriteImageData(uint16 V, int32* eat_cycles)
#define MDEC_READ_FIFO(n) { MDEC_WAIT_COND(InFIFO.CanRead()); n = InFIFO.Read(); }
#define MDEC_EAT_CLOCKS(n) { ClockCounter -= (n); MDEC_WAIT_COND(ClockCounter > 0); }
void MDEC_Run(int32 clocks)
MDFN_FASTCALL void MDEC_Run(int32 clocks)
{
static const unsigned MDRPhaseBias = __COUNTER__ + 1;
@ -748,7 +748,7 @@ void MDEC_Run(int32 clocks)
#endif
void MDEC_DMAWrite(uint32 V)
MDFN_FASTCALL void MDEC_DMAWrite(uint32 V)
{
if(InFIFO.CanWrite())
{
@ -761,7 +761,7 @@ void MDEC_DMAWrite(uint32 V)
}
}
uint32 MDEC_DMARead(uint32* offs)
MDFN_FASTCALL uint32 MDEC_DMARead(uint32* offs)
{
uint32 V = 0;
@ -805,7 +805,7 @@ bool MDEC_DMACanRead(void)
return((OutFIFO.CanRead() >= 0x20) && (Control & (1U << 29)));
}
void MDEC_Write(const pscpu_timestamp_t timestamp, uint32 A, uint32 V)
MDFN_FASTCALL void MDEC_Write(const pscpu_timestamp_t timestamp, uint32 A, uint32 V)
{
//PSX_WARNING("[MDEC] Write: 0x%08x 0x%08x, %d --- %u %u", A, V, timestamp, InFIFO.CanRead(), OutFIFO.CanRead());
if(A & 4)
@ -853,7 +853,7 @@ void MDEC_Write(const pscpu_timestamp_t timestamp, uint32 A, uint32 V)
}
}
uint32 MDEC_Read(const pscpu_timestamp_t timestamp, uint32 A)
MDFN_FASTCALL uint32 MDEC_Read(const pscpu_timestamp_t timestamp, uint32 A)
{
uint32 ret = 0;

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@ -25,19 +25,19 @@
namespace MDFN_IEN_PSX
{
void MDEC_DMAWrite(uint32 V);
MDFN_FASTCALL void MDEC_DMAWrite(uint32 V);
uint32 MDEC_DMARead(uint32* offs);
MDFN_FASTCALL uint32 MDEC_DMARead(uint32* offs);
void MDEC_Write(const pscpu_timestamp_t timestamp, uint32 A, uint32 V);
uint32 MDEC_Read(const pscpu_timestamp_t timestamp, uint32 A);
MDFN_FASTCALL void MDEC_Write(const pscpu_timestamp_t timestamp, uint32 A, uint32 V);
MDFN_FASTCALL uint32 MDEC_Read(const pscpu_timestamp_t timestamp, uint32 A);
void MDEC_Power(void) MDFN_COLD;
bool MDEC_DMACanWrite(void);
bool MDEC_DMACanRead(void);
void MDEC_Run(int32 clocks);
MDFN_FASTCALL void MDEC_Run(int32 clocks);
}

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@ -148,7 +148,7 @@ static uint32 CalcNextEvent(void)
return(next_event);
}
static bool TimerMatch(unsigned i)
static MDFN_FASTCALL bool TimerMatch(unsigned i)
{
bool irq_exact = false;
@ -179,7 +179,7 @@ static bool TimerMatch(unsigned i)
return irq_exact;
}
static bool TimerOverflow(unsigned i)
static MDFN_FASTCALL bool TimerOverflow(unsigned i)
{
bool irq_exact = false;
@ -204,7 +204,7 @@ static bool TimerOverflow(unsigned i)
return irq_exact;
}
static void ClockTimer(int i, uint32 clocks)
static MDFN_FASTCALL void ClockTimer(int i, uint32 clocks)
{
if(Timers[i].DoZeCounting <= 0)
clocks = 0;
@ -255,7 +255,7 @@ static void ClockTimer(int i, uint32 clocks)
}
}
void TIMER_SetVBlank(bool status)
MDFN_FASTCALL void TIMER_SetVBlank(bool status)
{
switch(Timers[1].Mode & 0x7)
{
@ -298,7 +298,7 @@ void TIMER_SetVBlank(bool status)
vblank = status;
}
void TIMER_SetHRetrace(bool status)
MDFN_FASTCALL void TIMER_SetHRetrace(bool status)
{
if(hretrace && !status)
{
@ -314,7 +314,7 @@ void TIMER_SetHRetrace(bool status)
hretrace = status;
}
void TIMER_AddDotClocks(uint32 count)
MDFN_FASTCALL void TIMER_AddDotClocks(uint32 count)
{
if(Timers[0].Mode & 0x100)
ClockTimer(0, count);
@ -326,7 +326,7 @@ void TIMER_ClockHRetrace(void)
ClockTimer(1, 1);
}
pscpu_timestamp_t TIMER_Update(const pscpu_timestamp_t timestamp)
MDFN_FASTCALL pscpu_timestamp_t TIMER_Update(const pscpu_timestamp_t timestamp)
{
int32 cpu_clocks = timestamp - lastts;
@ -345,7 +345,7 @@ pscpu_timestamp_t TIMER_Update(const pscpu_timestamp_t timestamp)
return(timestamp + CalcNextEvent());
}
static void CalcCountingStart(unsigned which)
static MDFN_FASTCALL void CalcCountingStart(unsigned which)
{
Timers[which].DoZeCounting = true;
@ -372,7 +372,7 @@ static void CalcCountingStart(unsigned which)
}
}
void TIMER_Write(const pscpu_timestamp_t timestamp, uint32 A, uint16 V)
MDFN_FASTCALL void TIMER_Write(const pscpu_timestamp_t timestamp, uint32 A, uint16 V)
{
TIMER_Update(timestamp);
@ -411,7 +411,7 @@ void TIMER_Write(const pscpu_timestamp_t timestamp, uint32 A, uint16 V)
PSX_SetEventNT(PSX_EVENT_TIMER, timestamp + CalcNextEvent());
}
uint16 TIMER_Read(const pscpu_timestamp_t timestamp, uint32 A)
MDFN_FASTCALL uint16 TIMER_Read(const pscpu_timestamp_t timestamp, uint32 A)
{
uint16 ret = 0;
int which = (A >> 4) & 0x3;

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@ -44,15 +44,15 @@ uint32 TIMER_GetRegister(unsigned int which, char *special, const uint32 special
void TIMER_SetRegister(unsigned int which, uint32 value);
void TIMER_Write(const pscpu_timestamp_t timestamp, uint32 A, uint16 V);
uint16 TIMER_Read(const pscpu_timestamp_t timestamp, uint32 A);
MDFN_FASTCALL void TIMER_Write(const pscpu_timestamp_t timestamp, uint32 A, uint16 V);
MDFN_FASTCALL uint16 TIMER_Read(const pscpu_timestamp_t timestamp, uint32 A);
void TIMER_AddDotClocks(uint32 count);
MDFN_FASTCALL void TIMER_AddDotClocks(uint32 count);
void TIMER_ClockHRetrace(void);
void TIMER_SetHRetrace(bool status);
void TIMER_SetVBlank(bool status);
MDFN_FASTCALL void TIMER_SetHRetrace(bool status);
MDFN_FASTCALL void TIMER_SetVBlank(bool status);
pscpu_timestamp_t TIMER_Update(const pscpu_timestamp_t);
MDFN_FASTCALL pscpu_timestamp_t TIMER_Update(const pscpu_timestamp_t);
void TIMER_ResetTS(void);
void TIMER_Power(void) MDFN_COLD;

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@ -1645,7 +1645,7 @@ static void ThreadSafeErrno_Test(void)
using namespace MDFN_TESTS_CPP;
#ifdef WANT_TEST_EXCEPTOINS
#ifdef WANT_TEST_EXCEPTIONS
void MDFN_RunExceptionTests(const unsigned thread_count, const unsigned thread_delay)
{
std::atomic_int_least32_t sv;
@ -1730,7 +1730,9 @@ bool MDFN_RunMathTests(void)
RunMiscEndianTests(0xAA010203, 0xBB030201);
#ifdef WANT_TEST_EXCEPTIONS
MDFN_RunExceptionTests(1, 0);
#endif
RunSTLTests();