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GBHawk: some accuracy improvements

This commit is contained in:
alyosha-tas 2020-11-28 18:58:33 -05:00
parent e0eb572e74
commit f38c75f06d
4 changed files with 23 additions and 1 deletions
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6
src/BizHawk.Emulation.Cores/Consoles/Nintendo/GBHawk/GBC_GB_PPU.cs
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@ -330,6 +330,9 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
VRAM_access_read = VRAM_access_read_PPU & VRAM_access_read_HDMA;
VRAM_access_write_HDMA = false;
VRAM_access_write = VRAM_access_write_PPU & VRAM_access_write_HDMA;
// reading from open bus still returns 0xFF on DMA access, see dma_hiram_read_result_cgb04c_out1.gbc
Core.bus_value = 0xFF;
}
else
{
@ -399,6 +402,9 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
VRAM_access_write_HDMA = false;
VRAM_access_write = VRAM_access_write_PPU & VRAM_access_write_HDMA;
// reading from open bus still returns 0xFF on DMA access, see dma_hiram_read_result_cgb04c_out1.gbc
Core.bus_value = 0xFF;
if (LCDC.Bit(7)) { last_HBL = LY; }
else { last_HBL = 0xFF; }
}

14
src/BizHawk.Emulation.Cores/Consoles/Nintendo/GBHawk/GBC_PPU.cs
View File

@ -328,6 +328,9 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
VRAM_access_read = VRAM_access_read_PPU & VRAM_access_read_HDMA;
VRAM_access_write_HDMA = false;
VRAM_access_write = VRAM_access_write_PPU & VRAM_access_write_HDMA;
// reading from open bus still returns 0xFF on DMA access, see dma_hiram_read_result_cgb04c_out1.gbc
Core.bus_value = 0xFF;
}
else
{
@ -355,6 +358,8 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
Core.VRAM[(Core.VRAM_Bank * 0x2000) + cur_DMA_dest] = HDMA_byte;
cur_DMA_dest = (ushort)((cur_DMA_dest + 1) & 0x1FFF);
cur_DMA_src = (ushort)((cur_DMA_src + 1) & 0xFFFF);
// similar to normal DMA, except HDMA transfers when A14 is high always access SRAM
if (cur_DMA_src >= 0xE000) { cur_DMA_src &= 0xBFFF; }
HDMA_length--;
@ -395,6 +400,9 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
VRAM_access_write_HDMA = false;
VRAM_access_write = VRAM_access_write_PPU & VRAM_access_write_HDMA;
// reading from open bus still returns 0xFF on DMA access, see dma_hiram_read_result_cgb04c_out1.gbc
Core.bus_value = 0xFF;
if (LCDC.Bit(7)) { last_HBL = LY; }
else { last_HBL = 0xFF; }
}
@ -423,6 +431,8 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
Core.VRAM[(Core.VRAM_Bank * 0x2000) + cur_DMA_dest] = HDMA_byte;
cur_DMA_dest = (ushort)((cur_DMA_dest + 1) & 0x1FFF);
cur_DMA_src = (ushort)((cur_DMA_src + 1) & 0xFFFF);
// similar to normal DMA, except HDMA transfers when A14 is high always access SRAM
if (cur_DMA_src >= 0xE000) { cur_DMA_src &= 0xBFFF; }
HDMA_length--;
@ -704,7 +714,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
if (LY_inc == 0)
{
if (cycle == 10)
if (cycle == LY_153_change)
{
LY_read = LY;
}
@ -1817,6 +1827,8 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
LYC_offset = 2;
glitch_state = false;
LY_153_change = 10;
}
}
}

2
src/BizHawk.Emulation.Cores/Consoles/Nintendo/GBHawk/GBHawk.IEmulator.cs
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@ -319,6 +319,8 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
ppu.LYC_offset = double_speed ? 1 : 2;
ppu.LY_153_change = double_speed ? 8 : 10;
return 0;
}
else

2
src/BizHawk.Emulation.Cores/Consoles/Nintendo/GBHawk/PPU.cs
View File

@ -117,6 +117,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
public bool pal_change_blocked; // in compatability mode, you can change palette values but not displayed color
public int LYC_offset; // in double speed mode it appears timing changes for LYC int
public bool glitch_state; // writing to STAT to enable HBL interrupt won't trigger it if the ppu just turned on
public int LY_153_change; // the timing of LYC chaning to 153 looks like it varies with speed mode
// variables not in state
public int total_counter;
@ -284,6 +285,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
ser.Sync(nameof(pal_change_blocked), ref pal_change_blocked);
ser.Sync(nameof(LYC_offset), ref LYC_offset);
ser.Sync(nameof(glitch_state), ref glitch_state);
ser.Sync(nameof(LY_153_change), ref LY_153_change);
}
}
}