Commodore64: Convert lambda functions in the mobo glue into methods for ease of debugging and performance.
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@ -29,7 +29,7 @@ namespace BizHawk.Emulation.Computers.Commodore64
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public byte bus;
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public byte cia0DataA;
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public byte cia0DataB;
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public byte cia0DirA;
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public byte cia0DirA;
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public byte cia0DirB;
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public bool cia0FlagCassette;
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public bool cia0FlagSerial;
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@ -123,47 +123,39 @@ namespace BizHawk.Emulation.Computers.Commodore64
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public void Init()
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{
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cassPort.DeviceReadLevel = (() => { return cpu.CassetteOutputLevel; });
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cassPort.DeviceReadMotor = (() => { return cpu.CassetteMotor; });
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cassPort.DeviceWriteButton = ((bool val) => { cpu.CassetteButton = val; });
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cassPort.DeviceWriteLevel = ((bool val) => { cia0FlagCassette = val; cia0.FLAG = cia0FlagCassette & cia0FlagSerial; });
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cassPort.SystemReadButton = (() => { return true; });
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cassPort.SystemReadLevel = (() => { return true; });
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cassPort.SystemWriteLevel = ((bool val) => { });
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cassPort.SystemWriteMotor = ((bool val) => { });
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cassPort.DeviceReadLevel = CassPort_DeviceReadLevel;
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cassPort.DeviceReadMotor = CassPort_DeviceReadMotor;
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cassPort.DeviceWriteButton = CassPort_DeviceWriteButton;
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cassPort.DeviceWriteLevel = CassPort_DeviceWriteLevel;
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cassPort.SystemReadButton = CassPort_SystemReadLevel;
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cassPort.SystemReadLevel = CassPort_SystemReadLevel;
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cassPort.SystemWriteLevel = CassPort_SystemWriteLevel;
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cassPort.SystemWriteMotor = CassPort_SystemWriteMotor;
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cia0.ReadDirA = (() => { return cia0DirA; });
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cia0.ReadDirB = (() => { return cia0DirB; });
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cia0.ReadPortA = (() => { return cia0DataA; });
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cia0.ReadPortB = (() => { return cia0DataB; });
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cia0.WriteDirA = ((byte val) => { cia0DirA = val; });
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cia0.WriteDirB = ((byte val) => { cia0DirB = val; });
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cia0.WritePortA = ((byte val) => { cia0DataA = Port.CPUWrite(cia0DataA, val, cia0DirA); });
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cia0.WritePortB = ((byte val) => { cia0DataB = Port.CPUWrite(cia0DataB, val, cia0DirB); });
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cia0.ReadDirA = Cia0_ReadDirA;
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cia0.ReadDirB = Cia0_ReadDirB;
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cia0.ReadPortA = Cia0_ReadPortA;
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cia0.ReadPortB = Cia0_ReadPortB;
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cia0.WriteDirA = Cia0_WriteDirA;
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cia0.WriteDirB = Cia0_WriteDirB;
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cia0.WritePortA = Cia0_WritePortA;
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cia0.WritePortB = Cia0_WritePortB;
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cia1.ReadDirA = (() => { return cia1DirA; });
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cia1.ReadDirB = (() => { return cia1DirB; });
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cia1.ReadPortA = (() => { return cia1DataA; });
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cia1.ReadPortB = (() => { return cia1DataB; });
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cia1.WriteDirA = ((byte val) => { cia1DirA = val; });
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cia1.WriteDirB = ((byte val) => { cia1DirB = val; });
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cia1.WritePortA = ((byte val) => {
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cia1DataA = Port.CPUWrite(cia1DataA, val, cia1DirA);
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UpdateVicBank();
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serPort.SystemWriteAtn((cia1DataA & 0x08) == 0);
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serPort.SystemWriteClock((cia1DataA & 0x10) == 0);
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serPort.SystemWriteData((cia1DataA & 0x20) == 0);
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});
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cia1.WritePortB = ((byte val) => {
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cia1DataB = Port.CPUWrite(cia1DataB, val, cia1DirB);
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});
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cia1.ReadDirA = Cia1_ReadDirA;
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cia1.ReadDirB = Cia1_ReadDirB;
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cia1.ReadPortA = Cia1_ReadPortA;
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cia1.ReadPortB = Cia1_ReadPortB;
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cia1.WriteDirA = Cia1_WriteDirA;
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cia1.WriteDirB = Cia1_WriteDirB;
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cia1.WritePortA = Cia1_WritePortA;
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cia1.WritePortB = Cia1_WritePortB;
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cpu.PeekMemory = pla.Peek;
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cpu.PokeMemory = pla.Poke;
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cpu.ReadAEC = (() => { return vic.AEC; });
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cpu.ReadIRQ = (() => { return cia0.IRQ & vic.IRQ & cartPort.IRQ; });
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cpu.ReadNMI = (() => { return cia1.IRQ; });
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cpu.ReadRDY = (() => { return vic.BA; });
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cpu.ReadAEC = Cpu_ReadAEC;
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cpu.ReadIRQ = Cpu_ReadIRQ;
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cpu.ReadNMI = Cpu_ReadNMI;
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cpu.ReadRDY = Cpu_ReadRDY;
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cpu.ReadMemory = pla.Read;
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cpu.WriteMemory = pla.Write;
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@ -190,72 +182,50 @@ namespace BizHawk.Emulation.Computers.Commodore64
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pla.PokeMemory = ram.Poke;
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pla.PokeSid = sid.Poke;
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pla.PokeVic = vic.Poke;
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pla.ReadBasicRom = ((ushort addr) => { address = addr; bus = basicRom.Read(addr); return bus; });
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pla.ReadCartridgeHi = ((ushort addr) => { address = addr; bus = cartPort.ReadHiRom(addr); return bus; });
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pla.ReadCartridgeLo = ((ushort addr) => { address = addr; bus = cartPort.ReadLoRom(addr); return bus; });
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pla.ReadCharen = (() => { return cpu.Charen; });
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pla.ReadCharRom = ((ushort addr) => { address = addr; bus = charRom.Read(addr); return bus; });
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pla.ReadCia0 = ((ushort addr) =>
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{
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address = addr;
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bus = cia0.Read(addr);
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if (!inputRead && (addr == 0xDC00 || addr == 0xDC01))
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inputRead = true;
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return bus;
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});
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pla.ReadCia1 = ((ushort addr) => { address = addr; bus = cia1.Read(addr); return bus; });
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pla.ReadColorRam = ((ushort addr) => { address = addr; bus &= 0xF0; bus |= colorRam.Read(addr); return bus; });
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pla.ReadExpansionHi = ((ushort addr) => { address = addr; bus = cartPort.ReadHiExp(addr); return bus; });
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pla.ReadExpansionLo = ((ushort addr) => { address = addr; bus = cartPort.ReadLoExp(addr); return bus; });
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pla.ReadExRom = (() => { return cartPort.ExRom; });
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pla.ReadGame = (() => { return cartPort.Game; });
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pla.ReadHiRam = (() => { return cpu.HiRam; });
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pla.ReadKernalRom = ((ushort addr) => { address = addr; bus = kernalRom.Read(addr); return bus; });
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pla.ReadLoRam = (() => { return cpu.LoRam; });
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pla.ReadMemory = ((ushort addr) => { address = addr; bus = ram.Read(addr); return bus; });
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pla.ReadSid = ((ushort addr) => { address = addr; bus = sid.Read(addr); return bus; });
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pla.ReadVic = ((ushort addr) => { address = addr; bus = vic.Read(addr); return bus; });
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pla.WriteCartridgeHi = ((ushort addr, byte val) => { address = addr; bus = val; cartPort.WriteHiRom(addr, val); });
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pla.WriteCartridgeLo = ((ushort addr, byte val) => { address = addr; bus = val; cartPort.WriteLoRom(addr, val); });
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pla.WriteCia0 = ((ushort addr, byte val) => { address = addr; bus = val; cia0.Write(addr, val); });
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pla.WriteCia1 = ((ushort addr, byte val) => { address = addr; bus = val; cia1.Write(addr, val); });
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pla.WriteColorRam = ((ushort addr, byte val) => { address = addr; bus = val; colorRam.Write(addr, val); });
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pla.WriteExpansionHi = ((ushort addr, byte val) => { address = addr; bus = val; cartPort.WriteHiExp(addr, val); });
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pla.WriteExpansionLo = ((ushort addr, byte val) => { address = addr; bus = val; cartPort.WriteLoExp(addr, val); });
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pla.WriteMemory = ((ushort addr, byte val) => { address = addr; bus = val; ram.Write(addr, val); });
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pla.WriteSid = ((ushort addr, byte val) => { address = addr; bus = val; sid.Write(addr, val); });
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pla.WriteVic = ((ushort addr, byte val) => { address = addr; bus = val; vic.Write(addr, val); });
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pla.ReadBasicRom = Pla_ReadBasicRom;
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pla.ReadCartridgeHi = Pla_ReadCartridgeHi;
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pla.ReadCartridgeLo = Pla_ReadCartridgeLo;
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pla.ReadCharen = Pla_ReadCharen;
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pla.ReadCharRom = Pla_ReadCharRom;
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pla.ReadCia0 = Pla_ReadCia0;
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pla.ReadCia1 = Pla_ReadCia1;
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pla.ReadColorRam = Pla_ReadColorRam;
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pla.ReadExpansionHi = Pla_ReadExpansionHi;
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pla.ReadExpansionLo = Pla_ReadExpansionLo;
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pla.ReadExRom = Pla_ReadExRom;
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pla.ReadGame = Pla_ReadGame;
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pla.ReadHiRam = Pla_ReadHiRam;
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pla.ReadKernalRom = Pla_ReadKernalRom;
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pla.ReadLoRam = Pla_ReadLoRam;
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pla.ReadMemory = Pla_ReadMemory;
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pla.ReadSid = Pla_ReadSid;
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pla.ReadVic = Pla_ReadVic;
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pla.WriteCartridgeHi = Pla_WriteCartridgeHi;
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pla.WriteCartridgeLo = Pla_WriteCartridgeLo;
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pla.WriteCia0 = Pla_WriteCia0;
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pla.WriteCia1 = Pla_WriteCia1;
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pla.WriteColorRam = Pla_WriteColorRam;
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pla.WriteExpansionHi = Pla_WriteExpansionHi;
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pla.WriteExpansionLo = Pla_WriteExpansionLo;
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pla.WriteMemory = Pla_WriteMemory;
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pla.WriteSid = Pla_WriteSid;
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pla.WriteVic = Pla_WriteVic;
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// note: c64 serport lines are inverted
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serPort.DeviceReadAtn = (() => { return (cia1DataA & 0x08) == 0; });
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serPort.DeviceReadClock = (() => { return (cia1DataA & 0x10) == 0; });
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serPort.DeviceReadData = (() => { return (cia1DataA & 0x20) == 0; });
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serPort.DeviceReadReset = (() => { return true; }); // this triggers hard reset on ext device when low
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serPort.DeviceWriteAtn = ((bool val) => { }); // currently not wired
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serPort.DeviceWriteClock = ((bool val) => { cia1DataA = Port.ExternalWrite(cia1DataA, (byte)((cia1DataA & 0xBF) | (val ? 0x00 : 0x40)), cia1DirA); });
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serPort.DeviceWriteData = ((bool val) => { cia1DataA = Port.ExternalWrite(cia1DataA, (byte)((cia1DataA & 0x7F) | (val ? 0x00 : 0x80)), cia1DirA); });
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serPort.DeviceWriteSrq = ((bool val) => { cia0FlagSerial = val; cia0.FLAG = cia0FlagCassette & cia0FlagSerial; });
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serPort.DeviceReadAtn = SerPort_DeviceReadAtn;
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serPort.DeviceReadClock = SerPort_DeviceReadClock;
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serPort.DeviceReadData = SerPort_DeviceReadData;
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serPort.DeviceReadReset = SerPort_DeviceReadReset;
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serPort.DeviceWriteAtn = SerPort_DeviceWriteAtn;
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serPort.DeviceWriteClock = SerPort_DeviceWriteClock;
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serPort.DeviceWriteData = SerPort_DeviceWriteData;
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serPort.DeviceWriteSrq = SerPort_DeviceWriteSrq;
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sid.ReadPotX = (() => { return 0; });
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sid.ReadPotY = (() => { return 0; });
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sid.ReadPotX = Sid_ReadPotX;
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sid.ReadPotY = Sid_ReadPotY;
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vic.ReadMemory = ((ushort addr) =>
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{
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addr |= vicBank;
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address = addr;
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if ((addr & 0x7000) == 0x1000)
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bus = charRom.Read(addr);
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else
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bus = ram.Read(addr);
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return bus;
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});
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vic.ReadColorRam = ((ushort addr) =>
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{
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address = addr;
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bus &= 0xF0;
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bus |= colorRam.Read(addr);
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return bus;
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});
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vic.ReadMemory = Vic_ReadMemory;
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vic.ReadColorRam = Vic_ReadColorRam;
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}
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public void SyncState(Serializer ser)
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@ -0,0 +1,417 @@
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using BizHawk.Emulation.Computers.Commodore64.MOS;
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using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Text;
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namespace BizHawk.Emulation.Computers.Commodore64
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{
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public partial class Motherboard
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{
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bool CassPort_DeviceReadLevel()
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{
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return cpu.CassetteOutputLevel;
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}
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bool CassPort_DeviceReadMotor()
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{
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return cpu.CassetteMotor;
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}
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void CassPort_DeviceWriteButton(bool val)
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{
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cpu.CassetteButton = val;
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}
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void CassPort_DeviceWriteLevel(bool val)
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{
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cia0FlagCassette = val;
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cia0.FLAG = cia0FlagCassette & cia0FlagSerial;
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}
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bool CassPort_SystemReadButton()
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{
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return true;
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}
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bool CassPort_SystemReadLevel()
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{
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return true;
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}
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void CassPort_SystemWriteLevel(bool val)
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{
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return;
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}
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void CassPort_SystemWriteMotor(bool val)
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{
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return;
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}
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byte Cia0_ReadDirA()
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{
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return cia0DirA;
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}
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byte Cia0_ReadDirB()
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{
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return cia0DirB;
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}
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byte Cia0_ReadPortA()
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{
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return cia0DataA;
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}
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byte Cia0_ReadPortB()
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{
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return cia0DataB;
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}
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void Cia0_WriteDirA(byte val)
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{
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cia0DirA = val;
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}
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void Cia0_WriteDirB(byte val)
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{
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cia0DirB = val;
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}
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void Cia0_WritePortA(byte val)
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{
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cia0DataA = Port.CPUWrite(cia0DataA, val, cia0DirA);
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}
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void Cia0_WritePortB(byte val)
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{
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cia0DataB = Port.CPUWrite(cia0DataB, val, cia0DirB);
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}
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byte Cia1_ReadDirA()
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{
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return cia1DirA;
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}
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byte Cia1_ReadDirB()
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{
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return cia1DirB;
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}
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byte Cia1_ReadPortA()
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{
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return cia1DataA;
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}
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byte Cia1_ReadPortB()
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{
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return cia1DataB;
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}
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void Cia1_WriteDirA(byte val)
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{
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cia1DirA = val;
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}
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void Cia1_WriteDirB(byte val)
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{
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cia1DirB = val;
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}
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void Cia1_WritePortA(byte val)
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{
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cia1DataA = Port.CPUWrite(cia1DataA, val, cia1DirA);
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UpdateVicBank();
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serPort.SystemWriteAtn((cia1DataA & 0x08) == 0);
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serPort.SystemWriteClock((cia1DataA & 0x10) == 0);
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serPort.SystemWriteData((cia1DataA & 0x20) == 0);
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}
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void Cia1_WritePortB(byte val)
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{
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cia1DataB = Port.CPUWrite(cia1DataB, val, cia1DirB);
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}
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bool Cpu_ReadAEC()
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{
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return vic.AEC;
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}
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bool Cpu_ReadIRQ()
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{
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return cia0.IRQ & vic.IRQ & cartPort.IRQ;
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}
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bool Cpu_ReadNMI()
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{
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return cia1.IRQ;
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}
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bool Cpu_ReadRDY()
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{
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return vic.BA;
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}
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byte Pla_ReadBasicRom(ushort addr)
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{
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address = addr;
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bus = basicRom.Read(addr);
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return bus;
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}
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byte Pla_ReadCartridgeHi(ushort addr)
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{
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address = addr;
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bus = cartPort.ReadHiRom(addr);
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return bus;
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}
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byte Pla_ReadCartridgeLo(ushort addr)
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{
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address = addr;
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bus = cartPort.ReadLoRom(addr);
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return bus;
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}
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bool Pla_ReadCharen()
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{
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return cpu.Charen;
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}
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byte Pla_ReadCharRom(ushort addr)
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{
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address = addr;
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bus = charRom.Read(addr);
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return bus;
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}
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byte Pla_ReadCia0(ushort addr)
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{
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address = addr;
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bus = cia0.Read(addr);
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if (!inputRead && (addr == 0xDC00 || addr == 0xDC01))
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inputRead = true;
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return bus;
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}
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byte Pla_ReadCia1(ushort addr)
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{
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address = addr;
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bus = cia1.Read(addr);
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return bus;
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}
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byte Pla_ReadColorRam(ushort addr)
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{
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address = addr;
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bus &= 0xF0;
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bus |= colorRam.Read(addr);
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return bus;
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}
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byte Pla_ReadExpansionHi(ushort addr)
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{
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address = addr;
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bus = cartPort.ReadHiExp(addr);
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return bus;
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}
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byte Pla_ReadExpansionLo(ushort addr)
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{
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address = addr;
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bus = cartPort.ReadLoExp(addr);
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return bus;
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}
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bool Pla_ReadExRom()
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{
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return cartPort.ExRom;
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}
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bool Pla_ReadGame()
|
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{
|
||||
return cartPort.Game;
|
||||
}
|
||||
|
||||
bool Pla_ReadHiRam()
|
||||
{
|
||||
return cpu.HiRam;
|
||||
}
|
||||
|
||||
byte Pla_ReadKernalRom(ushort addr)
|
||||
{
|
||||
address = addr;
|
||||
bus = kernalRom.Read(addr);
|
||||
return bus;
|
||||
}
|
||||
|
||||
bool Pla_ReadLoRam()
|
||||
{
|
||||
return cpu.LoRam;
|
||||
}
|
||||
|
||||
byte Pla_ReadMemory(ushort addr)
|
||||
{
|
||||
address = addr;
|
||||
bus = ram.Read(addr);
|
||||
return bus;
|
||||
}
|
||||
|
||||
byte Pla_ReadSid(ushort addr)
|
||||
{
|
||||
address = addr;
|
||||
bus = sid.Read(addr);
|
||||
return bus;
|
||||
}
|
||||
|
||||
byte Pla_ReadVic(ushort addr)
|
||||
{
|
||||
address = addr;
|
||||
bus = vic.Read(addr);
|
||||
return bus;
|
||||
}
|
||||
|
||||
void Pla_WriteCartridgeHi(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
cartPort.WriteHiRom(addr, val);
|
||||
}
|
||||
|
||||
void Pla_WriteCartridgeLo(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
cartPort.WriteLoRom(addr, val);
|
||||
}
|
||||
|
||||
void Pla_WriteCia0(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
cia0.Write(addr, val);
|
||||
}
|
||||
|
||||
void Pla_WriteCia1(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
cia1.Write(addr, val);
|
||||
}
|
||||
|
||||
void Pla_WriteColorRam(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
colorRam.Write(addr, val);
|
||||
}
|
||||
|
||||
void Pla_WriteExpansionHi(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
cartPort.WriteHiExp(addr, val);
|
||||
}
|
||||
|
||||
void Pla_WriteExpansionLo(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
cartPort.WriteLoExp(addr, val);
|
||||
}
|
||||
|
||||
void Pla_WriteMemory(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
ram.Write(addr, val);
|
||||
}
|
||||
|
||||
void Pla_WriteSid(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
sid.Write(addr, val);
|
||||
}
|
||||
|
||||
void Pla_WriteVic(ushort addr, byte val)
|
||||
{
|
||||
address = addr;
|
||||
bus = val;
|
||||
vic.Write(addr, val);
|
||||
}
|
||||
|
||||
bool SerPort_DeviceReadAtn()
|
||||
{
|
||||
return (cia1DataA & 0x08) == 0;
|
||||
}
|
||||
|
||||
bool SerPort_DeviceReadClock()
|
||||
{
|
||||
return (cia1DataA & 0x10) == 0;
|
||||
}
|
||||
|
||||
bool SerPort_DeviceReadData()
|
||||
{
|
||||
return (cia1DataA & 0x20) == 0;
|
||||
}
|
||||
|
||||
bool SerPort_DeviceReadReset()
|
||||
{
|
||||
// this triggers hard reset on ext device when low
|
||||
return true;
|
||||
}
|
||||
|
||||
void SerPort_DeviceWriteAtn(bool val)
|
||||
{
|
||||
// currently not wired
|
||||
}
|
||||
|
||||
void SerPort_DeviceWriteClock(bool val)
|
||||
{
|
||||
cia1DataA = Port.ExternalWrite(cia1DataA, (byte)((cia1DataA & 0xBF) | (val ? 0x00 : 0x40)), cia1DirA);
|
||||
}
|
||||
|
||||
void SerPort_DeviceWriteData(bool val)
|
||||
{
|
||||
cia1DataA = Port.ExternalWrite(cia1DataA, (byte)((cia1DataA & 0x7F) | (val ? 0x00 : 0x80)), cia1DirA);
|
||||
}
|
||||
|
||||
void SerPort_DeviceWriteSrq(bool val)
|
||||
{
|
||||
cia0FlagSerial = val;
|
||||
cia0.FLAG = cia0FlagCassette & cia0FlagSerial;
|
||||
}
|
||||
|
||||
byte Sid_ReadPotX()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
byte Sid_ReadPotY()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
byte Vic_ReadMemory(ushort addr)
|
||||
{
|
||||
addr |= vicBank;
|
||||
address = addr;
|
||||
if ((addr & 0x7000) == 0x1000)
|
||||
bus = charRom.Read(addr);
|
||||
else
|
||||
bus = ram.Read(addr);
|
||||
return bus;
|
||||
}
|
||||
|
||||
byte Vic_ReadColorRam(ushort addr)
|
||||
{
|
||||
address = addr;
|
||||
bus &= 0xF0;
|
||||
bus |= colorRam.Read(addr);
|
||||
return bus;
|
||||
}
|
||||
}
|
||||
}
|
Loading…
Reference in New Issue