Atari7800Hawk: More Mappers

This commit is contained in:
alyosha-tas 2017-07-21 16:34:27 -04:00 committed by GitHub
parent f5a5e9bd17
commit d44971a021
2 changed files with 135 additions and 8 deletions

View File

@ -4,8 +4,7 @@ using System;
namespace BizHawk.Emulation.Cores.Atari.A7800Hawk
{
// Default mapper with no bank switching
// Just need to keep track of high score bios stuff
// Default Bank Switching Mapper used by most games
public class MapperSG : MapperBase
{
public byte bank = 0;
@ -42,24 +41,39 @@ namespace BizHawk.Emulation.Cores.Atari.A7800Hawk
}
else
{
if (addr >=0xC000)
if (addr >= 0xC000)
{
// bank 7 is fixed
return Core._rom[Core._rom.Length - (0x10000 - addr)];
}
else if (addr >= 0x8000)
{
// reutrn whatever bank is there
// return whatever bank is there
int temp_addr = addr - 0x8000;
return Core._rom[temp_addr + bank * 0x4000];
}
else
{
// return bank 6
int temp_addr = addr - 0x4000;
return Core._rom[temp_addr + 6 * 0x4000];
}
if (!Core.small_flag)
{
return Core._rom[temp_addr + 6 * 0x4000];
}
else
{
if (Core.PAL_Kara)
{
return Core._rom[temp_addr + 2 * 0x4000];
}
else
{
// Should never get here, but in case we do just return FF
return 0xFF;
}
}
}
}
}
}
@ -95,7 +109,7 @@ namespace BizHawk.Emulation.Cores.Atari.A7800Hawk
// cartridge and other OPSYS
if (addr>=0x8000)
{
bank = (byte)(value & 0x7);
bank = (byte)(value & (Core.small_flag ? 0x3 : 0x7));
}
}
}

View File

@ -0,0 +1,113 @@
using BizHawk.Common;
using BizHawk.Common.NumberExtensions;
using System;
namespace BizHawk.Emulation.Cores.Atari.A7800Hawk
{
// Super Game mapper but with extra ROM at the start of the file
// Have to add 1 to bank number to get correct bank value
public class MapperSGE : MapperBase
{
public byte bank = 0;
public override byte ReadMemory(ushort addr)
{
if (addr >= 0x1000 && addr < 0x1800)
{
//could be hsbios RAM here
if (Core._hsbios != null)
{
return Core._hsram[addr - 0x1000];
}
return 0xFF;
}
else if (addr < 0x4000)
{
// could be either RAM mirror or ROM
if (addr >= 0x3000 && Core._hsbios != null)
{
return Core._hsbios[addr - 0x3000];
}
else
{
return Core.RAM[0x800 + addr & 0x7FF];
}
}
else
{
// cartridge and other OPSYS
if (addr >= (0x10000 - Core._bios.Length) && !Core.A7800_control_register.Bit(2))
{
return Core._bios[addr - (0x10000 - Core._bios.Length)];
}
else
{
if (addr >=0xC000)
{
// bank 7 is fixed
return Core._rom[Core._rom.Length - (0x10000 - addr)];
}
else if (addr >= 0x8000)
{
// return whatever bank is there
// but remember we need to add 1 to adjust for the extra bank at the beginning
int temp_addr = addr - 0x8000;
return Core._rom[temp_addr + (bank + 1) * 0x4000];
}
else
{
// return the 16k extra ROM (located at beginning of file)
int temp_addr = addr - 0x4000;
return Core._rom[temp_addr];
}
}
}
}
public override byte PeekMemory(ushort addr)
{
return ReadMemory(addr);
}
public override void WriteMemory(ushort addr, byte value)
{
if (addr >= 0x1000 && addr < 0x1800)
{
//could be hsbios RAM here
if (Core._hsbios != null)
{
Core._hsram[addr - 0x1000] = value;
}
}
else if (addr < 0x4000)
{
// could be either RAM mirror or ROM
if (addr >= 0x3000 && Core._hsbios != null)
{
}
else
{
Core.RAM[0x800 + addr & 0x7FF] = value;
}
}
else
{
// cartridge and other OPSYS
if (addr>=0x8000)
{
bank = (byte)(value & 0x7);
}
}
}
public override void PokeMemory(ushort addr, byte value)
{
WriteMemory(addr, value);
}
public override void SyncState(Serializer ser)
{
ser.Sync("Bank", ref bank);
}
}
}