commit
cd95bb3e62
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@ -197,7 +197,7 @@ namespace BizHawk.Emulation.Cores.Components.M6502
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/*TYA [implied]*/ new Uop[] { Uop.Imp_TYA, Uop.End },
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/*TYA [implied]*/ new Uop[] { Uop.Imp_TYA, Uop.End },
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/*STA addr,Y [absolute indexed WRITE]*/ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_Y, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_STA, Uop.End },
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/*STA addr,Y [absolute indexed WRITE]*/ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_Y, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_STA, Uop.End },
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/*TXS [implied]*/ new Uop[] { Uop.Imp_TXS, Uop.End },
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/*TXS [implied]*/ new Uop[] { Uop.Imp_TXS, Uop.End },
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/*SHS* addr,Y [absolute indexed WRITE X] [unofficial] [NOT IMPLEMENTED - TRICKY, AND NO TEST]*/ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_Y, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_ERROR, Uop.End },
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/*SHS* addr,Y [absolute indexed WRITE Y] [unofficial] */ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_Y, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_ERROR, Uop.End },
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/*SHY** [absolute indexed WRITE] [unofficial]*/ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_X, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_SHY, Uop.End },
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/*SHY** [absolute indexed WRITE] [unofficial]*/ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_X, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_SHY, Uop.End },
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/*STA addr,X [absolute indexed WRITE]*/ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_X, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_STA, Uop.End },
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/*STA addr,X [absolute indexed WRITE]*/ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_X, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_STA, Uop.End },
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/*SHX* addr,Y [absolute indexed WRITE Y] [unofficial]*/ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_Y, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_SHX, Uop.End },
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/*SHX* addr,Y [absolute indexed WRITE Y] [unofficial]*/ new Uop[] { Uop.Fetch2, Uop.AbsIdx_Stage3_Y, Uop.AbsIdx_Stage4, Uop.AbsIdx_WRITE_Stage5_SHX, Uop.End },
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@ -2298,14 +2298,8 @@ namespace BizHawk.Emulation.Cores.Components.M6502
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}
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}
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void AbsIdx_WRITE_Stage5_ERROR()
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void AbsIdx_WRITE_Stage5_ERROR()
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{
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{
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//rdy_freeze = !RDY;
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//if (RDY)
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//{
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//alu_temp = ReadMemory((ushort)ea);
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//throw new InvalidOperationException("UNSUPPORTED OPCODE [probably SHS] PLEASE REPORT");
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//}
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S = (byte)(X & A);
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S = (byte)(X & A);
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WriteMemory((ushort)ea, (byte)(S & opcode3));
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WriteMemory((ushort)ea, (byte)(S & (opcode3+1)));
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}
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}
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void AbsIdx_RMW_Stage5()
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void AbsIdx_RMW_Stage5()
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@ -2526,7 +2520,6 @@ namespace BizHawk.Emulation.Cores.Components.M6502
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if (RDY)
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if (RDY)
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{
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{
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alu_temp = ReadMemory((ushort)ea);
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alu_temp = ReadMemory((ushort)ea);
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// Alyosha: wish me luck!
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S &= (byte)alu_temp;
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S &= (byte)alu_temp;
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X = S;
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X = S;
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A = S;
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A = S;
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@ -2965,7 +2958,7 @@ namespace BizHawk.Emulation.Cores.Components.M6502
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public void ExecuteOne()
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public void ExecuteOne()
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{
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{
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// total cycles now incraments every time a cycle is called to accurately count during RDY
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TotalExecutedCycles++;
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TotalExecutedCycles++;
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if (!rdy_freeze)
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if (!rdy_freeze)
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{
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{
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@ -730,7 +730,11 @@ namespace BizHawk.Emulation.Cores.Nintendo.NES
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timer = timer_reload;
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timer = timer_reload;
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Clock();
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Clock();
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}
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}
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}
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//Any time the sample buffer is in an empty state and bytes remaining is not zero, the following occur:
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if (!sample_buffer_filled && sample_length > 0)
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Fetch();
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}
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void Clock()
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void Clock()
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@ -779,10 +783,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.NES
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}
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}
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else out_bits_remaining--;
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else out_bits_remaining--;
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//Any time the sample buffer is in an empty state and bytes remaining is not zero, the following occur:
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if (!sample_buffer_filled && sample_length > 0)
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Fetch();
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}
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}
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public void set_lenctr_en(bool en)
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public void set_lenctr_en(bool en)
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@ -801,11 +802,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.NES
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{
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{
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sample_address = user_address;
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sample_address = user_address;
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sample_length = user_length;
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sample_length = user_length;
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if (out_silence)
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{
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timer = 0;
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out_bits_remaining = 0;
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}
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}
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}
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}
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}
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