-Noted interrupts in the log.
-Added and Interrupted flag to make it so that interrupts only trigger once per falling edge. -For now, interrupts take 28 cycles. -Made it so that the STIC tracks Pending / Total Executed Cycles just like the CPU. -Forwarded the cycles executed in the CPU to the STIC's Execute. -SR1 is now inverted when there are no pending cycles. --If SR1 is high, 14394 cycles are added to the pending cycles. --If SR1 is low, 3791 cycles are added to the pending cycles.
This commit is contained in:
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caed262122
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ca8b778a52
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@ -8,7 +8,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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private const ushort RESET = 0x1000;
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private const ushort RESET = 0x1000;
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private const ushort INTERRUPT = 0x1004;
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private const ushort INTERRUPT = 0x1004;
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private bool FlagS, FlagC, FlagZ, FlagO, FlagI, FlagD, IntRM, BusRq, BusAk, MSync, Interruptible;
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private bool FlagS, FlagC, FlagZ, FlagO, FlagI, FlagD, IntRM, BusRq, BusAk, MSync, Interruptible, Interrupted;
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private ushort[] Register = new ushort[8];
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private ushort[] Register = new ushort[8];
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private ushort RegisterSP { get { return Register[6]; } set { Register[6] = value; } }
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private ushort RegisterSP { get { return Register[6]; } set { Register[6] = value; } }
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private ushort RegisterPC { get { return Register[7]; } set { Register[7] = value; } }
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private ushort RegisterPC { get { return Register[7]; } set { Register[7] = value; } }
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@ -48,16 +48,16 @@ namespace BizHawk.Emulation.CPUs.CP1610
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IntRM = value;
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IntRM = value;
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}
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}
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public int GetPendingCycles()
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{
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return PendingCycles;
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}
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public void SetBusRq(bool value)
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public void SetBusRq(bool value)
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{
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{
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BusRq = value;
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BusRq = value;
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}
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}
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public int GetPendingCycles()
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{
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return PendingCycles;
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}
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public void AddPendingCycles(int cycles)
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public void AddPendingCycles(int cycles)
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{
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{
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PendingCycles += cycles;
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PendingCycles += cycles;
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@ -90,8 +90,26 @@ namespace BizHawk.Emulation.CPUs.CP1610
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Register[mem]++;
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Register[mem]++;
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}
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}
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public void Execute()
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public int Execute()
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{
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{
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/*
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Take an interrupt if the previous instruction was interruptible,
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interrupts are enabled, and IntRM has a falling edge.
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*/
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if (FlagI && Interruptible && !IntRM && !Interrupted)
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{
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if (logging)
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{
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log.WriteLine("------");
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log.WriteLine();
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log.WriteLine("Interrupt");
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}
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Interrupted = true;
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Interruptible = false;
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Indirect_Set(6, 7);
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RegisterPC = INTERRUPT;
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return 28;
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}
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if (logging)
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if (logging)
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{
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{
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int addrToAdvance;
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int addrToAdvance;
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@ -100,16 +118,11 @@ namespace BizHawk.Emulation.CPUs.CP1610
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log.WriteLine(Disassemble(RegisterPC, out addrToAdvance));
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log.WriteLine(Disassemble(RegisterPC, out addrToAdvance));
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log.Flush();
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log.Flush();
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}
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}
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if (FlagI && Interruptible && !IntRM)
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{
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Indirect_Set(6, 7);
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RegisterPC = INTERRUPT;
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}
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byte dest, src, mem;
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byte dest, src, mem;
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ushort dest_value, src_value, mem_read, addr, addr_read, offset;
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ushort dest_value, src_value, mem_read, addr, addr_read, offset;
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int cycles = 0, decle2, decle3, result = 0, ones, carry, status_word, lower, sign, cond, ext;
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int cycles = 0, decle2, decle3, result = 0, ones, carry, status_word, lower, sign, cond, ext;
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bool branch = false;
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bool branch = false;
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bool prev_FlagD = FlagD;
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bool FlagD_prev = FlagD;
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int opcode = ReadMemory(RegisterPC++) & 0x3FF;
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int opcode = ReadMemory(RegisterPC++) & 0x3FF;
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switch (opcode)
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switch (opcode)
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{
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{
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@ -1778,9 +1791,11 @@ namespace BizHawk.Emulation.CPUs.CP1610
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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}
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}
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if (FlagD == prev_FlagD)
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if (FlagD == FlagD_prev)
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FlagD = false;
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FlagD = false;
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PendingCycles -= cycles; TotalExecutedCycles += cycles;
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PendingCycles -= cycles;
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TotalExecutedCycles += cycles;
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return cycles;
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}
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}
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}
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}
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}
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}
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@ -78,11 +78,11 @@ namespace BizHawk.Emulation.Consoles.Intellivision
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public void FrameAdvance(bool render)
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public void FrameAdvance(bool render)
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{
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{
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Cpu.AddPendingCycles(999);
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Cpu.AddPendingCycles(14394 + 3791);
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while (Cpu.GetPendingCycles() > 0)
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while (Cpu.GetPendingCycles() > 0)
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{
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{
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Cpu.Execute();
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int cycles = Cpu.Execute();
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Stic.Execute();
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Stic.Execute(cycles);
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Connect();
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Connect();
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Cpu.LogData();
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Cpu.LogData();
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}
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}
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@ -9,6 +9,9 @@ namespace BizHawk.Emulation.Consoles.Intellivision
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{
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{
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private bool Sr1, Sr2, Sst, Fgbg = false;
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private bool Sr1, Sr2, Sst, Fgbg = false;
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private ushort[] Register = new ushort[64];
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private ushort[] Register = new ushort[64];
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public int TotalExecutedCycles;
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public int PendingCycles;
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public void Reset()
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public void Reset()
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{
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{
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@ -31,6 +34,16 @@ namespace BizHawk.Emulation.Consoles.Intellivision
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Sst = value;
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Sst = value;
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}
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}
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public int GetPendingCycles()
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{
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return PendingCycles;
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}
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public void AddPendingCycles(int cycles)
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{
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PendingCycles += cycles;
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}
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public ushort? ReadSTIC(ushort addr)
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public ushort? ReadSTIC(ushort addr)
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{
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{
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switch (addr & 0xF000)
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switch (addr & 0xF000)
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@ -126,9 +139,18 @@ namespace BizHawk.Emulation.Consoles.Intellivision
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return false;
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return false;
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}
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}
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public void Execute()
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public void Execute(int cycles)
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{
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{
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Sr1 = false;
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if (PendingCycles <= 0)
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{
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Sr1 = !Sr1;
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if (Sr1)
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AddPendingCycles(14394);
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else
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AddPendingCycles(3791);
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}
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PendingCycles -= cycles;
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TotalExecutedCycles += cycles;
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}
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}
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}
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}
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}
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}
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