-Noted interrupts in the log.

-Added and Interrupted flag to make it so that interrupts only trigger once per falling edge.
-For now, interrupts take 28 cycles.
-Made it so that the STIC tracks Pending / Total Executed Cycles just like the CPU.
-Forwarded the cycles executed in the CPU to the STIC's Execute.
-SR1 is now inverted when there are no pending cycles.
--If SR1 is high, 14394 cycles are added to the pending cycles.
--If SR1 is low, 3791 cycles are added to the pending cycles.
This commit is contained in:
brandman211 2012-09-04 06:26:08 +00:00
parent caed262122
commit ca8b778a52
4 changed files with 57 additions and 20 deletions

View File

@ -8,7 +8,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
private const ushort RESET = 0x1000;
private const ushort INTERRUPT = 0x1004;
private bool FlagS, FlagC, FlagZ, FlagO, FlagI, FlagD, IntRM, BusRq, BusAk, MSync, Interruptible;
private bool FlagS, FlagC, FlagZ, FlagO, FlagI, FlagD, IntRM, BusRq, BusAk, MSync, Interruptible, Interrupted;
private ushort[] Register = new ushort[8];
private ushort RegisterSP { get { return Register[6]; } set { Register[6] = value; } }
private ushort RegisterPC { get { return Register[7]; } set { Register[7] = value; } }
@ -48,16 +48,16 @@ namespace BizHawk.Emulation.CPUs.CP1610
IntRM = value;
}
public int GetPendingCycles()
{
return PendingCycles;
}
public void SetBusRq(bool value)
{
BusRq = value;
}
public int GetPendingCycles()
{
return PendingCycles;
}
public void AddPendingCycles(int cycles)
{
PendingCycles += cycles;

View File

@ -90,8 +90,26 @@ namespace BizHawk.Emulation.CPUs.CP1610
Register[mem]++;
}
public void Execute()
public int Execute()
{
/*
Take an interrupt if the previous instruction was interruptible,
interrupts are enabled, and IntRM has a falling edge.
*/
if (FlagI && Interruptible && !IntRM && !Interrupted)
{
if (logging)
{
log.WriteLine("------");
log.WriteLine();
log.WriteLine("Interrupt");
}
Interrupted = true;
Interruptible = false;
Indirect_Set(6, 7);
RegisterPC = INTERRUPT;
return 28;
}
if (logging)
{
int addrToAdvance;
@ -100,16 +118,11 @@ namespace BizHawk.Emulation.CPUs.CP1610
log.WriteLine(Disassemble(RegisterPC, out addrToAdvance));
log.Flush();
}
if (FlagI && Interruptible && !IntRM)
{
Indirect_Set(6, 7);
RegisterPC = INTERRUPT;
}
byte dest, src, mem;
ushort dest_value, src_value, mem_read, addr, addr_read, offset;
int cycles = 0, decle2, decle3, result = 0, ones, carry, status_word, lower, sign, cond, ext;
bool branch = false;
bool prev_FlagD = FlagD;
bool FlagD_prev = FlagD;
int opcode = ReadMemory(RegisterPC++) & 0x3FF;
switch (opcode)
{
@ -1778,9 +1791,11 @@ namespace BizHawk.Emulation.CPUs.CP1610
Interruptible = true;
break;
}
if (FlagD == prev_FlagD)
if (FlagD == FlagD_prev)
FlagD = false;
PendingCycles -= cycles; TotalExecutedCycles += cycles;
PendingCycles -= cycles;
TotalExecutedCycles += cycles;
return cycles;
}
}
}

View File

@ -78,11 +78,11 @@ namespace BizHawk.Emulation.Consoles.Intellivision
public void FrameAdvance(bool render)
{
Cpu.AddPendingCycles(999);
Cpu.AddPendingCycles(14394 + 3791);
while (Cpu.GetPendingCycles() > 0)
{
Cpu.Execute();
Stic.Execute();
int cycles = Cpu.Execute();
Stic.Execute(cycles);
Connect();
Cpu.LogData();
}

View File

@ -9,6 +9,9 @@ namespace BizHawk.Emulation.Consoles.Intellivision
{
private bool Sr1, Sr2, Sst, Fgbg = false;
private ushort[] Register = new ushort[64];
public int TotalExecutedCycles;
public int PendingCycles;
public void Reset()
{
@ -31,6 +34,16 @@ namespace BizHawk.Emulation.Consoles.Intellivision
Sst = value;
}
public int GetPendingCycles()
{
return PendingCycles;
}
public void AddPendingCycles(int cycles)
{
PendingCycles += cycles;
}
public ushort? ReadSTIC(ushort addr)
{
switch (addr & 0xF000)
@ -126,9 +139,18 @@ namespace BizHawk.Emulation.Consoles.Intellivision
return false;
}
public void Execute()
public void Execute(int cycles)
{
Sr1 = false;
if (PendingCycles <= 0)
{
Sr1 = !Sr1;
if (Sr1)
AddPendingCycles(14394);
else
AddPendingCycles(3791);
}
PendingCycles -= cycles;
TotalExecutedCycles += cycles;
}
}
}