GBHawk: Fix start up time of HDMA
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@ -20,12 +20,13 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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public byte OBJ_transfer_byte;
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// HDMA is unique to GBC, do it as part of the PPU tick
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public bool HDMA_can_start;
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public byte HDMA_src_hi;
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public byte HDMA_src_lo;
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public byte HDMA_dest_hi;
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public byte HDMA_dest_lo;
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public int HDMA_tick;
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public byte HDMA_byte;
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public int HDMA_tick;
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// the first read on GBA (and first two on GBC) encounter access glitches if the source address is VRAM
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public byte HDMA_VRAM_access_glitch;
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@ -357,7 +358,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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{
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// only transfer during mode 0, and only 16 bytes at a time
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// cycle > 90 prevents triggering early when turning on LCD (presumably the real event is transition from mode 3 to 0.)
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if (((STAT & 3) == 0) && (LY != last_HBL) && HBL_test && (LY_inc == 1) && (cycle > 90))
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if (((STAT & 3) == 0) && (LY != last_HBL) && HBL_test && (LY_inc == 1) && (cycle > 90) && HDMA_can_start)
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{
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HBL_HDMA_go = true;
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HBL_test = false;
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@ -798,6 +799,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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evaled_sprites = 0;
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window_pre_render = false;
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window_latch = LCDC.Bit(5);
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HDMA_can_start = false;
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total_counter = 0;
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@ -1310,7 +1312,14 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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read_case--;
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break;
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case 18:
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case 19:
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case 20:
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read_case++;
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break;
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case 21:
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// hardware tests indicate that HDMA starts at this point, not immediately after mode 3 ends
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rendering_complete = true;
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HDMA_can_start = true;
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break;
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}
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internal_cycle++;
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@ -1687,6 +1696,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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ser.Sync(nameof(HDMA_tick), ref HDMA_tick);
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ser.Sync(nameof(HDMA_byte), ref HDMA_byte);
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ser.Sync(nameof(HDMA_VRAM_access_glitch), ref HDMA_VRAM_access_glitch);
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ser.Sync(nameof(HDMA_can_start), ref HDMA_can_start);
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ser.Sync(nameof(VRAM_sel), ref VRAM_sel);
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ser.Sync(nameof(BG_V_flip), ref BG_V_flip);
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@ -18,12 +18,13 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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public byte OBJ_transfer_byte;
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// HDMA is unique to GBC, do it as part of the PPU tick
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public bool HDMA_can_start;
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public byte HDMA_src_hi;
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public byte HDMA_src_lo;
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public byte HDMA_dest_hi;
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public byte HDMA_dest_lo;
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public int HDMA_tick;
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public byte HDMA_byte;
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public int HDMA_tick;
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// the first read on GBA (and first two on GBC) encounter access glitches if the source address is VRAM
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public byte HDMA_VRAM_access_glitch;
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@ -349,7 +350,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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{
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// only transfer during mode 0, and only 16 bytes at a time
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// cycle > 90 prevents triggering early when turning on LCD (presumably the real event is transition from mode 3 to 0.)
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if (((STAT & 3) == 0) && (LY != last_HBL) && HBL_test && (LY_inc == 1) && (cycle > 90))
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if (((STAT & 3) == 0) && (LY != last_HBL) && HBL_test && (LY_inc == 1) && (cycle > 90) && HDMA_can_start)
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{
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HBL_HDMA_go = true;
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HBL_test = false;
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@ -789,6 +790,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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evaled_sprites = 0;
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window_pre_render = false;
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window_latch = LCDC.Bit(5);
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HDMA_can_start = false;
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total_counter = 0;
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@ -1235,15 +1237,15 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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OAM_access_write = true;
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VRAM_access_read = true;
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VRAM_access_write = true;
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read_case = 18;
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}
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else
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{
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STAT &= 0xFC;
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STAT |= 0x00;
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if (STAT.Bit(3)) { HBL_INT = true; }
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// the CPU has to be able to see the transition from mode 3 to mode 0 to start HDMA
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}
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}
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break;
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@ -1266,7 +1268,14 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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read_case--;
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break;
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case 18:
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case 19:
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case 20:
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read_case++;
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break;
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case 21:
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// hardware tests indicate that HDMA starts at this point, not immediately after mode 3 ends
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rendering_complete = true;
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HDMA_can_start = true;
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break;
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}
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internal_cycle++;
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@ -1618,6 +1627,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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ser.Sync(nameof(HDMA_tick), ref HDMA_tick);
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ser.Sync(nameof(HDMA_byte), ref HDMA_byte);
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ser.Sync(nameof(HDMA_VRAM_access_glitch), ref HDMA_VRAM_access_glitch);
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ser.Sync(nameof(HDMA_can_start), ref HDMA_can_start);
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ser.Sync(nameof(VRAM_sel), ref VRAM_sel);
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ser.Sync(nameof(BG_V_flip), ref BG_V_flip);
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