diff --git a/APU.cs b/APU.cs
new file mode 100644
index 0000000000..97792dba5d
--- /dev/null
+++ b/APU.cs
@@ -0,0 +1,1459 @@
+//TODO - so many integers in the square wave output keep us from exactly unbiasing the waveform. also other waves probably. consider improving the unbiasing.
+//ALSO - consider whether we should even be doing it: the nonlinear-mixing behaviour probably depends on those biases being there. 
+//if we have a better high-pass filter somewhere then we might could cope with the weird biases 
+//(mix higher integer precision with the non-linear mixer and then highpass filter befoure outputting s16s)
+
+//http://wiki.nesdev.com/w/index.php/APU_Mixer_Emulation
+//http://wiki.nesdev.com/w/index.php/APU
+//http://wiki.nesdev.com/w/index.php/APU_Pulse
+//sequencer ref: http://wiki.nesdev.com/w/index.php/APU_Frame_Counter
+
+//TODO - refactor length counter to be separate component
+
+using System;
+using System.Collections.Generic;
+
+using BizHawk.Common;
+using BizHawk.Common.NumberExtensions;
+
+namespace BizHawk.Emulation.Cores.Nintendo.NES
+{
+	public sealed class APU
+	{
+		public static bool CFG_DECLICK = true;
+
+		public int Square1V = 376;
+		public int Square2V = 376;
+		public int TriangleV = 426;
+		public int NoiseV = 247;
+		public int DMCV = 167;
+
+		public int dmc_dma_countdown = -1;
+		public bool call_from_write;
+
+		public bool recalculate = false;
+
+		NES nes;
+		public APU(NES nes, APU old, bool pal)
+		{
+			this.nes = nes;
+			dmc = new DMCUnit(this, pal);
+			noise = new NoiseUnit(this, pal);
+			triangle = new TriangleUnit(this);
+			pulse[0] = new PulseUnit(this, 0);
+			pulse[1] = new PulseUnit(this, 1);
+			if (old != null)
+			{
+				Square1V = old.Square1V;
+				Square2V = old.Square2V;
+				TriangleV = old.TriangleV;
+				NoiseV = old.NoiseV;
+				DMCV = old.DMCV;
+			}
+		}
+
+		static int[] DMC_RATE_NTSC = { 428, 380, 340, 320, 286, 254, 226, 214, 190, 160, 142, 128, 106, 84, 72, 54 };
+		static int[] DMC_RATE_PAL = { 398, 354, 316, 298, 276, 236, 210, 198, 176, 148, 132, 118, 98, 78, 66, 50 };
+		static int[] LENGTH_TABLE = { 10, 254, 20, 2, 40, 4, 80, 6, 160, 8, 60, 10, 14, 12, 26, 14, 12, 16, 24, 18, 48, 20, 96, 22, 192, 24, 72, 26, 16, 28, 32, 30 };
+		static byte[,] PULSE_DUTY = {
+			{0,1,0,0,0,0,0,0}, //(12.5%)
+			{0,1,1,0,0,0,0,0}, //(25%)
+			{0,1,1,1,1,0,0,0}, //(50%)
+			{1,0,0,1,1,1,1,1}, //(25% negated (75%))
+		};
+		static byte[] TRIANGLE_TABLE =
+		{
+			15, 14, 13, 12, 11, 10,  9,  8,  7,  6,  5,  4,  3,  2,  1,  0,
+ 			0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15
+		};
+		static int[] NOISE_TABLE_NTSC =
+		{
+			4, 8, 16, 32, 64, 96, 128, 160, 202, 254, 380, 508, 762, 1016, 2034, 4068
+		};
+		static int[] NOISE_TABLE_PAL =
+		{
+			4, 7, 14, 30, 60, 88, 118, 148, 188, 236, 354, 472, 708,  944, 1890, 3778
+		};
+
+
+		public sealed class PulseUnit
+		{
+			public PulseUnit(APU apu, int unit) { this.unit = unit; this.apu = apu; }
+			public int unit;
+			APU apu;
+
+			//reg0
+			int duty_cnt, env_loop, env_constant, env_cnt_value;
+			public bool len_halt;
+			//reg1
+			int sweep_en, sweep_divider_cnt, sweep_negate, sweep_shiftcount;
+			bool sweep_reload;
+			//reg2/3
+			int len_cnt;
+			public int timer_raw_reload_value, timer_reload_value;
+
+			//misc..
+			int lenctr_en;
+
+			public void SyncState(Serializer ser)
+			{
+				ser.BeginSection("Pulse" + unit);
+				ser.Sync("duty_cnt", ref duty_cnt);
+				ser.Sync("env_loop", ref env_loop);
+				ser.Sync("env_constant", ref env_constant);
+				ser.Sync("env_cnt_value", ref env_cnt_value);
+				ser.Sync("len_halt", ref len_halt);
+
+				ser.Sync("sweep_en", ref sweep_en);
+				ser.Sync("sweep_divider_cnt", ref sweep_divider_cnt);
+				ser.Sync("sweep_negate", ref sweep_negate);
+				ser.Sync("sweep_shiftcount", ref sweep_shiftcount);
+				ser.Sync("sweep_reload", ref sweep_reload);
+
+				ser.Sync("len_cnt", ref len_cnt);
+				ser.Sync("timer_raw_reload_value", ref timer_raw_reload_value);
+				ser.Sync("timer_reload_value", ref timer_reload_value);
+
+				ser.Sync("lenctr_en", ref lenctr_en);
+
+				ser.Sync("swp_divider_counter", ref swp_divider_counter);
+				ser.Sync("swp_silence", ref swp_silence);
+				ser.Sync("duty_step", ref duty_step);
+				ser.Sync("timer_counter", ref timer_counter);
+				ser.Sync("sample", ref sample);
+				ser.Sync("duty_value", ref duty_value);
+
+				ser.Sync("env_start_flag", ref env_start_flag);
+				ser.Sync("env_divider", ref env_divider);
+				ser.Sync("env_counter", ref env_counter);
+				ser.Sync("env_output", ref env_output);
+				ser.EndSection();
+			}
+
+			public bool IsLenCntNonZero() { return len_cnt > 0; }
+
+			public void WriteReg(int addr, byte val)
+			{
+				//Console.WriteLine("write pulse {0:X} {1:X}", addr, val);
+				switch (addr)
+				{
+					case 0:
+						env_cnt_value = val & 0xF;
+						env_constant = (val >> 4) & 1;
+						env_loop = (val >> 5) & 1;
+						duty_cnt = (val >> 6) & 3;
+						break;
+					case 1:
+						sweep_shiftcount = val & 7;
+						sweep_negate = (val >> 3) & 1;
+						sweep_divider_cnt = (val >> 4) & 7;
+						sweep_en = (val >> 7) & 1;
+						sweep_reload = true;
+						break;
+					case 2:
+						timer_reload_value = (timer_reload_value & 0x700) | val;
+						timer_raw_reload_value = timer_reload_value * 2 + 2;
+						//if (unit == 1) Console.WriteLine("{0} timer_reload_value: {1}", unit, timer_reload_value);
+						break;
+					case 3:
+						if (apu.len_clock_active)
+						{
+							if (len_cnt==0)
+							{
+								len_cnt = LENGTH_TABLE[(val >> 3) & 0x1F]+1;
+							}						
+						} else
+						{
+							len_cnt = LENGTH_TABLE[(val >> 3) & 0x1F];
+						}
+
+						timer_reload_value = (timer_reload_value & 0xFF) | ((val & 0x07) << 8);
+						timer_raw_reload_value = timer_reload_value * 2 + 2;
+						duty_step = 0; 
+						env_start_flag = 1;
+
+						//allow the lenctr_en to kill the len_cnt
+						set_lenctr_en(lenctr_en);
+
+						//serves as a useful note-on diagnostic
+						//if(unit==1) Console.WriteLine("{0} timer_reload_value: {1}", unit, timer_reload_value);
+						break;
+				}
+			}
+
+			public void set_lenctr_en(int value)
+			{
+				lenctr_en = value;
+				//if the length counter is not enabled, then we must disable the length system in this way
+				if (lenctr_en == 0) len_cnt = 0;
+			}
+
+			//state
+			//why was all of this stuff not in the savestate???????
+			int swp_divider_counter;
+			bool swp_silence;
+			int duty_step;
+			int timer_counter;
+			public int sample;
+			bool duty_value;
+
+			int env_start_flag, env_divider, env_counter;
+			public int env_output;
+
+			public void clock_length_and_sweep()
+			{
+				//this should be optimized to update only when `timer_reload_value` changes
+				int sweep_shifter = timer_reload_value >> sweep_shiftcount;
+				if (sweep_negate == 1)
+					sweep_shifter = -sweep_shifter + unit;
+				sweep_shifter += timer_reload_value;
+
+				//this sweep logic is always enabled:
+				swp_silence = (timer_reload_value < 8 || (sweep_shifter > 0x7FF)); // && sweep_negate == 0));
+
+				//does enable only block the pitch bend? does the clocking proceed?
+				if (sweep_en == 1)
+				{
+					//clock divider
+					if (swp_divider_counter != 0) swp_divider_counter--;
+					if (swp_divider_counter == 0)
+					{
+						swp_divider_counter = sweep_divider_cnt + 1;
+
+						//divider was clocked: process sweep pitch bend
+						if (sweep_shiftcount != 0 && !swp_silence)
+						{
+							timer_reload_value = sweep_shifter;
+							timer_raw_reload_value = (timer_reload_value << 1) + 2;
+						}
+						//TODO - does this change the user's reload value or the latched reload value?
+					}
+
+					//handle divider reload, after clocking happens
+					if (sweep_reload)
+					{
+						swp_divider_counter = sweep_divider_cnt + 1;
+						sweep_reload = false;
+					}
+				}
+
+				//env_loopdoubles as "halt length counter"
+				if ((env_loop == 0 || len_halt) && len_cnt > 0)
+					len_cnt--;
+			}
+
+			public void clock_env()
+			{
+				if (env_start_flag == 1)
+				{
+					env_start_flag = 0;
+					env_divider = env_cnt_value;
+					env_counter = 15;
+				}
+				else
+				{
+					if (env_divider != 0)
+					{
+						env_divider--;
+					} else if (env_divider == 0)
+					{
+						env_divider = env_cnt_value;
+						if (env_counter == 0)
+						{
+							if (env_loop == 1)
+							{
+								env_counter = 15;
+							}
+						}
+						else env_counter--;
+					}
+				}
+			}
+
+			public void Run()
+			{
+				if (env_constant == 1)
+					env_output = env_cnt_value;
+				else env_output = env_counter;
+
+				if (timer_counter > 0) timer_counter--;
+				if (timer_counter == 0 && timer_raw_reload_value != 0)
+				{
+					if (duty_step==7)
+					{
+						duty_step = 0;
+					} else
+					{
+						duty_step++;
+					}
+					duty_value = PULSE_DUTY[duty_cnt, duty_step] == 1;
+					//reload timer
+					timer_counter = timer_raw_reload_value;
+				}
+
+				int newsample;
+
+				if (duty_value) //high state of duty cycle
+				{
+					newsample = env_output;
+					if (swp_silence || len_cnt == 0)
+						newsample = 0; // silenced
+				}
+				else
+					newsample = 0; //duty cycle is 0, silenced.
+
+				//newsample -= env_output >> 1; //unbias
+				if (newsample != sample)
+				{
+					apu.recalculate = true;
+					sample = newsample;
+				}
+			}
+
+			public bool Debug_IsSilenced
+			{
+				get
+				{
+					if (swp_silence || len_cnt == 0)
+						return true;
+					else return false;
+				}
+			}
+
+			public int Debug_DutyType
+			{
+				get
+				{
+					return duty_cnt;
+				}
+			}
+
+			public int Debug_Volume
+			{
+				get
+				{
+					return env_output;
+				}
+			}
+		}
+
+		public sealed class NoiseUnit
+		{
+			APU apu;
+
+			//reg0 (sweep)
+			int env_cnt_value, env_loop, env_constant;
+			public bool len_halt;
+
+			//reg2 (mode and period)
+			int mode_cnt, period_cnt;
+
+			//reg3 (length counter and envelop trigger)
+			int len_cnt;
+
+			//set from apu:
+			int lenctr_en;
+
+			//state
+			int shift_register = 1;
+			int timer_counter;
+			public int sample;
+			int env_output, env_start_flag, env_divider, env_counter;
+			bool noise_bit = true;
+
+			int[] NOISE_TABLE;
+
+			public NoiseUnit(APU apu, bool pal)
+			{
+				this.apu = apu;
+				NOISE_TABLE = pal ? NOISE_TABLE_PAL : NOISE_TABLE_NTSC;
+			}
+
+			public bool Debug_IsSilenced
+			{
+				get
+				{
+					if (len_cnt == 0) return true;
+					else return false;
+				}
+			}
+
+			public int Debug_Period
+			{
+				get
+				{
+					return period_cnt;
+				}
+			}
+
+			public int Debug_Volume
+			{
+				get
+				{
+					return env_output;
+				}
+			}
+
+			public void SyncState(Serializer ser)
+			{
+				ser.BeginSection("Noise");
+				ser.Sync("env_cnt_value", ref env_cnt_value);
+				ser.Sync("env_loop", ref env_loop);
+				ser.Sync("env_constant", ref env_constant);
+				ser.Sync("mode_cnt", ref mode_cnt);
+				ser.Sync("period_cnt", ref period_cnt);
+
+				ser.Sync("len_halt", ref len_halt);
+
+				//ser.Sync("mode_cnt", ref mode_cnt);
+				//ser.Sync("period_cnt", ref period_cnt);
+
+				ser.Sync("len_cnt", ref len_cnt);
+
+				ser.Sync("lenctr_en", ref lenctr_en);
+
+				ser.Sync("shift_register", ref shift_register);
+				ser.Sync("timer_counter", ref timer_counter);
+				ser.Sync("sample", ref sample);
+
+				ser.Sync("env_output", ref env_output);
+				ser.Sync("env_start_flag", ref env_start_flag);
+				ser.Sync("env_divider", ref env_divider);
+				ser.Sync("env_counter", ref env_counter);
+				ser.Sync("noise_bit", ref noise_bit);
+				ser.EndSection();
+			}
+
+
+			public bool IsLenCntNonZero() { return len_cnt > 0; }
+
+			public void WriteReg(int addr, byte val)
+			{
+				switch (addr)
+				{
+					case 0:
+						env_cnt_value = val & 0xF;
+						env_constant = (val >> 4) & 1;
+						//we want to delay a halt until after a length clock if they happen on the same cycle
+						if (env_loop==0 && ((val >> 5) & 1)==1)
+						{
+							len_halt = true;
+						}
+						env_loop = (val >> 5) & 1;
+						break;
+					case 1:
+						break;
+					case 2:
+						period_cnt = NOISE_TABLE[val & 0xF];
+						mode_cnt = (val >> 7) & 1;
+						//Console.WriteLine("noise period: {0}, vol: {1}", (val & 0xF), env_cnt_value);
+						break;
+					case 3:
+						if (apu.len_clock_active)
+						{
+							if (len_cnt == 0)
+							{
+								len_cnt = LENGTH_TABLE[(val >> 3) & 0x1F] + 1;
+							}
+						}
+						else
+						{
+							len_cnt = LENGTH_TABLE[(val >> 3) & 0x1F];
+						}
+
+						set_lenctr_en(lenctr_en);
+						env_start_flag = 1;
+						break;
+				}
+			}
+
+			public void set_lenctr_en(int value)
+			{
+				lenctr_en = value;
+				//Console.WriteLine("noise lenctr_en: " + lenctr_en);
+				//if the length counter is not enabled, then we must disable the length system in this way
+				if (lenctr_en == 0) len_cnt = 0;
+			}
+
+			public void clock_env()
+			{
+				if (env_start_flag == 1)
+				{
+					env_start_flag = 0;
+					env_divider = (env_cnt_value + 1);
+					env_counter = 15;
+				}
+				else
+				{
+					if (env_divider != 0) env_divider--;
+					if (env_divider == 0)
+					{
+						env_divider = (env_cnt_value + 1);
+						if (env_counter == 0)
+						{
+							if (env_loop == 1)
+							{
+								env_counter = 15;
+							}
+						}
+						else env_counter--;
+					}
+				}
+
+			}
+			public void clock_length_and_sweep()
+			{
+
+				if (len_cnt > 0 && (env_loop == 0 || len_halt))
+					len_cnt--;
+			}
+
+			public void Run()
+			{
+				if (env_constant == 1)
+					env_output = env_cnt_value;
+				else env_output = env_counter;
+
+				if (timer_counter > 0) timer_counter--;
+				if (timer_counter == 0 && period_cnt != 0)
+				{
+					//reload timer
+					timer_counter = period_cnt;
+					int feedback_bit;
+					if (mode_cnt == 1) feedback_bit = (shift_register >> 6) & 1;
+					else feedback_bit = (shift_register >> 1) & 1;
+					int feedback = feedback_bit ^ (shift_register & 1);
+					shift_register >>= 1;
+					shift_register &= ~(1 << 14);
+					shift_register |= (feedback << 14);
+					noise_bit = (shift_register & 1) != 0;
+				}
+
+				int newsample;
+				if (len_cnt == 0) newsample = 0;
+				else if (noise_bit) newsample = env_output; // switched, was 0?
+				else newsample = 0;
+				if (newsample != sample)
+				{
+					apu.recalculate = true;
+					sample = newsample;
+				}
+			}
+		}
+
+		public sealed class TriangleUnit
+		{
+			//reg0
+			int linear_counter_reload, control_flag;
+			//reg1 (n/a)
+			//reg2/3
+			int timer_cnt, halt_flag, len_cnt;
+			public bool halt_2;
+			//misc..
+			int lenctr_en;
+			int linear_counter, timer, timer_cnt_reload;
+			int seq = 15;
+			public int sample;
+
+			APU apu;
+			public TriangleUnit(APU apu) { this.apu = apu; }
+
+			public void SyncState(Serializer ser)
+			{
+				ser.BeginSection("Triangle");
+				ser.Sync("linear_counter_reload", ref linear_counter_reload);
+				ser.Sync("control_flag", ref control_flag);
+				ser.Sync("timer_cnt", ref timer_cnt);
+				ser.Sync("halt_flag", ref halt_flag);
+				ser.Sync("len_cnt", ref len_cnt);
+
+				ser.Sync("lenctr_en", ref lenctr_en);
+				ser.Sync("linear_counter", ref linear_counter);
+				ser.Sync("timer", ref timer);
+				ser.Sync("timer_cnt_reload", ref timer_cnt_reload);
+				ser.Sync("seq", ref seq);
+				ser.Sync("sample", ref sample);
+				ser.EndSection();
+			}
+
+			public bool IsLenCntNonZero() { return len_cnt > 0; }
+
+			public void set_lenctr_en(int value)
+			{
+				lenctr_en = value;
+				//if the length counter is not enabled, then we must disable the length system in this way
+				if (lenctr_en == 0) len_cnt = 0;
+			}
+
+			public void WriteReg(int addr, byte val)
+			{
+				//Console.WriteLine("tri writes addr={0}, val={1:x2}", addr, val);
+				switch (addr)
+				{
+					case 0:
+						linear_counter_reload = (val & 0x7F);
+						control_flag = (val >> 7) & 1;
+						break;
+					case 1: break;
+					case 2:
+						timer_cnt = (timer_cnt & ~0xFF) | val;
+						timer_cnt_reload = timer_cnt + 1;
+						break;
+					case 3:
+						timer_cnt = (timer_cnt & 0xFF) | ((val & 0x7) << 8);
+						timer_cnt_reload = timer_cnt + 1;
+						if (apu.len_clock_active)
+						{
+							if (len_cnt == 0)
+							{
+								len_cnt = LENGTH_TABLE[(val >> 3) & 0x1F] + 1;
+							}
+						}
+						else
+						{
+							len_cnt = LENGTH_TABLE[(val >> 3) & 0x1F];
+						}
+						halt_flag = 1;
+
+						//allow the lenctr_en to kill the len_cnt
+						set_lenctr_en(lenctr_en);
+						break;
+				}
+				//Console.WriteLine("tri timer_reload_value: {0}", timer_cnt_reload);
+			}
+
+			public bool Debug_IsSilenced
+			{
+				get
+				{
+					bool en = len_cnt != 0 && linear_counter != 0;
+					return !en;
+				}
+			}
+
+			public int Debug_PeriodValue
+			{
+				get
+				{
+					return timer_cnt;
+				}
+			}
+
+			public void Run()
+			{
+				//when clocked by timer
+				//seq steps forward
+				//except when linear counter or
+				//length counter is 0
+
+				//dont stop the triangle channel until its level is 0. makes it sound nicer.
+				bool need_declick = (seq != 16 && seq != 15);
+				bool en = len_cnt != 0 && linear_counter != 0 || need_declick;
+
+				//length counter and linear counter 
+				//is clocked in frame counter.
+				if (en)
+				{
+					int newsample;
+					if (timer > 0) timer--;
+					if (timer == 0)
+					{
+						seq = (seq + 1) & 0x1F;
+						timer = timer_cnt_reload;
+					}
+					if (CFG_DECLICK) // this looks ugly...
+						newsample = TRIANGLE_TABLE[(seq + 8) & 0x1F];
+					else
+						newsample = TRIANGLE_TABLE[seq];
+
+					//special hack: frequently, games will use the maximum frequency triangle in order to mute it
+					//apparently this results in the DAC for the triangle wave outputting a steady level at about 7.5
+					//so we'll emulate it at the digital level
+					if (timer_cnt_reload == 1) newsample = 8;
+
+					//newsample -= 8; //unbias
+					if (newsample != sample)
+					{
+						apu.recalculate = true;
+						sample = newsample;
+					}
+				}
+
+			}
+
+
+			public void clock_length_and_sweep()
+			{
+				//env_loopdoubles as "halt length counter"
+				if (len_cnt > 0 && halt_flag == 0)
+					len_cnt--;
+			}
+
+			public void clock_linear_counter()
+			{
+				//	Console.WriteLine("linear_counter: {0}", linear_counter);
+				if (halt_flag == 1)
+				{
+					linear_counter = linear_counter_reload;
+				}
+				else if (linear_counter != 0)
+				{
+					linear_counter--;
+				}
+
+				//declick when the sound begins
+				//if (halt_flag == 1 && control_flag == 0)
+				//{
+				//    seq = 16;
+				//   Console.WriteLine("declicked triangle");
+				//}
+
+				//declick on end of sound
+				//bool en = len_cnt != 0 && linear_counter != 0;
+				//if (!en)
+				//    if (sample < 0) sample++; else if (sample > 0) sample--;
+
+				halt_flag = control_flag;
+			}
+		} //class TriangleUnit
+
+		sealed class DMCUnit
+		{
+			APU apu;
+			int[] DMC_RATE;
+			public DMCUnit(APU apu, bool pal)
+			{
+				this.apu = apu;
+				out_silence = true;
+				DMC_RATE = pal ? DMC_RATE_PAL : DMC_RATE_NTSC;
+				timer_reload = DMC_RATE[0];
+				timer = timer_reload;
+				sample_buffer_filled = false;
+				out_deltacounter = 64;
+				out_bits_remaining = 0;
+			}
+
+			bool irq_enabled;
+			bool loop_flag;
+			int timer_reload;
+
+			//dmc delay per visual 2a03
+			int delay;
+
+			// this timer never stops, ever, so it is convenient to use for even/odd timing used elsewhere
+			public int timer;
+			int user_address;
+			public uint user_length, sample_length;
+			int sample_address, sample_buffer;
+			bool sample_buffer_filled;
+
+			int out_shift, out_bits_remaining, out_deltacounter;
+			bool out_silence;
+
+			public int sample { get { return out_deltacounter /* - 64*/; } }
+
+			public void SyncState(Serializer ser)
+			{
+				ser.BeginSection("DMC");
+				ser.Sync("irq_enabled", ref irq_enabled);
+				ser.Sync("loop_flag", ref loop_flag);
+				ser.Sync("timer_reload", ref timer_reload);
+
+				ser.Sync("timer", ref timer);
+				ser.Sync("user_address", ref user_address);
+				ser.Sync("user_length", ref user_length);
+
+				ser.Sync("sample_address", ref sample_address);
+				ser.Sync("sample_length", ref sample_length);
+				ser.Sync("sample_buffer", ref sample_buffer);
+				ser.Sync("sample_buffer_filled", ref sample_buffer_filled);
+
+				ser.Sync("out_shift", ref out_shift);
+				ser.Sync("out_bits_remaining", ref out_bits_remaining);
+				ser.Sync("out_deltacounter", ref out_deltacounter);
+				ser.Sync("out_silence", ref out_silence);
+
+				ser.Sync("dmc_call_delay", ref delay);
+
+				//int sample = 0; //junk
+				//ser.Sync("sample", ref sample);
+				ser.EndSection();
+			}
+
+			public void Run()
+			{
+				if (timer > 0) timer--;
+				if (timer == 0)
+				{
+					timer = timer_reload;
+					Clock();
+				}
+
+				//Any time the sample buffer is in an empty state and bytes remaining is not zero, the following occur: 
+				// also note that the halt for DMC DMA occurs on APU cycles only (hence the timer check)
+				
+				
+				
+				if (!sample_buffer_filled && sample_length > 0  && apu.dmc_dma_countdown == -1 && delay==0)
+				{
+					// calls from write take one less cycle, but start on a write instead of a read
+					if (!apu.call_from_write)
+					{
+						if (timer%2==1)
+						{
+							delay = 3;
+						} else
+						{
+							delay = 2;
+						}
+					} else
+					{
+						if (timer % 2 == 1)
+						{
+							delay = 2;
+						}
+						else
+						{
+							delay = 3;
+						}
+					}					
+				}
+
+				// I did some tests in Visual 2A03 and there seems to be some delay betwen when a DMC is first needed and when the 
+				// process to execute the DMA starts. The details are not currently known, but it seems to be a 2 cycle delay
+				if (delay != 0)
+				{
+					delay--;
+					if (delay == 0)
+					{
+						if (!apu.call_from_write)
+						{
+							apu.dmc_dma_countdown = 4;
+						}
+						else
+						{
+
+							apu.dmc_dma_countdown = 3;
+							apu.call_from_write = false;
+						}
+					}
+
+				}
+			}
+
+
+			void Clock()
+			{
+				//If the silence flag is clear, bit 0 of the shift register is applied to the counter as follows: 
+				//if bit 0 is clear and the delta-counter is greater than 1, the counter is decremented by 2; 
+				//otherwise, if bit 0 is set and the delta-counter is less than 126, the counter is incremented by 2
+				if (!out_silence)
+				{
+					//apply current sample bit to delta counter
+					if (out_shift.Bit(0))
+					{
+						if (out_deltacounter < 126)
+							out_deltacounter += 2;
+					}
+					else
+					{
+						if (out_deltacounter > 1)
+							out_deltacounter -= 2;
+					}
+					//apu.nes.LogLine("dmc out sample: {0}", out_deltacounter);
+					apu.recalculate = true;
+				}
+
+				//The right shift register is clocked. 
+				out_shift >>= 1;
+
+				//The bits-remaining counter is decremented. If it becomes zero, a new cycle is started. 
+				if (out_bits_remaining == 0)
+				{
+					//The bits-remaining counter is loaded with 8. 
+					out_bits_remaining = 7;
+					//If the sample buffer is empty then the silence flag is set
+					if (!sample_buffer_filled)
+					{
+						out_silence = true;
+						//out_deltacounter = 64; //gonna go out on a limb here and guess this gets reset. could make some things pop, though, if they dont end at 0.
+					}
+					else
+					//otherwise, the silence flag is cleared and the sample buffer is emptied into the shift register. 
+					{
+						out_silence = false;
+						out_shift = sample_buffer;
+						sample_buffer_filled = false;
+					}
+				}
+				else out_bits_remaining--;
+
+
+			}
+
+			public void set_lenctr_en(bool en)
+			{
+				if (!en)
+				{
+					//If the DMC bit is clear, the DMC bytes remaining will be set to 0 
+					sample_length = 0;
+					//and the DMC will silence when it empties.
+					//  (what does this mean? does out_deltacounter get reset to 0? maybe just that the out_silence flag gets set, but this is natural)
+				}
+				else
+				{
+					//only start playback if playback is stopped
+					//Console.Write(sample_length); Console.Write(" "); Console.Write(sample_buffer_filled); Console.Write(" "); Console.Write(apu.dmc_irq); Console.Write("\n");
+					if (sample_length == 0)
+					{
+						sample_address = user_address;
+						sample_length = user_length;
+						
+					}
+					if (!sample_buffer_filled)
+					{
+						// apparently the dmc is different if called from a cpu write, let's try
+						apu.call_from_write = true;
+					}
+				}
+
+				//irq is acknowledged or sure to be clear, in either case
+				apu.dmc_irq = false;
+				apu.SyncIRQ();
+			}
+
+			public bool IsLenCntNonZero()
+			{
+				return sample_length != 0;
+			}
+
+			public void WriteReg(int addr, byte val)
+			{
+				//Console.WriteLine("DMC writes addr={0}, val={1:x2}", addr, val);
+				switch (addr)
+				{
+					case 0:
+						irq_enabled = val.Bit(7);
+						loop_flag = val.Bit(6);
+						timer_reload = DMC_RATE[val & 0xF];
+						if (!irq_enabled) apu.dmc_irq = false;
+						//apu.dmc_irq = false;
+						apu.SyncIRQ();
+						break;
+					case 1:
+						out_deltacounter = val & 0x7F;
+						//apu.nes.LogLine("~~ out_deltacounter set to {0}", out_deltacounter);
+						apu.recalculate = true;
+						break;
+					case 2:
+						user_address = 0xC000 | (val << 6);
+						break;
+					case 3:
+						user_length = ((uint)val << 4) + 1;
+						break;
+				}
+			}
+
+			public void Fetch()
+			{
+				if (sample_length != 0)
+				{
+					sample_buffer = apu.nes.ReadMemory((ushort)sample_address);
+					sample_buffer_filled = true;
+					sample_address = (ushort)(sample_address + 1);
+					//Console.WriteLine(sample_length);
+					//Console.WriteLine(user_length);
+					sample_length--;
+					//apu.pending_length_change = 1;
+				}
+				if (sample_length == 0)
+				{
+					if (loop_flag)
+					{
+						sample_address = user_address;
+						sample_length = user_length;
+					}
+					else if (irq_enabled) apu.dmc_irq = true;
+				}
+				//Console.WriteLine("fetching dmc byte: {0:X2}", sample_buffer);
+			}
+		}
+
+		public void SyncState(Serializer ser)
+		{
+			ser.Sync("irq_pending", ref irq_pending);
+			ser.Sync("dmc_irq", ref dmc_irq);
+			ser.Sync("pending_reg", ref pending_reg);
+			ser.Sync("pending_val", ref pending_val);
+
+			ser.Sync("sequencer_counter", ref sequencer_counter);
+			ser.Sync("sequencer_step", ref sequencer_step);
+			ser.Sync("sequencer_mode", ref sequencer_mode);
+			ser.Sync("sequencer_irq_inhibit;", ref sequencer_irq_inhibit);
+			ser.Sync("sequencer_irq", ref sequencer_irq);
+			ser.Sync("sequence_reset_pending", ref sequence_reset_pending);
+			ser.Sync("sequencer_irq_clear_pending", ref sequencer_irq_clear_pending);
+			ser.Sync("sequencer_irq_assert", ref sequencer_irq_assert);
+
+			ser.Sync("dmc_dma_countdown", ref dmc_dma_countdown);
+			ser.Sync("sample_length_delay", ref pending_length_change);
+			ser.Sync("dmc_called_from_write", ref call_from_write);
+			ser.Sync("sequencer_tick_delay", ref seq_tick);
+			ser.Sync("seq_val_to_apply", ref seq_val);
+			ser.Sync("sequencer_irq_flag", ref sequencer_irq_flag);
+			ser.Sync("len_clock_active", ref len_clock_active);
+
+
+			pulse[0].SyncState(ser);
+			pulse[1].SyncState(ser);
+			triangle.SyncState(ser);
+			noise.SyncState(ser);
+			dmc.SyncState(ser);
+			SyncIRQ();
+		}
+
+		public PulseUnit[] pulse = new PulseUnit[2];
+		public TriangleUnit triangle;
+		public NoiseUnit noise;
+		DMCUnit dmc;
+
+		bool irq_pending;
+		bool dmc_irq;
+		int pending_reg = -1;
+		byte pending_val = 0;
+		public int seq_tick;
+		public byte seq_val;
+		public bool len_clock_active;
+
+		int sequencer_counter, sequencer_step, sequencer_mode, sequencer_irq_inhibit, sequencer_irq_assert;
+		bool sequencer_irq, sequence_reset_pending, sequencer_irq_clear_pending, sequencer_irq_flag;
+
+		public void RunDMCFetch()
+		{
+			dmc.Fetch();
+		}
+
+		void sequencer_reset()
+		{
+			sequencer_counter = 0;
+
+			if (sequencer_mode == 1)
+			{
+				sequencer_step = 0;
+				QuarterFrame();
+				HalfFrame();
+			}
+			else
+				sequencer_step = 0;
+		}
+
+		//these figures are not valid for PAL. they must be recalculated with nintendulator's values above
+		static int[][] sequencer_lut = new int[][]{
+			new int[]{7457,14913,22371,29830},
+			new int[]{7457,14913,22371,29830,37282}
+		};
+
+		
+		void sequencer_write_tick(byte val)
+		{
+			if (seq_tick>0)
+			{
+				seq_tick--;
+				if (seq_tick==0)
+				{
+					sequencer_mode = (val >> 7) & 1;
+					//Console.WriteLine("apu 4017 = {0:X2}", val);
+					sequencer_irq_inhibit = (val >> 6) & 1;
+					if (sequencer_irq_inhibit == 1)
+					{
+						sequencer_irq_flag = false;
+					}
+					sequencer_reset();
+				}
+			}
+		}
+
+		void sequencer_tick()
+		{
+			sequencer_counter++;
+			if (sequencer_mode==0 && sequencer_counter==29829)
+			{
+				if (sequencer_irq_inhibit==0)
+				{
+					sequencer_irq_assert = 2;
+					sequencer_irq_flag = true;
+				}
+					
+				HalfFrame();
+			}
+			if (sequencer_mode == 0 && sequencer_counter == 29828 && sequencer_irq_inhibit == 0)
+			{
+				//sequencer_irq_assert = 2;
+				sequencer_irq_flag = true;
+			}
+			if (sequencer_mode == 1 && sequencer_counter == 37281)
+			{
+				HalfFrame();
+			}
+			if (sequencer_lut[sequencer_mode][sequencer_step] != sequencer_counter)
+				return;
+			sequencer_check();
+		}
+
+		public void SyncIRQ()
+		{
+			irq_pending = sequencer_irq | dmc_irq;
+		}
+
+		void sequencer_check()
+		{
+			//Console.WriteLine("sequencer mode {0} step {1}", sequencer_mode, sequencer_step);
+			bool quarter, half, reset;
+			switch (sequencer_mode)
+			{
+				case 0: //4-step
+					quarter = true;
+					half = sequencer_step == 1;
+					reset = sequencer_step == 3;
+					if (reset && sequencer_irq_inhibit == 0)
+					{
+						//Console.WriteLine("{0} {1,5} set irq_assert", nes.Frame, sequencer_counter);
+						//sequencer_irq_assert = 2;
+						sequencer_irq_flag = true;
+					}
+					break;
+
+				case 1: //5-step
+					quarter = sequencer_step != 3;
+					half = sequencer_step == 1;
+					reset = sequencer_step == 4;
+					break;
+
+				default:
+					throw new InvalidOperationException();
+			}
+
+			if (reset)
+			{
+				sequencer_counter = 0;
+				sequencer_step = 0;
+			}
+			else sequencer_step++;
+
+			if (quarter) QuarterFrame();
+			if (half) HalfFrame();
+		}
+
+		void HalfFrame()
+		{
+			pulse[0].clock_length_and_sweep();
+			pulse[1].clock_length_and_sweep();
+			triangle.clock_length_and_sweep();
+			noise.clock_length_and_sweep();
+		}
+
+		void QuarterFrame()
+		{
+			pulse[0].clock_env();
+			pulse[1].clock_env();
+			triangle.clock_linear_counter();
+			noise.clock_env();
+		}
+
+		public void NESSoftReset()
+		{
+			//need to study what happens to apu and stuff..
+			sequencer_irq = false;
+			sequencer_irq_flag = false;
+			_WriteReg(0x4015, 0);
+
+			//for 4017, its as if the last value written gets rewritten
+			sequencer_mode = (seq_val >> 7) & 1;
+			sequencer_irq_inhibit = (seq_val >> 6) & 1;
+			if (sequencer_irq_inhibit == 1)
+			{
+				sequencer_irq_flag = false;
+			}
+			sequencer_counter = 0;
+			sequencer_step = 0;
+
+		}
+
+		public void NESHardReset()
+		{
+			// "at power on it is as if $00 was written to $4017 9-12 cycles before the reset vector"
+			// that translates to a starting value for the counter of 6
+
+			sequencer_counter = 6;
+
+		}
+
+		public void WriteReg(int addr, byte val)
+		{
+			pending_reg = addr;
+			pending_val = val;
+		}
+
+		void _WriteReg(int addr, byte val)
+		{
+			//Console.WriteLine("{0:X4} = {1:X2}", addr, val);
+			int index = addr - 0x4000;
+			int reg = index & 3;
+			int channel = index >> 2;
+			switch (channel)
+			{
+				case 0:
+					pulse[0].WriteReg(reg, val);
+					break;
+				case 1:
+					pulse[1].WriteReg(reg, val);
+					break;
+				case 2:
+					triangle.WriteReg(reg, val);
+					break;
+				case 3:
+					noise.WriteReg(reg, val);
+					break;
+				case 4:
+					dmc.WriteReg(reg, val);
+					break;
+				case 5:
+					if (addr == 0x4015)
+					{
+						pulse[0].set_lenctr_en(val & 1);
+						pulse[1].set_lenctr_en((val >> 1) & 1);
+						triangle.set_lenctr_en((val >> 2) & 1);
+						noise.set_lenctr_en((val >> 3) & 1);
+						dmc.set_lenctr_en(val.Bit(4));
+
+					}
+					else if (addr == 0x4017)
+					{
+						if (dmc.timer%2==0)
+						{
+							seq_tick = 3;
+
+						} else
+						{
+							seq_tick = 4;
+						}
+						
+						seq_val = val;
+					}
+					break;
+			}
+		}
+
+
+		public byte PeekReg(int addr)
+		{
+			switch (addr)
+			{
+				case 0x4015:
+					{
+						//notice a missing bit here. should properly emulate with empty / Data bus
+						//if an interrupt flag was set at the same moment of the read, it will read back as 1 but it will not be cleared. 
+						int dmc_nonzero = dmc.IsLenCntNonZero() ? 1 : 0;
+						int noise_nonzero = noise.IsLenCntNonZero() ? 1 : 0;
+						int tri_nonzero = triangle.IsLenCntNonZero() ? 1 : 0;
+						int pulse1_nonzero = pulse[1].IsLenCntNonZero() ? 1 : 0;
+						int pulse0_nonzero = pulse[0].IsLenCntNonZero() ? 1 : 0;
+						int ret = ((dmc_irq ? 1 : 0) << 7) | ((sequencer_irq_flag ? 1 : 0) << 6) | (dmc_nonzero << 4) | (noise_nonzero << 3) | (tri_nonzero << 2) | (pulse1_nonzero << 1) | (pulse0_nonzero);
+						return (byte)ret;
+					}
+				default:
+					//don't return 0xFF here or SMB will break
+					return 0x00;
+			}
+		}
+
+		public byte ReadReg(int addr)
+		{
+			switch (addr)
+			{
+				case 0x4015:
+					{
+						byte ret = PeekReg(0x4015);
+						//Console.WriteLine("{0} {1,5} $4015 clear irq, was at {2}", nes.Frame, sequencer_counter, sequencer_irq);
+						sequencer_irq_flag = false;
+						SyncIRQ();
+						return ret;
+					}
+				default:
+					//don't return 0xFF here or SMB will break
+					return 0x00;
+			}
+		}
+
+		public Action DebugCallback;
+		public int DebugCallbackDivider;
+		public int DebugCallbackTimer;
+
+		int pending_length_change;
+
+
+		public void RunOne(bool read)
+		{
+			if (read)
+			{
+				pulse[0].Run();
+				pulse[1].Run();
+				triangle.Run();
+				noise.Run();
+				dmc.Run();
+
+				pulse[0].len_halt = false;
+				pulse[1].len_halt = false;
+				noise.len_halt = false;
+
+			}
+			else
+			{
+				if (pending_length_change>0)
+				{
+					pending_length_change--;
+					if (pending_length_change==0)
+					{
+						dmc.sample_length--;
+					}
+				}
+
+				EmitSample();
+
+				//we need to predict if there will be a length clock here, because the sequencer ticks last, but the 
+				// timer reload shouldn't happen if length clock and write happen simultaneously
+				// I'm not sure if we can avoid this by simply processing the sequencer first
+				// but at the moment that would break everything, so this is good enough for now
+				if (sequencer_counter==14912 || 
+					(sequencer_counter == 29828 && sequencer_mode==0) ||
+					(sequencer_counter == 37280 && sequencer_mode == 1))
+				{
+					len_clock_active = true;
+				}
+
+				//handle writes
+				//notes: this set up is a bit convoluded at the moment, mainly because APU behaviour is not entirely understood
+				//in partiuclar, there are several clock pulses affecting the APU, and when new written are latched is not known in detail
+				//the current code simply matches known behaviour
+				if (pending_reg != -1)
+				{
+					if (pending_reg == 0x4015 || pending_reg == 0x4017 || pending_reg==0x4003 || pending_reg==0x4007)
+					{
+						_WriteReg(pending_reg, pending_val);
+						pending_reg = -1;
+					}
+					else if (dmc.timer%2==0)
+					{
+						_WriteReg(pending_reg, pending_val);
+						pending_reg = -1;
+					}
+				}
+
+				len_clock_active = false;
+
+				sequencer_tick();
+				sequencer_write_tick(seq_val);
+				
+				if (sequencer_irq_assert>0) {
+					sequencer_irq_assert--;
+					if (sequencer_irq_assert==0)
+					{
+						sequencer_irq = true;
+					}					
+				}				
+
+				SyncIRQ();
+				nes.irq_apu = irq_pending;
+				
+				//since the units run concurrently, the APU frame sequencer is ran last because
+				//it can change the ouput values of the pulse/triangle channels
+				//we want the changes to affect it on the *next* cycle.
+
+				if (sequencer_irq_flag == false)
+					sequencer_irq = false;
+
+				if (DebugCallbackDivider != 0)
+				{
+					if (DebugCallbackTimer == 0)
+					{
+						if (DebugCallback != null)
+							DebugCallback();
+						DebugCallbackTimer = DebugCallbackDivider;
+					}
+					else DebugCallbackTimer--;
+
+				}
+			}
+
+		}
+
+		public struct Delta
+		{
+			public uint time;
+			public int value;
+			public Delta(uint time, int value)
+			{
+				this.time = time;
+				this.value = value;
+			}
+		}
+		public List<Delta> dlist = new List<Delta>();
+
+		/// <summary>only call in board.ClockCPU()</summary>
+		/// <param name="value"></param>
+		public void ExternalQueue(int value)
+		{
+			// sampleclock is incremented right before board.ClockCPU()
+			dlist.Add(new Delta(sampleclock - 1, value));
+		}
+
+		public uint sampleclock = 0;
+
+		int oldmix = 0;
+
+
+		void EmitSample()
+		{
+			if (recalculate)
+			{
+				recalculate = false;
+
+				int s_pulse0 = pulse[0].sample;
+				int s_pulse1 = pulse[1].sample;
+				int s_tri = triangle.sample;
+				int s_noise = noise.sample;
+				int s_dmc = dmc.sample;
+				//int s_ext = 0; //gamepak
+
+				/*
+				if (!EnableSquare1) s_pulse0 = 0;
+				if (!EnableSquare2) s_pulse1 = 0;
+				if (!EnableTriangle) s_tri = 0;
+				if (!EnableNoise) s_noise = 0;
+				if (!EnableDMC) s_dmc = 0;
+				*/
+
+				//more properly correct
+				float pulse_out, tnd_out;
+				if (s_pulse0 == 0 && s_pulse1 == 0)
+				  pulse_out = 0;
+				else pulse_out = 95.88f / ((8128.0f / (s_pulse0 + s_pulse1)) + 100.0f);
+				if (s_tri == 0 && s_noise == 0 && s_dmc == 0)
+				  tnd_out = 0;
+				else tnd_out = 159.79f / (1 / ((s_tri / 8227.0f) + (s_noise / 12241.0f /* * NOISEADJUST*/) + (s_dmc / 22638.0f)) + 100);
+				float output = pulse_out + tnd_out;
+				//output = output * 2 - 1;
+				//this needs to leave enough headroom for straying DC bias due to the DMC unit getting stuck outputs. smb3 is bad about that. 
+				int mix = (int)(20000 * output);
+
+
+				dlist.Add(new Delta(sampleclock, mix - oldmix));
+				oldmix = mix;
+			}
+			
+
+
+			sampleclock++;
+		}
+	}
+}
\ No newline at end of file
diff --git a/PPU.regs.cs b/PPU.regs.cs
new file mode 100644
index 0000000000..53bc2abd6a
--- /dev/null
+++ b/PPU.regs.cs
@@ -0,0 +1,755 @@
+//TODO - better sprite hit handling (be sure to test world runner)
+//http://nesdev.parodius.com/bbs/viewtopic.php?t=626
+
+//TODO - Reg2002_objoverflow is not working in the dummy reads test.. why are we setting it when nintendulator doesnt>
+
+//blargg: Reading from $2007 when the VRAM address is $3fxx will fill the internal read buffer with the contents at VRAM address $3fxx, in addition to reading the palette RAM. 
+
+				//static const byte powerUpPalette[] =
+				//{
+				//    0x3F,0x01,0x00,0x01, 0x00,0x02,0x02,0x0D, 0x08,0x10,0x08,0x24, 0x00,0x00,0x04,0x2C,
+				//    0x09,0x01,0x34,0x03, 0x00,0x04,0x00,0x14, 0x08,0x3A,0x00,0x02, 0x00,0x20,0x2C,0x08
+				//};
+
+using System;
+using BizHawk.Common;
+
+
+namespace BizHawk.Emulation.Cores.Nintendo.NES
+{
+	sealed partial class PPU
+	{
+		public sealed class Reg_2001
+		{
+			public Bit color_disable; //Color disable (0: normal color; 1: AND all palette entries with 110000, effectively producing a monochrome display)
+			public Bit show_bg_leftmost; //Show leftmost 8 pixels of background
+			public Bit show_obj_leftmost; //Show sprites in leftmost 8 pixels
+			public Bit show_bg; //Show background
+			public Bit show_obj; //Show sprites
+			public Bit intense_green; //Intensify greens (and darken other colors)
+			public Bit intense_blue; //Intensify blues (and darken other colors)
+			public Bit intense_red; //Intensify reds (and darken other colors)
+
+			public int intensity_lsl_6; //an optimization..
+
+			public bool PPUON { get { return show_bg || show_obj; } }
+
+			public byte Value
+			{
+				get
+				{
+					return (byte)(color_disable | (show_bg_leftmost << 1) | (show_obj_leftmost << 2) | (show_bg << 3) | (show_obj << 4) | (intense_green << 5) | (intense_blue << 6) | (intense_red << 7));
+				}
+				set
+				{
+					color_disable = (value & 1);
+					show_bg_leftmost = (value >> 1) & 1;
+					show_obj_leftmost = (value >> 2) & 1;
+					show_bg = (value >> 3) & 1;
+					show_obj = (value >> 4) & 1;
+					intense_green = (value >> 5) & 1;
+					intense_blue = (value >> 6) & 1;
+					intense_red = (value >> 7) & 1;
+					intensity_lsl_6 = ((value >> 5) & 7)<<6;
+				}
+			}
+		}
+
+		// this byte is used to simulate open bus reads and writes
+		// it should be modified by every read and write to a ppu register
+		public byte ppu_open_bus;
+		public int double_2007_read; // emulates a hardware bug of back to back 2007 reads
+		public int[] ppu_open_bus_decay_timer = new int[8];
+
+		public struct PPUSTATUS
+		{
+			public int sl;
+			public bool rendering { get { return sl >= 0 && sl < 241; } }
+			public int cycle;
+		}
+
+		//uses the internal counters concept at http://nesdev.icequake.net/PPU%20addressing.txt
+		//TODO - this should be turned into a state machine
+		public sealed class PPUREGS
+		{
+			PPU ppu;
+			public PPUREGS(PPU ppu)
+			{
+				this.ppu = ppu;
+				reset();
+			}
+
+			public void SyncState(Serializer ser)
+			{
+				ser.Sync("fv", ref fv);
+				ser.Sync("v", ref v);
+				ser.Sync("h", ref h);
+				ser.Sync("vt", ref vt);
+				ser.Sync("ht", ref ht);
+				ser.Sync("_fv", ref _fv);
+				ser.Sync("_v", ref _v);
+				ser.Sync("_h", ref _h);
+				ser.Sync("_vt", ref _vt);
+				ser.Sync("_ht", ref _ht);
+				ser.Sync("fh", ref fh);
+				ser.Sync("status.cycle", ref status.cycle);
+				int junk = 0;
+				ser.Sync("status.end_cycle", ref junk);
+				ser.Sync("status.sl", ref status.sl);
+			}
+
+			//normal clocked regs. as the game can interfere with these at any time, they need to be savestated
+			public int fv;//3
+			public int v;//1
+			public int h;//1
+			public int vt;//5
+			public int ht;//5
+
+			//temp unlatched regs (need savestating, can be written to at any time)
+			public int _fv, _vt, _v, _h, _ht;
+
+			//other regs that need savestating
+			public int fh;//3 (horz scroll)
+
+			//cached state data. these are always reset at the beginning of a frame and don't need saving
+			//but just to be safe, we're gonna save it
+			public PPUSTATUS status = new PPUSTATUS();
+
+			//public int ComputeIndex()
+			//{
+			//    return fv | (v << 3) | (h << 4) | (vt << 5) | (ht << 10) | (fh << 15);
+			//}
+			//public void DecodeIndex(int index)
+			//{
+			//    fv = index & 7;
+			//    v = (index >> 3) & 1;
+			//    h = (index >> 4) & 1;
+			//    vt = (index >> 5) & 0x1F;
+			//    ht = (index >> 10) & 0x1F;
+			//    fh = (index >> 15) & 7;
+			//}
+
+			//const int tbl_size = 1 << 18;
+			//int[] tbl_increment_hsc = new int[tbl_size];
+			//int[] tbl_increment_vs = new int[tbl_size];
+			//public void BuildTables()
+			//{
+			//    for (int i = 0; i < tbl_size; i++)
+			//    {
+			//        DecodeIndex(i);
+			//        increment_hsc();
+			//        tbl_increment_hsc[i] = ComputeIndex();
+			//        DecodeIndex(i);
+			//        increment_vs();
+			//        tbl_increment_vs[i] = ComputeIndex();
+			//    }
+			//}
+
+			public void reset()
+			{
+				fv = v = h = vt = ht = 0;
+				fh = 0;
+				_fv = _v = _h = _vt = _ht = 0;
+				status.cycle = 0;
+				status.sl = 241;
+			}
+
+			public void install_latches()
+			{
+				fv = _fv;
+				v = _v;
+				h = _h;
+				vt = _vt;
+				ht = _ht;
+			}
+
+			public void install_h_latches()
+			{
+				ht = _ht;
+				h = _h;
+			}
+
+			public void clear_latches()
+			{
+				_fv = _v = _h = _vt = _ht = 0;
+				fh = 0;
+			}
+
+			public void increment_hsc()
+			{
+				//The first one, the horizontal scroll counter, consists of 6 bits, and is
+				//made up by daisy-chaining the HT counter to the H counter. The HT counter is
+				//then clocked every 8 pixel dot clocks (or every 8/3 CPU clock cycles).
+				ht++;
+				h += (ht >> 5);
+				ht &= 31;
+				h &= 1;
+			}
+
+			public void increment_vs()
+			{
+				fv++;
+				int fv_overflow = (fv >> 3);
+				vt += fv_overflow;
+				vt &= 31; //fixed tecmo super bowl
+				if (vt == 30 && fv_overflow==1) //caution here (only do it at the exact instant of overflow) fixes p'radikus conflict
+				{
+					v++;
+					vt = 0;
+				}
+				fv &= 7;
+				v &= 1;
+			}
+
+			public int get_ntread()
+			{
+				return 0x2000 | (v << 0xB) | (h << 0xA) | (vt << 5) | ht;
+			}
+
+			public int get_2007access()
+			{
+				return ((fv & 3) << 0xC) | (v << 0xB) | (h << 0xA) | (vt << 5) | ht;
+			}
+
+			//The PPU has an internal 4-position, 2-bit shifter, which it uses for
+			//obtaining the 2-bit palette select data during an attribute table byte
+			//fetch. To represent how this data is shifted in the diagram, letters a..c
+			//are used in the diagram to represent the right-shift position amount to
+			//apply to the data read from the attribute data (a is always 0). This is why
+			//you only see bits 0 and 1 used off the read attribute data in the diagram.
+			public int get_atread()
+			{
+				return 0x2000 | (v << 0xB) | (h << 0xA) | 0x3C0 | ((vt & 0x1C) << 1) | ((ht & 0x1C) >> 2);
+			}
+
+			//address line 3 relates to the pattern table fetch occuring (the PPU always makes them in pairs).
+			public int get_ptread(int par)
+			{
+				int s = ppu.reg_2000.bg_pattern_hi;
+				return (s << 0xC) | (par << 0x4) | fv;
+			}
+
+			public void increment2007(bool rendering, bool by32)
+			{
+				if (rendering)
+				{
+					//don't do this:
+					//if (by32) increment_vs();
+					//else increment_hsc();
+					//do this instead:
+					increment_vs(); //yes, even if we're moving by 32
+					return;
+				}
+
+				//If the VRAM address increment bit (2000.2) is clear (inc. amt. = 1), all the
+				//scroll counters are daisy-chained (in the order of HT, VT, H, V, FV) so that
+				//the carry out of each counter controls the next counter's clock rate. The
+				//result is that all 5 counters function as a single 15-bit one. Any access to
+				//2007 clocks the HT counter here.
+				//
+				//If the VRAM address increment bit is set (inc. amt. = 32), the only
+				//difference is that the HT counter is no longer being clocked, and the VT
+				//counter is now being clocked by access to 2007.
+				if (by32)
+				{
+					vt++;
+				}
+				else
+				{
+					ht++;
+					vt += (ht >> 5) & 1;
+				}
+				h += (vt >> 5);
+				v += (h >> 1);
+				fv += (v >> 1);
+				ht &= 31;
+				vt &= 31;
+				h &= 1;
+				v &= 1;
+				fv &= 7;
+			}
+		};
+
+		public sealed class Reg_2000
+		{
+			PPU ppu;
+			public Reg_2000(PPU ppu)
+			{
+				this.ppu = ppu;
+			}
+			//these bits go straight into PPUR
+			//(00 = $2000; 01 = $2400; 02 = $2800; 03 = $2c00)
+
+			public Bit vram_incr32; //(0: increment by 1, going across; 1: increment by 32, going down)
+			public Bit obj_pattern_hi; //Sprite pattern table address for 8x8 sprites (0: $0000; 1: $1000)
+			public Bit bg_pattern_hi; //Background pattern table address (0: $0000; 1: $1000)
+			public Bit obj_size_16; //Sprite size (0: 8x8 sprites; 1: 8x16 sprites)
+			public Bit ppu_layer; //PPU layer select (should always be 0 in the NES; some Nintendo arcade boards presumably had two PPUs)
+			public Bit vblank_nmi_gen; //Vertical blank NMI generation (0: off; 1: on)
+
+
+			public byte Value
+			{
+				get
+				{
+					return (byte)(ppu.ppur._h | (ppu.ppur._v << 1) | (vram_incr32 << 2) | (obj_pattern_hi << 3) | (bg_pattern_hi << 4) | (obj_size_16 << 5) | (ppu_layer << 6) | (vblank_nmi_gen << 7));
+				}
+				set
+				{
+					ppu.ppur._h = value & 1;
+					ppu.ppur._v = (value >> 1) & 1;
+					vram_incr32 = (value >> 2) & 1;
+					obj_pattern_hi = (value >> 3) & 1;
+					bg_pattern_hi = (value >> 4) & 1;
+					obj_size_16 = (value >> 5) & 1;
+					ppu_layer = (value >> 6) & 1;
+					vblank_nmi_gen = (value >> 7) & 1;
+				}
+			}
+		}
+
+
+		Bit Reg2002_objoverflow;  //Sprite overflow. The PPU can handle only eight sprites on one scanline and sets this bit if it starts drawing sprites.
+		Bit Reg2002_objhit; //Sprite 0 overlap.  Set when a nonzero pixel of sprite 0 is drawn overlapping a nonzero background pixel.  Used for raster timing.
+		Bit Reg2002_vblank_active;  //Vertical blank start (0: has not started; 1: has started)
+		bool Reg2002_vblank_active_pending; //set if Reg2002_vblank_active is pending
+		bool Reg2002_vblank_clear_pending; //ppu's clear of vblank flag is pending
+		public PPUREGS ppur;
+		public Reg_2000 reg_2000;
+		public Reg_2001 reg_2001;
+		byte reg_2003;
+		void regs_reset()
+		{
+			//TODO - would like to reconstitute the entire PPU instead of all this..
+			reg_2000 = new Reg_2000(this);
+			reg_2001 = new Reg_2001();
+			ppur = new PPUREGS(this);
+			Reg2002_objoverflow = false;
+			Reg2002_objhit = false;
+			Reg2002_vblank_active = false;
+			PPUGenLatch = 0;
+			reg_2003 = 0;
+			vtoggle = false;
+			VRAMBuffer = 0;
+		}
+		//---------------------
+
+		//PPU CONTROL (write)
+		void write_2000(byte value)
+		{
+			if (!reg_2000.vblank_nmi_gen & ((value & 0x80) != 0) && (Reg2002_vblank_active) && !Reg2002_vblank_clear_pending)
+			{
+				//if we just unleashed the vblank interrupt then activate it now
+				NMI_PendingInstructions = 2;
+			}
+			reg_2000.Value = value;
+
+
+		}
+		byte read_2000() { return ppu_open_bus; }
+		byte peek_2000() { return ppu_open_bus; }
+
+		//PPU MASK (write)
+		void write_2001(byte value)
+		{
+			//printf("%04x:$%02x, %d\n",A,V,scanline);
+			reg_2001.Value = value;
+		}
+		byte read_2001() {return ppu_open_bus; }
+		byte peek_2001() {return ppu_open_bus; }
+
+		//PPU STATUS (read)
+		void write_2002(byte value) { }
+		byte read_2002()
+		{
+			//once we thought we clear latches here, but that caused midframe glitches.
+			//i think we should only reset the state machine for 2005/2006
+			//ppur.clear_latches();
+
+			byte ret = peek_2002();
+
+			vtoggle = false;
+			Reg2002_vblank_active = 0;
+			Reg2002_vblank_active_pending = false;
+
+			// update the open bus here
+			ppu_open_bus = ret;
+			ppu_open_bus_decay(2);
+			return ret;
+		}
+		byte peek_2002()
+		{
+			return (byte)((Reg2002_vblank_active << 7) | (Reg2002_objhit << 6) | (Reg2002_objoverflow << 5) | (ppu_open_bus & 0x1F));
+		}
+
+		void clear_2002()
+		{
+			Reg2002_objhit = Reg2002_objoverflow = 0;
+			Reg2002_vblank_clear_pending = true;
+		}
+
+		//OAM ADDRESS (write)
+		void write_2003(byte value)
+		{
+			//just record the oam buffer write target
+			reg_2003 = value;
+		}
+		byte read_2003() { return ppu_open_bus; }
+		byte peek_2003() { return ppu_open_bus; }
+
+		//OAM DATA (write)
+		void write_2004(byte value)
+		{
+			if ((reg_2003 & 3) == 2) value &= 0xE3; //some of the OAM bits are unwired so we mask them out here
+			//otherwise we just write this value and move on to the next oam byte
+			OAM[reg_2003] = value;
+			reg_2003++;
+		}
+		byte read_2004()
+        {
+			byte ret;
+			// behaviour depends on whether things are being rendered or not
+            if (reg_2001.show_bg || reg_2001.show_obj)
+            {
+                if (ppur.status.sl < 241)
+                {
+                    if (ppur.status.cycle < 64)
+                    {
+                        ret = 0xFF; // during this time all reads return FF
+                    }
+                    else if (ppur.status.cycle < 256)
+                    {
+                        ret = read_value;
+                    }
+                    else if (ppur.status.cycle < 320)
+                    {
+                        ret = read_value;
+                    }
+                    else
+                    {
+                        ret = soam[0];
+                    }
+                }
+                else
+                {
+                    ret = OAM[reg_2003];
+                }
+            }
+            else
+            {
+                ret = OAM[reg_2003];
+            }
+			ppu_open_bus = ret;
+			ppu_open_bus_decay(1);
+			return ret;
+        }
+		byte peek_2004() { return OAM[reg_2003]; }
+
+		//SCROLL (write)
+		void write_2005(byte value)
+		{
+			if (!vtoggle)
+			{
+				ppur._ht= value >> 3;
+				ppur.fh = value & 7;
+				//nes.LogLine("scroll wrote ht = {0} and fh = {1}", ppur._ht, ppur.fh);
+			}
+			else
+			{
+				ppur._vt = value >> 3;
+				ppur._fv = value & 7;
+				//nes.LogLine("scroll wrote vt = {0} and fv = {1}", ppur._vt, ppur._fv);
+			}
+			vtoggle ^= true;
+		}
+		byte read_2005() { return ppu_open_bus; }
+		byte peek_2005() { return ppu_open_bus; }
+
+		//VRAM address register (write)
+		void write_2006(byte value)
+		{
+			if (!vtoggle)
+			{
+				ppur._vt &= 0x07;
+				ppur._vt |= (value & 0x3) << 3;
+				ppur._h = (value >> 2) & 1;
+				ppur._v = (value >> 3) & 1;
+				ppur._fv = (value >> 4) & 3;
+				//nes.LogLine("addr wrote fv = {0}", ppur._fv);
+			}
+			else
+			{
+				ppur._vt &= 0x18;
+				ppur._vt |= (value >> 5);
+				ppur._ht = value & 31;
+				ppur.install_latches();
+				//nes.LogLine("addr wrote vt = {0}, ht = {1}", ppur._vt, ppur._ht);
+
+				//normally the address isnt observed by the board till it gets clocked by a read or write.
+				//but maybe thats just because a ppu read/write shoves it on the address bus
+				//apparently this shoves it on the address bus, too, or else blargg's mmc3 tests dont pass
+				nes.Board.AddressPPU(ppur.get_2007access());
+			}
+
+			vtoggle ^= true;
+		}
+		byte read_2006() { return ppu_open_bus; }
+		byte peek_2006() { return ppu_open_bus; }
+
+		//VRAM data register (r/w)
+		void write_2007(byte value)
+		{
+			//does this take 4x longer? nestopia indicates so perhaps...
+
+			int addr = ppur.get_2007access();
+			if (ppuphase == PPUPHASE.BG)
+			{
+				if (reg_2001.show_bg)
+				{
+					addr = ppur.get_ntread();
+				}
+			}
+
+			if ((addr & 0x3F00) == 0x3F00)
+			{
+				//handle palette. this is being done nestopia style, because i found some documentation for it (appendix 1)
+				addr &= 0x1F;
+				byte color = (byte)(value & 0x3F); //are these bits really unwired? can they be read back somehow?
+
+				//this little hack will help you debug things while the screen is black
+				//color = (byte)(addr & 0x3F);
+
+				PALRAM[addr] = color;
+				if ((addr & 3) == 0)
+				{
+					PALRAM[addr ^ 0x10] = color;
+				}
+			}
+			else
+			{
+				addr &= 0x3FFF;
+
+				ppubus_write(addr, value);
+
+			}
+
+			ppur.increment2007(ppur.status.rendering && reg_2001.PPUON, reg_2000.vram_incr32 != 0);
+
+			//see comments in $2006
+			nes.Board.AddressPPU(ppur.get_2007access()); 
+		}
+		byte read_2007()
+		{
+			int addr = ppur.get_2007access() & 0x3FFF;
+			int bus_case = 0;	
+			//ordinarily we return the buffered values
+			byte ret = VRAMBuffer;
+
+			//in any case, we read from the ppu bus
+			VRAMBuffer = ppubus_read(addr,false);
+
+			//but reads from the palette are implemented in the PPU and return immediately
+			if ((addr & 0x3F00) == 0x3F00)
+			{
+				//TODO apply greyscale shit?
+				ret = (byte)(PALRAM[addr & 0x1F] + ((byte)(ppu_open_bus & 0xC0)));
+				bus_case = 1;
+			}
+
+			ppur.increment2007(ppur.status.rendering && reg_2001.PPUON, reg_2000.vram_incr32 != 0);
+
+			//see comments in $2006
+			nes.Board.AddressPPU(ppur.get_2007access());
+
+			// update open bus here
+			ppu_open_bus = ret;
+			if (bus_case==0)
+			{
+				ppu_open_bus_decay(1);
+			} else
+			{
+				ppu_open_bus_decay(3);
+			}
+
+			return ret;
+		}
+		byte peek_2007()
+		{
+			int addr = ppur.get_2007access() & 0x3FFF;
+
+			//ordinarily we return the buffered values
+			byte ret = VRAMBuffer;
+
+			//in any case, we read from the ppu bus
+			// can't do this in peek; updates the value that will be used later
+			// VRAMBuffer = ppubus_peek(addr);
+
+			//but reads from the palette are implemented in the PPU and return immediately
+			if ((addr & 0x3F00) == 0x3F00)
+			{
+				//TODO apply greyscale shit?
+				ret = PALRAM[addr & 0x1F];
+			}
+
+			return ret;
+		}
+		//--------
+		
+		public byte ReadReg(int addr)
+		{
+			byte ret_spec;
+			switch (addr)
+			{
+				case 0: return read_2000(); case 1: return read_2001(); case 2: return read_2002(); case 3: return read_2003();
+				case 4: return read_2004(); case 5: return read_2005(); case 6: return read_2006();
+
+				case 7:
+					{
+						if (double_2007_read>0)
+						{
+							double_2007_read = 0;
+							return ppu_open_bus;							
+						} else
+						{
+							ret_spec = read_2007();
+							double_2007_read = 2;
+						}
+						
+						if (nes.do_the_reread)
+						{
+							ret_spec = read_2007();
+							ret_spec = read_2007();
+							nes.do_the_reread = false;
+						}
+						return ret_spec;
+					}
+				default: throw new InvalidOperationException();
+			}
+		}
+		public byte PeekReg(int addr)
+		{
+			switch (addr)
+			{
+				case 0: return peek_2000(); case 1: return peek_2001(); case 2: return peek_2002(); case 3: return peek_2003();
+				case 4: return peek_2004(); case 5: return peek_2005(); case 6: return peek_2006(); case 7: return peek_2007();
+				default: throw new InvalidOperationException();
+			}
+		}
+		public void WriteReg(int addr, byte value)
+		{
+			PPUGenLatch = value;
+			ppu_open_bus = value;
+
+			switch (addr)
+			{
+				case 0: write_2000(value); break; case 1: write_2001(value); break; case 2: write_2002(value); break; case 3: write_2003(value); break;
+				case 4: write_2004(value); break; case 5: write_2005(value); break; case 6: write_2006(value); break; case 7: write_2007(value); break;
+				default: throw new InvalidOperationException();
+			}
+		}
+		
+		
+		public void ppu_open_bus_decay(byte action)
+		{
+			// if there is no action, decrement the timer
+			if (action==0)
+			{
+				for (int i = 0; i < 8; i++)
+				{
+					if (ppu_open_bus_decay_timer[i] == 0)
+					{
+						ppu_open_bus = (byte)(ppu_open_bus & (0xff - (1 << i)));
+						ppu_open_bus_decay_timer[i] = 1786840; // about 1 second worth of cycles
+					}
+					else
+					{
+						ppu_open_bus_decay_timer[i]--;
+					}
+					
+				} 
+			}
+
+			// reset the timer for all bits (reg 2004 / 2007 (non-palette)
+			if (action==1)
+			{
+				for (int i=0; i<8; i++)
+				{
+					ppu_open_bus_decay_timer[i] = 1786840;
+				}
+				
+			}
+
+			// reset the timer for high 3 bits (reg 2002)
+			if (action == 2)
+			{
+				ppu_open_bus_decay_timer[7] = 1786840;
+				ppu_open_bus_decay_timer[6] = 1786840;
+				ppu_open_bus_decay_timer[5] = 1786840;
+			}
+
+			// reset the timer for all low 6 bits (reg 2007 (palette))
+			if (action == 3)
+			{
+				for (int i = 0; i < 6; i++)
+				{
+					ppu_open_bus_decay_timer[i] = 1786840;
+				}
+			}
+			// other values of action are reserved for possibly needed expansions, but this passes
+			// ppu_open_bus for now.
+		}		
+	}
+}
+
+
+		//ARead[x]=A200x;
+		//BWrite[x]=B2000;
+		//ARead[x+1]=A200x;
+		//BWrite[x+1]=B2001;
+		//ARead[x+2]=A2002;
+		//BWrite[x+2]=B2002;
+		//ARead[x+3]=A200x;
+		//BWrite[x+3]=B2003;
+		//ARead[x+4]=A2004; //A2004;
+		//BWrite[x+4]=B2004;
+		//ARead[x+5]=A200x;
+		//BWrite[x+5]=B2005;
+		//ARead[x+6]=A200x;
+		//BWrite[x+6]=B2006;
+		//ARead[x+7]=A2007;
+		//BWrite[x+7]=B2007;
+
+
+//Address 	Size 	Description
+//$0000 	$1000 	Pattern Table 0
+//$1000 	$1000 	Pattern Table 1
+//$2000 	$3C0 	Name Table 0
+//$23C0 	$40 	Attribute Table 0
+//$2400 	$3C0 	Name Table 1
+//$27C0 	$40 	Attribute Table 1
+//$2800 	$3C0 	Name Table 2
+//$2BC0 	$40 	Attribute Table 2
+//$2C00 	$3C0 	Name Table 3
+//$2FC0 	$40 	Attribute Table 3
+//$3000 	$F00 	Mirror of 2000h-2EFFh
+//$3F00 	$10 	BG Palette
+//$3F10 	$10 	Sprite Palette
+//$3F20 	$E0 	Mirror of 3F00h-3F1Fh
+
+
+//appendix 1
+//http://nocash.emubase.de/everynes.htm#ppupalettes
+//Palette Memory (25 entries used)
+//  3F00h        Background Color (Color 0)
+//  3F01h-3F03h  Background Palette 0 (Color 1-3)
+//  3F05h-3F07h  Background Palette 1 (Color 1-3)
+//  3F09h-3F0Bh  Background Palette 2 (Color 1-3)
+//  3F0Dh-3F0Fh  Background Palette 3 (Color 1-3)
+//  3F11h-3F13h  Sprite Palette 0 (Color 1-3)
+//  3F15h-3F17h  Sprite Palette 1 (Color 1-3)
+//  3F19h-3F1Bh  Sprite Palette 2 (Color 1-3)
+//  3F1Dh-3F1Fh  Sprite Palette 3 (Color 1-3)
+//Palette Gaps and Mirrors
+//  3F04h,3F08h,3F0Ch - Three general purpose 6bit data registers.
+//  3F10h,3F14h,3F18h,3F1Ch - Mirrors of 3F00h,3F04h,3F08h,3F0Ch.
+//  3F20h-3FFFh - Mirrors of 3F00h-3F1Fh.
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