NESHawk: fix some DMC edge cases
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@ -857,20 +857,24 @@ namespace BizHawk.Emulation.Cores.Nintendo.NES
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public void set_lenctr_en(bool en)
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{
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// should this be delayed by two/three cycles?
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if(!en)
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{
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// in these cases, the disable happens right as the reload begins, it is cancelled similar to a write triggered reload
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// cancelling an automatic reload, and has the same timing (still uses fill_glitch_2)
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if (((timer == 4) || (timer == 3)) && (out_bits_remaining == 0) && (sample_length != 0))
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if (((timer == 3) || (timer == 2)) && (out_bits_remaining == 0) && (sample_length != 0))
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{
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//Console.WriteLine("glitch 3 " + timer);
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sample_length = 0;
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fill_glitch_2 = true;
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apu.dmc_irq = false;
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apu.SyncIRQ();
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return;
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}
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// in these cases the disable happens too late and the reload (andpotential IRQ) still happen
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if ((timer <= 2) && (out_bits_remaining == 0) && (sample_length != 0))
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if ((timer == 1) && (out_bits_remaining == 0) && (sample_length != 0))
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{
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//Console.WriteLine("glitch 4 " + timer);
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pending_disable = true;
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apu.dmc_irq = false;
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apu.SyncIRQ();
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@ -567,7 +567,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.NES
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}
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}
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if ((apu.dmc.timer == 4) && (apu.dmc.out_bits_remaining == 0) && (apu.dmc.sample_length == 0))
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if ((apu.dmc.timer == 4) && (apu.dmc.out_bits_remaining == 0) && (apu.dmc.sample_length == 1))
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{
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//Console.WriteLine("close 2 " + cpu.TotalExecutedCycles + " " + apu.dmc.timer + " " + apu.dmc.sample_length + " " + cpu.opcode + " " + cpu.mi);
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apu.dmc.fill_glitch_2 = true;
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