NESHawk: fix some DMC edge cases

This commit is contained in:
alyosha-tas 2022-01-03 16:49:36 -05:00
parent 6b9bd9e3bd
commit c7403e7fe7
2 changed files with 9 additions and 5 deletions

View File

@ -857,20 +857,24 @@ namespace BizHawk.Emulation.Cores.Nintendo.NES
public void set_lenctr_en(bool en)
{
// should this be delayed by two/three cycles?
if(!en)
{
// in these cases, the disable happens right as the reload begins, it is cancelled similar to a write triggered reload
// cancelling an automatic reload, and has the same timing (still uses fill_glitch_2)
if (((timer == 4) || (timer == 3)) && (out_bits_remaining == 0) && (sample_length != 0))
if (((timer == 3) || (timer == 2)) && (out_bits_remaining == 0) && (sample_length != 0))
{
//Console.WriteLine("glitch 3 " + timer);
sample_length = 0;
fill_glitch_2 = true;
apu.dmc_irq = false;
apu.SyncIRQ();
return;
}
// in these cases the disable happens too late and the reload (andpotential IRQ) still happen
if ((timer <= 2) && (out_bits_remaining == 0) && (sample_length != 0))
if ((timer == 1) && (out_bits_remaining == 0) && (sample_length != 0))
{
//Console.WriteLine("glitch 4 " + timer);
pending_disable = true;
apu.dmc_irq = false;
apu.SyncIRQ();

View File

@ -567,7 +567,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.NES
}
}
if ((apu.dmc.timer == 4) && (apu.dmc.out_bits_remaining == 0) && (apu.dmc.sample_length == 0))
if ((apu.dmc.timer == 4) && (apu.dmc.out_bits_remaining == 0) && (apu.dmc.sample_length == 1))
{
//Console.WriteLine("close 2 " + cpu.TotalExecutedCycles + " " + apu.dmc.timer + " " + apu.dmc.sample_length + " " + cpu.opcode + " " + cpu.mi);
apu.dmc.fill_glitch_2 = true;