z80: use high byte BUSRQ vector since PCl = 0 so the look up fails (oops)
This commit is contained in:
parent
7dfd19de2b
commit
beae64d563
|
@ -45,7 +45,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, SPl, 0, 0, SPl, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// Mode 0 interrupts only take effect if a CALL or RST is on the data bus
|
||||
|
@ -64,7 +64,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// Just jump to $0038
|
||||
|
@ -85,7 +85,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, 0, 0, SPl, 0, 0, SPl, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, 0, 0, SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// Interrupt mode 2 uses the I vector combined with a byte on the data bus
|
||||
|
@ -112,7 +112,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, 0, 0, SPl, 0, 0, SPl, 0, 0, Z, 0, 0, Z, 0 ,0 ,PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, W, 0 ,0 ,PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private static ushort[] INT_vectors = new ushort[] {0x40, 0x48, 0x50, 0x58, 0x60};
|
||||
|
|
|
@ -15,7 +15,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] {PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// NOTE: In a real Z80, this operation just flips a switch to choose between 2 registers
|
||||
|
@ -28,7 +28,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void EXX_()
|
||||
|
@ -39,7 +39,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// this exchanges 2 16 bit registers
|
||||
|
@ -51,7 +51,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void INC_16(ushort src_l, ushort src_h)
|
||||
|
@ -64,7 +64,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {0, 0, PCl, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {0, 0, PCh, 0, 0, 0};
|
||||
}
|
||||
|
||||
|
||||
|
@ -78,7 +78,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {0, 0, PCl, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {0, 0, PCh, 0, 0, 0};
|
||||
}
|
||||
|
||||
// this is done in two steps technically, but the flags don't work out using existing funcitons
|
||||
|
@ -98,7 +98,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {0, 0, 0, 0, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] {0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void REG_OP(ushort operation, ushort dest, ushort src)
|
||||
|
@ -109,7 +109,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] {PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// Operations using the I and R registers take one T-cycle longer
|
||||
|
@ -122,7 +122,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] {0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// note: do not use DEC here since no flags are affected by this operation
|
||||
|
@ -145,7 +145,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {0, PCl, 0, 0, 0, 0, 0, 0, 0, PCl, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {0, PCh, 0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0};
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -159,7 +159,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {0, PCl, 0, 0, PCl, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {0, PCh, 0, 0, PCh, 0, 0, 0};
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -171,7 +171,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
IDLE,
|
||||
HALT };
|
||||
|
||||
BUSRQ = new ushort[] {PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] {PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void JR_COND(bool cond)
|
||||
|
@ -192,7 +192,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {PCl, 0, 0, 0, 0, 0, 0, 0, PCl, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {PCh, 0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0};
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -205,7 +205,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {PCl, 0, 0, PCl, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {PCh, 0, 0, PCh, 0, 0, 0};
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -225,7 +225,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {PCl, 0, 0, PCl, 0, 0, Z, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {PCh, 0, 0, PCh, 0, 0, W, 0, 0, 0};
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -241,7 +241,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {PCl, 0, 0, PCl, 0, 0, PCl, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {PCh, 0, 0, PCh, 0, 0, PCh, 0, 0, 0};
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -259,7 +259,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {SPl, 0, 0, SPl, 0, 0, Z, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
|
||||
}
|
||||
|
||||
private void RETI_()
|
||||
|
@ -276,7 +276,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {SPl, 0, 0, SPl, 0, 0, Z, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
|
||||
}
|
||||
|
||||
private void RETN_()
|
||||
|
@ -293,7 +293,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {SPl, 0, 0, SPl, 0, 0, Z, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
|
||||
}
|
||||
|
||||
|
||||
|
@ -314,7 +314,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {0, SPl, 0, 0, SPl, 0, 0, Z, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -325,7 +325,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {0, PCl, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {0, PCh, 0, 0, 0};
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -352,7 +352,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] {PCl, 0, 0, PCl, 0, 0, 0, SPl, 0, 0, SPl, 0, 0, Z, 0, 0, 0};
|
||||
BUSRQ = new ushort[] {PCh, 0, 0, PCh, 0, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -368,7 +368,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, PCl, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -380,7 +380,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void BIT_OP(ushort operation, ushort bit, ushort src)
|
||||
|
@ -391,7 +391,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void PUSH_(ushort src_l, ushort src_h)
|
||||
|
@ -409,7 +409,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, SPl, 0, 0, SPl, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
|
||||
|
@ -427,7 +427,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { SPl, 0, 0, SPl, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void RST_(ushort n)
|
||||
|
@ -445,7 +445,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, SPl, 0, 0, SPl, 0, 0, Z, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void PREFIX_(ushort src)
|
||||
|
@ -456,7 +456,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
PREFIX, src};
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void PREFETCH_(ushort src_l, ushort src_h)
|
||||
|
@ -467,7 +467,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
PREFIX, IXYprefetch };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void DI_()
|
||||
|
@ -478,7 +478,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void EI_()
|
||||
|
@ -489,7 +489,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void JP_16(ushort src_l, ushort src_h)
|
||||
|
@ -500,7 +500,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_l, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_SP_16(ushort src_l, ushort src_h)
|
||||
|
@ -513,7 +513,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, 0, src_l, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, 0, src_h, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void OUT_()
|
||||
|
@ -531,7 +531,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0, 0, 0 ,0, PCl, 0, 0, 0};
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0, 0, 0 ,0, PCh, 0, 0, 0};
|
||||
}
|
||||
|
||||
private void OUT_REG_(ushort dest, ushort src)
|
||||
|
@ -546,7 +546,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { 0, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void IN_()
|
||||
|
@ -564,7 +564,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void IN_REG_(ushort dest, ushort src)
|
||||
|
@ -579,7 +579,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { 0, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void REG_OP_16_(ushort op, ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
|
@ -597,7 +597,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { 0, 0, 0, 0, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void INT_MODE_(ushort src)
|
||||
|
@ -608,7 +608,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void RRD_()
|
||||
|
@ -629,7 +629,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { L, 0, 0, 0, 0, 0, Z, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { H, 0, 0, 0, 0, 0, W, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void RLD_()
|
||||
|
@ -650,7 +650,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { L, 0, 0, 0, 0, 0, Z, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { H, 0, 0, 0, 0, 0, W, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_l, 0, 0, src_l, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, src_h, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void BIT_OP_IND(ushort operation, ushort bit, ushort src_l, ushort src_h)
|
||||
|
@ -35,7 +35,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_l, 0, 0, src_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// Note that this operation uses I_BIT, same as indexed BIT.
|
||||
|
@ -54,7 +54,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void REG_OP_IND_INC(ushort operation, ushort dest, ushort src_l, ushort src_h)
|
||||
|
@ -68,7 +68,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void REG_OP_IND(ushort operation, ushort dest, ushort src_l, ushort src_h)
|
||||
|
@ -82,7 +82,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_16_IND_nn(ushort src_l, ushort src_h)
|
||||
|
@ -105,7 +105,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, PCl, 0, 0, Z, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_IND_16_nn(ushort dest_l, ushort dest_h)
|
||||
|
@ -128,7 +128,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, PCl, 0, 0, Z, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_8_IND_nn(ushort src)
|
||||
|
@ -148,7 +148,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, PCl, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_IND_8_nn(ushort dest)
|
||||
|
@ -168,7 +168,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, PCl, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_8_IND(ushort dest_l, ushort dest_h, ushort src)
|
||||
|
@ -182,7 +182,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { dest_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { dest_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_8_IND_IND(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
|
@ -199,7 +199,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_l, 0, 0, dest_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, dest_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_IND_8_INC(ushort dest, ushort src_l, ushort src_h)
|
||||
|
@ -213,7 +213,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_IND_16(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
|
@ -230,7 +230,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_l, 0, 0, src_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void INC_8_IND(ushort src_l, ushort src_h)
|
||||
|
@ -248,7 +248,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_l, 0, 0, src_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void DEC_8_IND(ushort src_l, ushort src_h)
|
||||
|
@ -266,7 +266,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, src_l, 0, 0, src_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// NOTE: WZ implied for the wollowing 3 functions
|
||||
|
@ -285,7 +285,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, Z, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_BIT_OP(ushort operation, ushort bit, ushort dest)
|
||||
|
@ -303,7 +303,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, Z, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_BIT_TE(ushort bit)
|
||||
|
@ -318,7 +318,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_OP_n(ushort operation, ushort src_l, ushort src_h)
|
||||
|
@ -344,7 +344,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0, 0, 0, 0, 0, 0, Z, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0, 0, 0, 0, 0, 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_OP_n_n(ushort src_l, ushort src_h)
|
||||
|
@ -366,7 +366,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0, 0, PCl, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0, 0, PCh, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_REG_OP_IND_n(ushort operation, ushort dest, ushort src_l, ushort src_h)
|
||||
|
@ -388,7 +388,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0, 0, 0, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0, 0, 0, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_LD_8_IND_n(ushort dest_l, ushort dest_h, ushort src)
|
||||
|
@ -410,7 +410,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCl, 0, 0, 0, 0, 0, 0, 0, Z, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0, 0, 0, 0, 0, Z, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_OP_R(ushort operation, ushort repeat_instr)
|
||||
|
@ -429,7 +429,7 @@
|
|||
OP_F,
|
||||
OP_R, 0, operation, repeat_instr };
|
||||
|
||||
BUSRQ = new ushort[] { L, 0, 0, E, 0, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { H, 0, 0, D, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void CP_OP_R(ushort operation, ushort repeat_instr)
|
||||
|
@ -448,7 +448,7 @@
|
|||
OP_F,
|
||||
OP_R, 1, operation, repeat_instr };
|
||||
|
||||
BUSRQ = new ushort[] { L, 0, 0, 0, 0, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { H, 0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void IN_OP_R(ushort operation, ushort repeat_instr)
|
||||
|
@ -467,7 +467,7 @@
|
|||
OP_F,
|
||||
OP_R, 2, operation, repeat_instr };
|
||||
|
||||
BUSRQ = new ushort[] { 0, 0, 0, 0, L, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, 0, 0, 0, H, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void OUT_OP_R(ushort operation, ushort repeat_instr)
|
||||
|
@ -486,7 +486,7 @@
|
|||
OP_F,
|
||||
OP_R, 3, operation, repeat_instr };
|
||||
|
||||
BUSRQ = new ushort[] { L, 0, 0, 0, 0, 0, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { H, 0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// this is an indirect change of a a 16 bit register with memory
|
||||
|
@ -513,7 +513,7 @@
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { dest_l, 0, 0, 0, dest_l, 0, 0, dest_l, 0, 0, 0, 0, dest_l, 0, 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { dest_h, 0, 0, 0, dest_h, 0, 0, dest_h, 0, 0, 0, 0, dest_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -266,7 +266,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { 0, PCl, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { 0, PCh, 0, 0, 0 };
|
||||
|
||||
instr_pntr = 0; bus_pntr = 0;
|
||||
// adjust WZ register accordingly
|
||||
|
|
|
@ -27,10 +27,10 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
|||
{
|
||||
get
|
||||
{
|
||||
if (_cpu.bus_pntr < _cpu.BUSRQ.Length - 1)
|
||||
return _cpu.BUSRQ[_cpu.bus_pntr];
|
||||
//if (_cpu.bus_pntr < _cpu.BUSRQ.Length - 1)
|
||||
return _cpu.BUSRQ[_cpu.bus_pntr];
|
||||
|
||||
return 0;
|
||||
//return 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -63,48 +63,47 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
|||
|
||||
switch (BUSRQ)
|
||||
{
|
||||
// PCl
|
||||
case 0:
|
||||
// PCh
|
||||
case 1:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.PCl] | _cpu.Regs[_cpu.PCh] << 8);
|
||||
break;
|
||||
// Z
|
||||
case 13:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.Z] | _cpu.Regs[_cpu.W] << 8);
|
||||
break;
|
||||
// SPl
|
||||
case 2:
|
||||
// SPh
|
||||
case 3:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.SPl] | _cpu.Regs[_cpu.SPh] << 8);
|
||||
break;
|
||||
// L
|
||||
case 11:
|
||||
// A
|
||||
case 4:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.F] | _cpu.Regs[_cpu.A] << 8);
|
||||
break;
|
||||
// B
|
||||
case 6:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.C] | _cpu.Regs[_cpu.B] << 8);
|
||||
break;
|
||||
// D
|
||||
case 8:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.E] | _cpu.Regs[_cpu.D] << 8);
|
||||
break;
|
||||
// H
|
||||
case 10:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.L] | _cpu.Regs[_cpu.H] << 8);
|
||||
break;
|
||||
// I
|
||||
case 21:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.R] | _cpu.Regs[_cpu.I] << 8);
|
||||
break;
|
||||
// Ixl
|
||||
case 15:
|
||||
// W
|
||||
case 12:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.Z] | _cpu.Regs[_cpu.W] << 8);
|
||||
break;
|
||||
// Ixh
|
||||
case 16:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.Ixl] | _cpu.Regs[_cpu.Ixh] << 8);
|
||||
break;
|
||||
// Iyl
|
||||
case 17:
|
||||
// Iyh
|
||||
case 18:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.Iyl] | _cpu.Regs[_cpu.Iyh] << 8);
|
||||
break;
|
||||
// A
|
||||
case 4:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.F] | _cpu.Regs[_cpu.A] << 8);
|
||||
break;
|
||||
// B
|
||||
case 6:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.C] | _cpu.Regs[_cpu.B] << 8);
|
||||
break;
|
||||
// D
|
||||
case 8:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.E] | _cpu.Regs[_cpu.D] << 8);
|
||||
break;
|
||||
|
||||
default:
|
||||
// I
|
||||
case 21:
|
||||
addr = (ushort)(_cpu.Regs[_cpu.R] | _cpu.Regs[_cpu.I] << 8);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue