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Z80: Remove JAM 

The relevent opcodes behave as NOPs
This commit is contained in:
alyosha-tas 2017-10-19 10:55:17 -04:00 committed by GitHub
parent af9c813c5b
commit be6aa52bc8
3 changed files with 10 additions and 25 deletions
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7
BizHawk.Emulation.Cores/CPUs/Z80A/Execute.cs
View File

@ -23,7 +23,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
public bool NO_prefix, CB_prefix, IX_prefix, EXTD_prefix, IY_prefix, IXCB_prefix, IYCB_prefix;
public bool IXCB_prefetch, IYCB_prefetch; // value is fetched before opcode
public bool halted;
public bool jammed;
public ushort PF;
public void FetchInstruction(byte opcode)
@ -617,7 +616,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case 0x74: INT_OP(NEG, A); break; // NEG
case 0x75: RETN_(); break; // RETN
case 0x76: INT_MODE_(1); break; // IM $1
case 0x77: JAM_(); break; // JAM
case 0x77: NOP_(); break; // NOP
case 0x78: IN_REG_(A, C); break; // IN A, (C)
case 0x79: OUT_REG_(C, A); break; // OUT (C), A
case 0x7A: REG_OP_16_(ADC16, L, H, SPl, SPh); break; // ADC HL, SP
@ -625,7 +624,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case 0x7C: INT_OP(NEG, A); break; // NEG
case 0x7D: RETN_(); break; // RETI
case 0x7E: INT_MODE_(2); break; // IM $2
case 0x7F: JAM_(); break; // JAM
case 0x7F: NOP_(); break; // NOP
case 0xA0: LD_OP_R(INC16, 0); break; // LDI
case 0xA1: CP_OP_R(INC16, 0); break; // CPI
case 0xA2: IN_OP_R(INC16, 0); break; // INI
@ -642,7 +641,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case 0xB9: CP_OP_R(DEC16, 1); break; // CPDR
case 0xBA: IN_OP_R(DEC16, 1); break; // INDR
case 0xBB: OUT_OP_R(DEC16, 1); break; // OTDR
default: JAM_(); break; // JAM
default: NOP_(); break; // NOP
}
}

9
BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Direct.cs
View File

@ -448,15 +448,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
OP };
}
private void JAM_()
{
cur_instr = new ushort[]
{JAM,
IDLE,
IDLE,
IDLE };
}
private void OUT_()
{
cur_instr = new ushort[]

19
BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs
View File

@ -61,20 +61,20 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
public const ushort PREFETCH = 46;
public const ushort ASGN = 47;
public const ushort ADDS = 48; // signed 16 bit operation used in 2 instructions
public const ushort JAM = 49; // all undocumented opcodes jam the machine
public const ushort INT_MODE = 49;
public const ushort EI_RETN = 50;
public const ushort EI_RETI = 51; // reti has no delay in interrupt enable
public const ushort OUT = 52;
public const ushort IN = 53;
public const ushort NEG = 54;
public const ushort INT_MODE = 55;
public const ushort RRD = 56;
public const ushort RLD = 57;
public const ushort SET_FL_LD = 58;
public const ushort SET_FL_CP = 59;
public const ushort RRD = 55;
public const ushort RLD = 56;
public const ushort SET_FL_LD = 57;
public const ushort SET_FL_CP = 58;
public const ushort SET_FL_IR = 59;
public const ushort I_BIT = 60;
public const ushort HL_BIT = 61;
public const ushort SET_FL_IR = 62;
public Z80A()
@ -576,10 +576,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case ADDS:
ADDS_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++], cur_instr[instr_pntr++], cur_instr[instr_pntr++]);
break;
case JAM:
jammed = true;
instr_pntr--;
break;
case EI_RETI:
// NOTE: This is needed for systems using multiple interrupt sources, it triggers the next interrupt
// Not currently implemented here
@ -689,7 +685,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
ser.Sync("instruction_pointer", ref instr_pntr);
ser.Sync("current instruction", ref cur_instr, false);
ser.Sync("opcode", ref opcode);
ser.Sync("jammped", ref jammed);
ser.Sync("FlagI", ref FlagI);
ser.Sync("NO Preifx", ref NO_prefix);