-When neither the cartridge nor hardware responds to a read, it now returns 0xFFFF instead of throwing an exception.
-I will now assume that 0x7000 is not mapped for the sake of continuing on. I will need to implement a mapper system shortly though. --Did the same thing for 0x4800. -AND@, MOVR, CMP enabled. -Made the logging separator generate before an instruction instead of after the register states. This is quite petty, but I don't like the separator at the end of the file. I hit an infinite loop, and I'm very very certain it's happening because I don't have an interrupt system yet. Time to stop avoiding that!
This commit is contained in:
parent
e8e64bca62
commit
b83bb1901d
|
@ -39,8 +39,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
log.WriteLine("O = {0:X4}", FlagO);
|
||||
log.WriteLine("I = {0:X4}", FlagI);
|
||||
log.WriteLine("D = {0:X4}", FlagD);
|
||||
log.WriteLine("------");
|
||||
log.WriteLine();
|
||||
log.Flush();
|
||||
}
|
||||
}
|
||||
|
|
|
@ -43,6 +43,8 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
if (logging)
|
||||
{
|
||||
int addrToAdvance;
|
||||
log.WriteLine("------");
|
||||
log.WriteLine();
|
||||
log.WriteLine(Disassemble(RegisterPC, out addrToAdvance));
|
||||
log.Flush();
|
||||
}
|
||||
|
@ -545,7 +547,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x0BD:
|
||||
case 0x0BE:
|
||||
case 0x0BF:
|
||||
throw new NotImplementedException();
|
||||
src = (byte)((opcode >> 3) & 0x7);
|
||||
dest = (byte)(opcode & 0x7);
|
||||
result = Register[src];
|
||||
|
@ -1521,7 +1522,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x345:
|
||||
case 0x346:
|
||||
case 0x347:
|
||||
throw new NotImplementedException();
|
||||
dest = (byte)(opcode & 0x7);
|
||||
addr = ReadMemory(RegisterPC++);
|
||||
dest_value = Register[dest];
|
||||
|
@ -1702,7 +1702,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x3BD:
|
||||
case 0x3BE:
|
||||
case 0x3BF:
|
||||
throw new NotImplementedException();
|
||||
mem = (byte)((opcode >> 3) & 0x7);
|
||||
dest = (byte)(opcode & 0x7);
|
||||
// Auto-decrement the stack pointer if it's the memory register.
|
||||
|
|
|
@ -11,7 +11,7 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
|||
|
||||
public int Parse(byte[] Rom)
|
||||
{
|
||||
// TODO: Fix.
|
||||
// TODO: Determine which loading method, if either, is correct.
|
||||
int index = 0;
|
||||
// Combine every two bytes into a word.
|
||||
while (index + 1 < Rom.Length)
|
||||
|
@ -53,7 +53,9 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
|||
// OK if no ECS.
|
||||
return Data[dest];
|
||||
else if (addr == 0x4800)
|
||||
return Data[dest];
|
||||
// return Data[dest];
|
||||
// For now, assume unmapped. TODO: Fix.
|
||||
return null;
|
||||
else
|
||||
return Data[dest];
|
||||
case 0x5000:
|
||||
|
@ -67,7 +69,9 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
|||
dest = (addr - 0x7000) + 0x4C00;
|
||||
if (addr == 0x7000)
|
||||
// OK if no ECS.
|
||||
return Data[dest];
|
||||
// return Data[dest];
|
||||
// For now, assume unmapped. TODO: Fix.
|
||||
return null;
|
||||
else if (addr <= 0x77FF)
|
||||
// OK if no ECS.
|
||||
return Data[dest];
|
||||
|
|
|
@ -61,7 +61,7 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
|||
|
||||
public void FrameAdvance(bool render)
|
||||
{
|
||||
Cpu.Execute(999); // execute some cycles. this will do nothing useful until a memory mapper is created.
|
||||
Cpu.Execute(9999999);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -7,7 +7,7 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
|||
{
|
||||
public sealed partial class Intellivision
|
||||
{
|
||||
private const string INVALID = "Invalid memory address.";
|
||||
private const ushort UNMAPPED = 0xFFFF;
|
||||
|
||||
private ushort[] STIC_Registers = new ushort[64];
|
||||
private ushort[] Scratchpad_RAM = new ushort[240];
|
||||
|
@ -146,7 +146,7 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
|||
if (cart != null)
|
||||
return (ushort)cart;
|
||||
else if (core == null)
|
||||
throw new ArgumentException(INVALID);
|
||||
return UNMAPPED;
|
||||
return (ushort)core;
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue